Photodetector based on PtSe2 and silicon nanopillar array and preparation method thereof

Abstract

A photodetector based on PtSe.sub.2 and a silicon nanopillar array includes a PMMA light-transmitting protective layer, a graphene transparent top electrode, a silicon nanopillar array structure coated with few-layer PtSe.sub.2, and metal electrodes of the graphene transparent top electrode and the silicon nanopillar array structure. A method for preparing the photodetector includes steps of: preparing graphene with a CVD method; preparing a silicon nanopillar array structure through dry etching; coating few-layer PtSe.sub.2 on surfaces of the silicon nano-pillar array structure through laser interference enhanced induction CVD; preparing graphene transparent top electrode; and magnetron-sputtering metal electrodes. The photodetector prepared by the present invention has a detection range from visible light to near-infrared wavebands. The silicon nanopillar array structure enhances light absorption of the detector, so that the detector has high sensitivity, simple structure and strong practicability.

Claims

1. A photodetector based on PtSe.sub.2 and a silicon nanopillar array, comprising: a polymethyl methacrylate PMMA light-transmitting protective layer, a graphene transparent top electrode, and a silicon nanopillar array structure covered with few-layer PtSe.sub.2, which are arranged in sequence from top to bottom; wherein metal electrodes are provided on a back side of the silicon nanopillar array structure as well as on a periphery of an area uncovered by the silicon nanopillar array structure covered with the few-layer PtSe.sub.2 on a back side of the graphene transparent top electrode; the polymethyl methacrylate PMMA light-transmitting protective layer is spin-coated on a front side of the graphene transparent top electrode; the back side of the graphene transparent top electrode is in direct contact with the few-layer PtSe.sub.2 to collect photo-generated carriers; the silicon nanopillar array structure consists of an upper part and a lower part; the upper part is a periodically arranged dense silicon nanopillar array structure, and the lower part is an unetched silicon substrate; the silicon nanopillar array structure is perpendicular to the silicon substrate.

2. The photodetector, as recited in claim 1, wherein a surface of the silicon nanopillar array structure is completely covered by the few-layer PtSe.sub.2 through laser interference enhanced induction vapor deposition, wherein top ends and sidewalls of silicon nanopillars are all covered by the few-layer PtSe.sub.2 with uniform thicknesses.

3. The photodetector, as recited in claim 1, wherein the graphene transparent top electrode is combined with the few-layer PtSe.sub.2 through a van der Waals force to form an ohmic contact; the PtSe.sub.2 is a P-type semiconductor, and after the PtSe.sub.2 contacts with N-type silicon, due to a concentration difference between electrons and holes, carriers diffuse and form a space charge depletion zone at an interface, which generates a built-in electric field; a diffusing direction of the carriers is opposite to a drift direction generated by the built-in electric field, and concentrations finally reach a thermal equilibrium; the photo-generated carriers are then separated by the built-in electric field, and are led to an external circuit by the graphene transparent top electrode and the metal electrodes on the back side thereof, as well as by the silicon nanopillar array structure and the metal electrodes on the back side thereof, so as to generate electrical signals.

4. The photodetector, as recited in claim 1, wherein the photodetector adopts a forward incident mode; an incident direction of an incident light is from the polymethyl methacrylate PMMA light-transmitting protective layer, through the graphene transparent top electrode, and then to the silicon nanopillar array structure coated with the few-layer PtSe.sub.2.

5. A method for preparing a photodetector, comprising steps of: 1) preparing graphene as a graphene transparent top electrode; 2) preparing a silicon nanopillar array structure; 3) coating few-layer PtSe.sub.2 on a surface of the silicon nanopillar array structure; 4) spin-coating PMMA on a front side of the graphene transparent top electrode to form a polymethyl methacrylate PMMA light-transmitting protective layer, and transferring to the silicon nanopillar array structure covered with the few-layer PtSe.sub.2; and 5) preparing metal electrodes on a back side of the graphene transparent top electrode as well as on a back side of the silicon nanopillar array structure.

6. The method, as recited in claim 5, wherein in the step 1), the graphene is prepared on a surface of a copper foil through chemical vapor deposition; ethanol and methane are used as raw materials; the prepared graphene has 1-3 layers; in the step 2), a periodically arranged monocrystalline silicon pillar array structure is obtained through photolithography and dry etching processing.

7. The method, as recited in claim 5, wherein in the step 3), Pt-containing compounds and Se are heated to evaporate, and are transported to the surface of the silicon nanopillar array structure in a reaction chamber by an inert gas mixed with a preset ratio of hydrogen; through laser interference enhanced induction vapor deposition, the Pt-containing compounds, Se and hydrogen are induced by laser irradiation to undergo a chemical reaction; generated PtSe.sub.2 is deposited on the surface of the silicon nanopillar array structure to form a few-layer PtSe.sub.2 film.

8. The method, as recited in claim 7, wherein when depositing the few-layer PtSe.sub.2, a laser beam is divided into multiple coherent beams through regular-quadrilateral distributed apertures, which forms a regular-quadrilateral distributed interference light field in an area where the silicon nanopillar array structure is located; an optical path difference is adjustable by changing a diameter of the apertures, a hole spacing of the apertures, and a distance between the apertures and the silicon nanopillar array structure, so that interference enhancement points of a coherent pattern on the silicon nanopillar array structure are located on silicon nanopillars, and interference cancellation points are located at gaps between the silicon nanopillars.

9. The method, as recited in claim 5, wherein in the step 4), a wet transfer technology is adopted to transfer the graphene transparent top electrode to the silicon nanopillar array structure which is coated with the few-layer PtSe.sub.2 without removing the PMMA.

10. The method, as recited in claim 5, wherein in the step 5), the prepared photodetector is processed with one-step magnetron sputtering to obtain the metal electrodes on the back side of the graphene transparent top electrode as well as on the back side of the silicon nanopillar array structure; the silicon nanopillar array structure covered with the few-layer PtSe.sub.2 occupies most area in a middle of the graphene transparent top electrode and acts as a mask; during metal electrode sputtering, the electrodes are deposited on the back side of the silicon nanopillar array structure as well as on a periphery of an area uncovered by the silicon nanopillar array structure on the graphene transparent top electrode, thereby forming two metal electrodes synchronically through the one-step magnetron sputtering.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a cross-sectional view of a photodetector based on graphene and silicon nanopillar array structure according to the present invention;

(2) FIG. 2 is a partial-enlarged cross-sectional view of the of the photodetector based on the graphene and the silicon nanopillar array structure according to the present invention;

(3) FIG. 3 is a bottom view of an electrode structure of the photodetector according to the present invention;

(4) FIG. 4 is a scanning electron microscope cross-sectional view of a silicon nanopillar array structure according to an embodiment 1;

(5) FIG. 5 is a sketch view of a laser beam passing through apertures and an interference pattern thereof; and

(6) FIG. 6 illustrates a principle of depositing few-layer PtSe.sub.2 on a silicon nano-array structure through laser interference enhanced induction chemical vapor deposition according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

(7) The present invention will be further illustrated below with embodiments and accompanying drawings. However, implementation and protection scope of the present invention are not limited thereto.

(8) As shown in FIGS. 1-3, a photodetector based on graphene and silicon nanopillar array structure of the present invention comprises: a polymethyl methacrylate PMMA light-transmitting protective layer 1, a graphene transparent top electrode 2, a metal frame bus electrode 3 on a back side of the graphene transparent top electrode 2, few-layer PtSe.sub.2 4, a silicon nanopillar array structure 5, and Au metal electrodes 6 on a back side of the silicon nanopillar array structure 5, which are arranged in sequence from top to bottom; wherein a thickness of the polymethyl methacrylate PMMA light-transmitting protective layer 1 is 150 nm to 450 nm; the graphene transparent top electrode 2 has 1 to 3 layers, and a thickness is 0.4 nm to 1.5 nm; the few-layer PtSe.sub.2 4 has 3 to 6 layers, and a thickness is 3 nm to 5 nm; a diameter of the nanopillars in the silicon nanopillar array 5 is 500 to 1000 nm, and a length is 3 to 5 μm; thicknesses of the Au metal electrodes 6 on the back side of the graphene transparent top electrode 2 and the Au metal electrodes 6 on the back side of the silicon nanopillar array structure 5 are both 150 to 200 nm. According to the present invention, conducting of the few-layer PtSe.sub.2 is mainly caused by positively charged holes, and the PtSe.sub.2 is a P-type semiconductor. After the PtSe.sub.2 contacts with heavily doped N-type silicon, there will be a concentration difference at the interface of electrons and holes. Fermi level of PtSe.sub.2 is about 4.84 eV, and Fermi level of N-type silicon is about 4.25 eV. Therefore, the electrons in the N-type silicon will flow to the few-layer PtSe.sub.2, and the holes of the few-layer PtSe.sub.2 will flow to the N-type silicon, and concentrations of the two carriers will finally reach a thermal equilibrium. At this time, an energy band on the surface of the N-type silicon will bend upwards, and an energy band on the surface of the few-layer PtSe.sub.2 will bend downwards, in such a manner that a space charge zone, also called built-in electric field, is formed near the interface of the two semiconductors. It is detected that a barrier height at the interface between the PtSe.sub.2 and the N-type silicon is 0.6 eV, and a theoretical spectral response ranges from visible light to 2066 nm near-infrared. When irradiated with light within such wavelength range, photo-generated carrier electron-hole pairs will be generated, which are separated by the built-in electric field and enter the external circuit to generate electrical signals, thereby realizing the detection of optical radiation.

(9) A method for preparing the photodetector based on the PtSe.sub.2 and the silicon nanopillar array according to the embodiment comprises steps of:

(10) (1) cleaning and annealing a copper foil, and then processing single-layer or few-layer graphene on a surface of the processed copper foil with chemical vapor deposition, so as to form a graphene/copper foil;

(11) (2) cleaning an N-type double-sided polished silicon wafer, spin-coating photoresist, and forming a silicon nanopillar array structure pattern through step-wise exposure and development; dry-etching the silicon wafer, and finally removing the residual photoresist for forming a silicon nanopillar array structure;

(12) (3) putting the prepared silicon nano-pillar array structure into a laser interference enhanced induction chemical vapor deposition device; heating and evaporating PtCl.sub.2 and Se powder as precursors; transporting into a reaction chamber with an inert gas such as argon which is mixed with a small amount of hydrogen; adjusting laser power, wavelength and aperture positions; wherein the two precursors chemically react on a surface of the silicon nanoarray structure under laser interference enhanced induction to deposit a PtSe.sub.2 film on the surface, thereby forming a few-layer PtSe.sub.2/nanopillar array structure;

(13) (4) spin-coating the graphene/copper foil by using PMMA, removing the copper foil in a chemical etching solution, and cleaning to obtain a graphene/PMMA film; then transferring to the prepared silicon nanoarray structure coated with the few-layer PtSe.sub.2, so as to form a PMMA/graphene/few-layer PtSe.sub.2/nanopillar array structure; and

(14) (5) processing the prepared PMMA/graphene/nanopillar array structure with one-step magnetron sputtering to simultaneously prepare Au metal electrodes on a back side of the graphene transparent top electrode as well as on a back side of the silicon nanopillar array structure; wherein the silicon nanopillar array structure acts as a mask during sputtering, and finally obtained electrodes cover a periphery of an area uncovered by the silicon nanopillar array structure on the graphene surface as well as the back side of the silicon nanopillar array structure.

(15) Preferably, cleaning and annealing in the step (1) comprise: first cleaning the copper foil with acetone, absolute ethanol, and deionized water to remove surface organic impurities, and then placing the copper foil in an annealing furnace at a temperature of 1000° C. in order to make copper atoms aligned and improve surface activity of copper.

(16) Preferably, the chemical vapor deposition in the step (1) uses an atmospheric or low-pressure chemical vapor deposition system for preparing graphene; Ar gas is used to carry organic carbon sources such as ethanol, and hydrogen is used as a protective gas to reduce oxygen content and prevent the copper foil from oxidization under a high temperature.

(17) Preferably, cleaning the N-type double-sided polished silicon wafer in the step (2) comprises: using sulfuric acid and hydrogen peroxide solution to remove organic pollutants, using ammonia and hydrogen peroxide solution to remove non-metal contamination, using hydrofluoric acid to remove surface oxidation layer of the silicon wafer, and using salt water and hydrogen peroxide to remove metal contamination. A thickness of the photoresist spin-coated on the surface of the silicon wafer is about 2 μm, so as to form the silicon nanopillar array structure pattern through step-wise exposure and development. the silicon wafer is dry-etched, and then acetone and alcohol are used to remove the remaining photoresist before washing with deionized water and drying with nitrogen, so as to obtain the silicon nanopillar array structure.

(18) Preferably, in the step (3), the few-layer PtSe.sub.2 film is deposited through laser interference enhanced induction chemical vapor deposition, comprising: putting the nanopillar array structure into the reaction chamber, and putting the precursor PtCl.sub.2 and Se into a heating zone with a mass ratio of about 1:8; heating at 450° C. and 220° C., and introducing a mixed gas of hydrogen and argon with a flow rate of 150 sccm, wherein a ratio of argon to hydrogen is about 9:1; after chemical composition of the transport airflow in the reaction chamber is stabilized, adjusting the laser wavelength and the aperture positions to start film deposition, so that the surface of the silicon nanopillar array structure is completely covered with the few-layer PtSe.sub.2 film.

(19) Preferably, in step (4), a spin-coating wet transfer method comprises: evenly coating the PMMA on the graphene/copper foil with a homogenizer, wherein a thickness of the PMMA is 150 to 450 nm; then etching the copper foil with pre-prepared ferric chloride (FeCl.sub.3) solution or (NH.sub.4)S.sub.2O.sub.8 solution; after the copper foil is completely dissolved, cleaning the remaining PMMA/graphene with deionized water to ensure that the remaining ferric chloride is removed; then drying and transferring to the silicon nanopillar array structure coated with the few-layer PtSe.sub.2, wherein the PMMA-coated graphene directly contacts with the silicon nanopillars without removing the PMMA.

(20) Preferably, in the step (5), one-step magnetron sputtering method is used to prepare the metal electrodes, wherein a sputtering target is a high-purity gold target, a background vacuum is 2×10.sup.−3 Pa, a shielding gas is Ar, a working pressure is 0.67 Pa, a sputtering power is 100 w, a sputtering period is 30 seconds to 1 minute, and thicknesses of the obtained metal electrodes are all 150 to 200 nm.

(21) A principle of the laser interference enhanced induction chemical vapor deposition of the present invention is that: according to the Fresnel principle, when a laser beam passes through the regular-quadrilateral distributed apertures, a new spherical wave will be formed each time when the laser beam passes through an aperture, and a plurality of spherical waves will be formed through the apertures. Optical path differences will be generated when these coherent lights meet at different spatial positions. If the optical path difference is an integer multiple of the wavelength, the light intensity will be coherently enhanced; and if the optical path difference is an odd multiple of the half-wavelength, the light intensity will be coherently weakened. Lattice-like array-distributed array interference pattern consistent with the silicon nano-array structure can be obtained by changing the diameter of the apertures, the hole spacing of the apertures, and the distance between the apertures and the silicon nanopillar array structure. The pattern distribution can be adjusted so that the interference enhancement points are located on silicon nanopillars, and the interference cancellation points are located at the gaps between the silicon nanopillars. The Pt-containing gaseous compounds, hydrogen and selenium can absorb energy at the laser interference enhancement points, wherein the generated PtSe.sub.2 is deposited on the surface of the silicon nano-array structure to form a film.

Embodiment 1

(22) 1. Cutting a copper foil (with a thickness of 25 μm and a purity of 99.99%) and immersing into acetone for 5 minutes, then putting in an ultrasonic machine for 10 seconds; removing the acetone and ultrasonically cleaning for 5 minutes with ethanol, and finally washing with deionized water several times and drying surfaces with a nitrogen gun; placing the processed copper foil on a quartz slide and pushing to a position near a thermocouple in a heating zone at a middle of an external end of a quartz tube; after evacuating to about 4 Pa before introducing argon gas to restore normal pressure; repeating the above process to reduce an oxygen content and prevent the copper foil from being oxidized under high temperature conditions; keeping flows of Ar gas (Ar1, 500 mL/min) and H.sub.2 (30 mL/min) unchanged in the first channel, program-control for 90 minutes, and heating to 1000° C. at a constant rate; the processing with heat preservation and pre-heat treatment for 2 h, so that arrangement of copper atoms tends to be consistent while surface activity of the copper foil is increased, thereby promoting deposition of carbon atoms; after preheating, bring ethanol (analytical purity, ambient temperature 15° C.) into the quartz tube through the Ar gas (Ar2, 100 mL/min) in the second channel and keeping for a certain period of time, and then cooling to room temperature to complete the preparation of the graphene film and obtain the graphene/copper foil.

(23) 2. Preparing H.sub.2SO.sub.4/H.sub.2O.sub.2 (1:3), NH.sub.4OH/H.sub.2O.sub.2/H.sub.2O (1:1:5), HF:H.sub.2O (1:5), HCL/H.sub.2O.sub.2/H.sub.2O (1:1:6) solutions respectively, wash an N-type double-sided polished silicon wafer with the above solutions in sequence at cleaning temperatures of 100° C., 70° C., 20° C., and 70° C.; then washing with deionized water for 15 minutes; processing the cleaned silicon wafer with photolithography, which comprises specific steps of: spin-coating (i.e. operating a homogenizer at a low speed of (500 rpm) while adding negative photoresist, then increasing the rotation speed (3000 rpm), spinning to stretch photoresist and volatilizing solvent until a thickness of the photoresist covering surfaces of the silicon wafer is about 2 μm); soft-baking (i.e. heating a vacuum hot plate to 120° C., and baking the silicon wafer coated with the photoresist for 30 seconds); aligning and exposing (i.e. putting a photolithography mask and a sample in a photolithography machine, then aligning before step-wise exposure); post-baking (i.e. after the sample is photoetched, placing on the vacuum hot plate at 110° C. for 60 seconds); developing (i.e. developing the sample with xylene solution, and then cleaning with butyl acetate); and hard-baking (i.e. placing the developed sample on the vacuum hot plate at 120° C. for 60 seconds).

(24) 3. Using a ME-3A multifunctional magnetic enhanced reactive ion etching machine to etch the silicon wafer sample with the nanopillar array structure pattern obtained by photolithography, which comprises specific steps of: loading (i.e. enabling cooling water and main power supply, preheating a RF power filament and deflating, opening a cover of the reaction chamber, placing the silicon wafer on a disc-shaped metal bottom electrode, and closing the cover of the reaction chamber tightly); vacuuming (i.e. checking whether a “molecular pump” knob is in a “On” state, if yes, starting a mechanical pump, so that the molecular pump will start automatically after about 30 s, performing subsequent operation after the molecular pump enters a stable working state); selecting an etching method (i.e. selecting a MERIE etching method, and timing for 3 min); venting (i.e. setting a flow rate meter switch to “Valve Control”, opening SF.sub.6 and O.sub.2 intake valves, adjusting gas flow to 36 cm.sup.3/s and 6 cm.sup.3/s respectively, and keeping a working pressure at 275 mtorr); starting etching (i.e. pressing “start”, switching plate pressure Ua to ON to start working, adjusting an output power to 120 W, and adjusting a matching device to minimize a reflected power indication Pr); stopping etching and turning off the system (i.e. closing gas paths and pumping out residual gas in the reaction chamber for 1 to 3 minutes, then pressing “Off”, deflating after the mechanical pump is stopped, and taking out the sample); removing the remaining photoresist with acetone and alcohol, washing with deionized water and drying with nitrogen. The silicon nanopillar array structure obtained by the above process is shown in FIG. 4, which has uniform size, aligned arrangement, and flat end faces of the silicon pillars.

(25) 4. Putting the silicon nanopillar array structure into the reaction chamber of the laser induction chemical vapor deposition system, putting PtCl.sub.2 powder and Se powder, which have a mass ratio of 1:8, into different heating zones, and setting temperatures to 500° C. and 250° C. respectively; introducing a mixed gas of hydrogen and argon with a flow rate of 200 sccm, wherein a ratio of argon to hydrogen is 9:1; wherein a laser power is 100 W, and a laser beam wavelength is 1 μm; adjusting the diameter of the apertures, the hole spacing of the apertures, and the distance between the apertures and the silicon nanopillar array structure in the laser interference system, so as to ensure that an interference light field is formed in an area where the silicon nano-array structure is located, wherein interference enhancement positions correspond to the silicon nanopillars and interference cancellation positions correspond to gaps between the silicon nanopillars; depositing after chemical compositions of the air flow in the reaction chamber reaches a stable state, and setting a deposition time to 10 minutes; after the deposition of the few-layer PtSe.sub.2 film, turning off laser and gas inlet valve, and taking out the sample after the sample is cooled to room temperature, so as to obtain the few-layer PtSe.sub.2/silicon nanopillar array structure.

(26) 5. Evenly coating PMMA on the graphene/copper foil with a homogenizer at 500 r/min for 6 s and 2000 r/min for 40 s, wherein a thickness of the PMMA is 150 to 450 nm; then baking on a constant temperature heating platform at 170° C. for 5 minutes (to make the PMMA solution more uniformly cover the copper foil) to obtain a PMMA/graphene/copper foil; polishing the uncoated surfaces with a sandpaper to remove the graphene that hinders the dissolution of the copper; putting the PMMA/graphene/copper foil in 80° C. 1 mol/L FeCl.sub.3 solution or (NH.sub.4)S.sub.2O.sub.8; after the copper substrate is completely dissolved, using a quartz plate to move the PMMA/graphene into deionized water and distilled water in sequence for cleaning; then moving it to a prepared structure and natural air drying, so as to obtain the PMMA/graphene/small-layer PtSe.sub.2/N-type silicon nanopillar array; wherein the graphene directly contacts with the few-layer PtSe.sub.2 without removing the PMMA.

(27) 6. Putting a gold target and the PMMA/graphene/few-layer PtSe.sub.2/N-type silicon nanopillar array into a vacuum chamber of a magnetron sputtering coating machine in sequence, turning on a mechanical pump and vacuuming to below 3 Pa, turning on a molecular pump and vacuuming to below 2×10.sup.−3 Pa, introducing argon and nitrogen, turning on glow discharge, setting process parameters, wherein a working pressure is 0.67 Pa, protective gas is Ar, a target base distance is 90 mm, a sputtering power is 100 w, and a sputtering time is 30 seconds to 1 minute; opening a vent valve to store normal pressure in the vacuum chamber, then raising a cover plate, and taking out the sample, wherein a thickness of the metal electrodes obtained is 150 to 200 nm; a bottom view of the obtained metal electrode is shown in FIG. 3. So far, the photodetector based on the few-layer PtSe.sub.2 and the silicon nanopillar array structure of the present invention has been prepared.

Embodiment 2

(28) 1. Cutting a copper foil (with a thickness of 25 μm and a purity of 99.99%) to a desired size, and then ultrasonically cleaning for 15 minutes with acetone and alcohol in sequence; processing with 20% dilute hydrochloric acid for 20 minutes, and finally ultrasonically cleaning in acetone, alcohol and ionized water for 10 minutes and drying surface moisture with a nitrogen gun; placing cleaned and dried copper foil in a constant temperature zone of a tube furnace; filling a sealed quartz tube with Ar gas with a flow rate of 1100 sccm and hydrogen with a flow rate of 20 sccm; heating the tube furnace to 1000° C. at a heating rate of 10° C./min, then setting the hydrogen flow rate to 100 sccm and preheating for 60 min, so that arrangement of copper atoms tended to be consistent while surface activity of the copper foil is increased, thereby promoting deposition of carbon atoms; then introducing C.sub.2H.sub.4 at a flow rate of 1 sccm for 60 s, 90 s and 120 s, and then introducing Ar gas and hydrogen until the copper foil is cooled to room temperature; shutting down the tube furnace to complete the preparation of the graphene film and obtain a graphene/copper foil.

(29) 2. Taking an N-type double-sided polished silicon wafer, and immersing in H.sub.2SO.sub.4/H.sub.2O.sub.2 (1:1) for 15 minutes, water-bathing in NH.sub.4OH/H.sub.2O.sub.2/H.sub.2O (1:1:4) at 75° C. for 4 to 5 minutes, and water-bathing in HCL/H.sub.2O.sub.2/H.sub.2O (1:1:4) at 75° C. for 3 to 4 minutes; after each of the above steps, washing with HF acid buffer solution for 3-5 minutes, and washing with deionized water several times; processing the cleaned silicon wafer with photolithography, which comprises specific steps of: spin-coating (i.e. stopping a homogenizer and adding negative photoresist, then increasing the rotation speed (4000 rpm), spinning to stretch photoresist and volatilizing solvent until a thickness of the photoresist covering surfaces of the silicon wafer is about 2 μm); soft-baking (i.e. heating a vacuum hot plate to 100° C., and baking the silicon wafer coated with the photoresist for 40 seconds); aligning and exposing (i.e. putting a photolithography mask and a sample in a photolithography machine, then aligning before step-wise exposure); post-baking (i.e. after the sample is photoetched, placing on the vacuum hot plate at 130° C. for 30 seconds); developing (i.e. developing the sample with xylene solution, and then cleaning with ethanol and trichloroethylene); and hard-baking (i.e. placing the developed sample on the vacuum hot plate at 100° C. for 120 seconds).

(30) 3. Using a British STS multiplex ICP high density reactive ion etching machine to etch the silicon wafer sample with the nanopillar array structure pattern obtained by photolithography, which comprises specific steps of: loading (i.e. opening LoadLock after the vacuum chamber is inflated, applying vacuum grease on a tray, and putting the silicon wafer into the tray with tweezers); vacuuming and selecting a heating mode (i.e. turning on a mechanical pump, setting a heating or cooling temperature, and waiting until temperature and vacuum reach set values); etching (i.e. setting program, wherein process parameters are: in one cycle, a time period for introducing etching gas SF.sub.6 is 4 s, a time period for introducing passivation gas C.sub.4F.sub.8 is 3 s; a coil power is 400 W, a plate power is 110 W, a flow rate of the etching gas SF.sub.6 is 13 cm.sup.3/min, and a flow rate of the passivation gas C.sub.4F.sub.8 is 13 cm.sup.3/min); taking out the silicon wafer (after etching, turning off the vacuum pump and opening the LoadLock to take out the sample); removing the remaining photoresist and the vacuum grease with acetone and alcohol, washing with deionized water and drying with nitrogen, thereby obtaining the silicon nanopillar array structure.

(31) 4. Putting the silicon nanopillar array structure into the reaction chamber of the laser interference enhanced induction chemical vapor deposition system, putting PtCl.sub.2 powder and Se powder, which have a mass ratio of 1:10, into different heating zones, and setting temperatures to 450° C. and 220° C. respectively; introducing a mixed gas of hydrogen and argon with a flow rate of 150 sccm, wherein a ratio of argon to hydrogen is 10:1; wherein a laser power is 100 W, and a laser beam wavelength is 1 μm; adjusting the diameter of the apertures, the hole spacing of the apertures, and the distance between the apertures and the silicon nanopillar array structure in the laser interference system, so as to ensure that an interference light field is formed in an area where the silicon nano-array structure is located, wherein interference enhancement positions correspond to the silicon nanopillars and interference cancellation positions correspond to gaps between the silicon nanopillars; depositing after chemical compositions of the air flow in the reaction chamber reaches a stable state, and setting a deposition time to 15 minutes; after the deposition of the few-layer PtSe.sub.2 film, turning off laser and gas inlet valve, and taking out the sample after the sample is cooled to room temperature, so as to obtain the few-layer PtSe.sub.2/silicon nanopillar array structure.

(32) 5. Evenly coating PMMA on the graphene/copper foil with a homogenizer at 600 r/min for 5 s and 4000 r/min for 20 s, wherein a thickness of the PMMA is 150 to 450 nm; then baking on a constant temperature heating platform at 100° C. for 120 s to complete solidifying the PMMA; then separating the graphene from the copper foil through electrochemical separation; preparing 0.05 mmol/L K.sub.2S.sub.2O.sub.8 aqueous solution as electrolyte; using a carbon rod as anode, and PMMA/graphene/copper foil as cathode, wherein a power supply is a 5V DC voltage source; immersing the carbon rods and the PMMA/graphene/copper foil in the electrolyte to be energized, and generating H.sub.2 bubbles at an interface between the graphene and the copper foil through electrolyzed water; separating the graphene film from the copper foil to obtain PMMA/graphene; using a quartz plate to move the PMMA/graphene into deionized water and distilled water in sequence for cleaning; then moving it to a prepared silicon nanopillar structure and drying on a 100° C. heating platform, so as to obtain the PMMA/graphene/small-layer PtSe.sub.2/N-type silicon nanopillar array; wherein the graphene directly contacts with the few-layer PtSe.sub.2 without removing the PMMA.

(33) 6. Using magnetron sputtering to plate metal electrodes, which comprises steps of: opening cooling water and vacuum chamber gas inlet valves; turning on a main power supply of the system, raising a vacuum chamber splash plate, and fixing a gold target on a magnetron target base; placing the PMMA/graphene/few-layer PtSe.sub.2/silicon nanopillar array structure on a corresponding substrate position, and setting a target base distance to 90 mm; lowering the vacuum chamber splash plate, closing the gas inlet valve, and turning on the mechanical pump; opening a manual angle valve to evacuating the main vacuum chamber with the mechanical pump; observing the thermal vacuum gauge; when a pressure drops below 3 Pa, starting the molecular pump and opening a solenoid valve, closing bypass angle valve, opening a baffle valve, and evacuating with the molecular pump; when the vacuum reaches 2×10.sup.−3 Pa, performing coating; introducing argon and nitrogen and adjusting the flow to 20 sccm; setting a sputtering time to 30 seconds to 1 minute; closing a gate valve appropriately to maintain the working pressure at about 0.67 Pa; turning on a DC power switch and preheating for 5 to 10 minutes; turning on DC The power supply, adjusting a potentiometer, and setting a sputtering power to 100 w to start glow discharge in the vacuum chamber; adjusting flowmeter, gate valve, and power supply to desired process parameters; then opening a vent valve to store normal pressure in the vacuum chamber, then raising a cover plate, and taking out the sample, wherein a thickness of the metal electrodes obtained is 150 to 200 nm.

(34) Referring to FIGS. 5 and 6, a principle for using the laser interference enhanced induction chemical vapor deposition to deposit the few-layer PtSe.sub.2 on the silicon nano-array structure is: when a laser beam passes through the regular-quadrilateral distributed apertures, according to the Fresnel principle, a new spherical wave will be formed each time when the laser beam passes through an aperture, so as to obtain multiple coherent laser beams with same frequency and light vector direction. Optical path differences will be generated when these coherent lights meet at different spatial positions. If the optical path difference is an integer multiple of the wavelength, the light intensity will be coherently enhanced; and if the optical path difference is an odd multiple of the half-wavelength, the light intensity will be coherently weakened. Different lattice-like array-distributed interference patterns can be obtained on the nano-array structure by changing the diameter of the apertures, the hole spacing of the apertures, and the distance between the apertures and the silicon nanopillar array structure. The pattern distribution can be adjusted so that the interference enhancement points are located on silicon nanopillars, and the interference cancellation points are located at the gaps between the silicon nanopillars. The Pt-containing gaseous compounds can absorb enough energy at the laser interference enhancement points, wherein Pt is reduced by hydrogen mixed in the transportation gas, and then chemically reacts with selenium. The generated PtSe.sub.2 is deposited on the surface of the silicon nano-array structure to form a film, so that the few-layer PtSe.sub.2 completely covers the surfaces of the silicon nanopillars including the sidewalls of the silicon nanopillars.

(35) The above embodiments are only two typical implementations of the photodetector based on the graphene and the nanopillar array structure as described in the present invention. However, implementing of the present invention are not limited by the embodiments. Changes, modifications, substitutions, combinations, and simplifications that deviate from the spirit and principle of the present invention should be equivalent replacement methods, and are all included in the protection scope of the present invention.