SYSTEMS AND METHODS FOR COMMON MODE REJECTION (CMR) FILTERING IN A SUBSTRATE
20250358022 · 2025-11-20
Assignee
Inventors
Cpc classification
H04B10/65
ELECTRICITY
H04B15/02
ELECTRICITY
International classification
H04B15/02
ELECTRICITY
Abstract
Aspects of the subject disclosure may include, for example, a substrate, comprising a first layer, a second layer, and an intermediary layer between the first layer and the second layer, a first pair of traces positioned in the first layer, a second pair of traces positioned in the second layer, and a jumper configuration at least partially defined in the intermediary layer, wherein the jumper configuration comprises a pair of vias that are configured for coupling the first pair of traces and the second pair of traces and for providing common mode rejection (CMR) filtering between first signals on the first pair of traces and second signals on the second pair of traces. Other embodiments are disclosed.
Claims
1. A substrate, comprising: a first layer, a second layer, and an intermediary layer between the first layer and the second layer; a first pair of traces positioned in the first layer; a second pair of traces positioned in the second layer; and a jumper configuration at least partially defined in the intermediary layer, wherein the jumper configuration comprises a pair of vias that are configured for coupling the first pair of traces and the second pair of traces and for providing common mode rejection (CMR) filtering between first signals on the first pair of traces and second signals on the second pair of traces.
2. The substrate of claim 1, wherein the substrate comprises a flexible printed circuit (FPC), a ceramic substrate, a high-density build-up (HDBU) substrate, or a substrate-like printed circuit board (PCB) (SLP).
3. The substrate of claim 1, wherein the first pair of traces, the second pair of traces, and the pair of vias are electrically conductive.
4. The substrate of claim 3, wherein the pair of vias is at least partially formed using lithography and plating techniques.
5. The substrate of claim 3, wherein the pair of vias is at least partially formed using mechanical drilling and plating techniques.
6. The substrate of claim 1, wherein one or more dimensions associated with the pair of vias are selected such that a desired amount of the CMR filtering is provided between the first signals and the second signals.
7. The substrate of claim 6, wherein the one or more dimensions include a length of each via in the pair of vias, a diameter of each via in the pair of vias, or a combination thereof.
8. The substrate of claim 1, wherein the first signals are fed from a transmitter (Tx) application specific integrated circuit (ASIC), and wherein the second signals are fed to a coherent driver modulator (CDM).
9. The substrate of claim 1, wherein the first signals are fed from an intradyne coherent receiver (ICR) or a micro-ICR (ICR), and wherein the second signals are fed to a receiver (Rx) application specific integrated circuit (ASIC).
10. The substrate of claim 1, wherein the first pair of traces and the second pair of traces correspond to a pair of differential signals.
11. The substrate of claim 1, wherein the intermediary layer is at least partially composed of dielectric material.
12. The substrate of claim 1, further comprising: a third pair of traces positioned in the first layer; and an additional jumper configuration at least partially defined in the intermediary layer and arranged in a cascaded manner with respect to the jumper configuration, wherein the additional jumper configuration comprises a second pair of vias that are configured for coupling the second pair of traces and the third pair of traces and for providing further CMR filtering between the second signals and third signals on the third pair of traces.
13. The substrate of claim 1, wherein each of the first pair of traces and the second pair of traces is surrounded by a respective anti-pad.
14. The substrate of claim 13, wherein one or more of a shape and a dimension of each respective anti-pad are selected to provide differential impedance matching.
15. An apparatus, comprising: first and second components of a communications system; and a substrate that interconnects the first and second components, the substrate having a first layer, a second layer, and an intermediary layer between the first layer and the second layer, a first pair of traces positioned in the first layer, a second pair of traces positioned in the second layer, a third pair of traces positioned in the first layer, and a jumper configuration at least partially defined in the intermediary layer, wherein the jumper configuration comprises a first pair of vias for coupling the first pair of traces and the second pair of traces and a second pair of vias for coupling the second pair of traces and the third pair of traces.
16. The apparatus of claim 15, wherein the substrate comprises a flexible printed circuit (FPC), a ceramic substrate, a high-density build-up (HDBU) substrate, or a substrate-like printed circuit board (PCB) (SLP).
17. The apparatus of claim 15, wherein the first and second pairs of vias are at least partially formed using lithography and plating techniques.
18. The apparatus of claim 15, wherein the first and second pairs of vias are at least partially formed using mechanical drilling and plating techniques.
19. The apparatus of claim 15, wherein the intermediary layer is at least partially composed of dielectric material.
20. A method, comprising: identifying a portion of an intermediary layer of a substrate for implementing a jumper configuration, wherein the intermediary layer is disposed between a first layer of the substrate and a second layer of the substrate, wherein a first pair of traces is positioned in the first layer, and wherein a second pair of traces is positioned in the second layer; and at least partially defining the jumper configuration in the portion of the intermediary layer, wherein the jumper configuration comprises a pair of vias for coupling the first pair of traces and the second pair of traces and for providing common mode rejection (CMR) filtering between first signals on the first pair of traces and second signals on the second pair of traces.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0003] Reference will now be made to the accompanying drawings, which are not necessarily drawn to scale, and wherein:
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DETAILED DESCRIPTION
[0023] Common mode noise is noise that is common to a differential pair of signals/lines, and can negatively impact device performance. Sources of common mode noise include radio frequency (RF) noise from circuitry, switch mode power supplies, high-frequency signal switching, and so on. The ability of a system to reduce common mode noise is characterized by the ratio between the differential mode gain and the common mode gaini.e., the common mode rejection ratio (CMRR). A given flex in an optical device or package may be designed to incorporate a mixture or hybrid of traces, such as single-ended lines and differential lines, which can help to mitigate common mode noise. Different types of transitions can also be implemented between a flex and an associated carrier (e.g., an Indium Phosphide (InP) CDM high-temperature co-fired ceramic (HTCC) package, an optical receiver on a substrate-like printed circuit board (PCB) (SLP), etc.) to address common mode noise. However, the common mode noise reduction capabilities of these techniques is generally limited. For instance, common mode noise reduction from the use of different types of flex-to-carrier transitions is bandwidth limited.
[0024] The subject disclosure describes, among other things, illustrative embodiments of a jumper (or jumper pair) configuration in a substrate, such as a flex, that facilitates signal transitions across different layers of a substrate, and more particularly, coupling of different sets of differential traces that are in different layers of the substrate. Implementation of the jumper configuration advantageously provides millimeter wave common mode rejection filtering. For instance, a particular jumper pair implementation was found to provide about 3 decibels (dB) of CMRR improvement. In one or more embodiments, multiple jumper pairs (e.g., two or more jumper pairs) may be arranged in a cascaded manner across the flex and coupled with corresponding trace pairs (or bridge traces) to provide additional CMRR improvement. For example, certain jumper pairs arranged in a cascaded manner were found to provide even greater CMR filtering magnitudese.g., at least 5 dB to 6 dB of CMRR improvement per jumper pair. Details of the various embodiments are described in more detail below.
[0025] While various embodiments of the jumper configuration are described herein as being implemented in a flex, it is to be understood and appreciated that the jumper configuration may also be implemented in other materials or structures, such as ceramic substrates, high-density build-up (HDBU) substrates, SLPs, etc. to provide CMRR improvement.
[0026] Further, while various embodiments of the jumper configuration are described herein as being implemented in a flex that interconnects particular optical communications components (such as a Tx ASIC and CDM or an Rx ASIC and ICR/ICR), it is to be understood and appreciated that the jumper configuration may be utilized in a variety of applications, such as, for instance, transceiver applications, intensity modulation/direct detection (IM/DD) applications (e.g., on-board optics (OBO), co-packaged optics (CPO), etc.), etc.
[0027] One or more aspects of the subject disclosure include a substrate. The substrate may include a first layer, a second layer, and an intermediary layer between the first layer and the second layer. The substrate may further include a first pair of traces positioned in the first layer. The substrate may further include a second pair of traces positioned in the second layer. The substrate may further include a jumper configuration at least partially defined in the intermediary layer, wherein the jumper configuration comprises a pair of vias that are configured for coupling the first pair of traces and the second pair of traces and for providing common mode rejection (CMR) filtering between first signals on the first pair of traces and second signals on the second pair of traces.
[0028] One or more aspects of the subject disclosure include an apparatus. The apparatus may include first and second components of an optical communications system. The apparatus may further include a substrate that interconnects the first and second components, the substrate having a first layer, a second layer, and an intermediary layer between the first layer and the second layer, a first pair of traces positioned in the first layer, a second pair of traces positioned in the second layer, and a jumper configuration at least partially defined in the intermediary layer, wherein the jumper configuration comprises a pair of vias for coupling the first pair of traces and the second pair of traces and for providing common mode rejection (CMR) filtering between first signals on the first pair of traces and second signals on the second pair of traces.
[0029] One or more aspects of the subject disclosure include a method. The method may include identifying a portion of an intermediary layer of a substrate for implementing a jumper configuration, wherein the intermediary layer is disposed between a first layer of the substrate and a second layer of the substrate, wherein a first pair of traces is positioned in the first layer, and wherein a second pair of traces is positioned in the second layer. The method may further include at least partially defining the jumper configuration in the portion of the intermediary layer, wherein the jumper configuration comprises a pair of vias for coupling the first pair of traces and the second pair of traces and for providing common mode rejection (CMR) filtering between first signals on the first pair of traces and second signals on the second pair of traces.
[0030]
[0031] The high-speed CDM and the Tx ASIC may be included as part of an optical transmitter of a communication network that is in communication with at least one optical receiver. The optical transmitter may be capable of transmitting signals to the at least one optical receiver over an optical communication channel (e.g., one or more links, where each link may include one or more spans, and where each span may include a length of optical fiber and one or more optical amplifiers). In some embodiments, the optical transmitter may also be capable of receiving signals and/or the optical receiver(s) may also be capable of transmitting signals. Thus, the optical transmitter and/or the optical receiver(s) may each be capable of acting as a transceiver. In one or more embodiments, the optical transmitter and/or the optical receiver(s) may each be a coherent modem. In exemplary embodiments, the high-speed CDM may include a combination of optical and electrical components, such as, for example, a driver and one or more modulators and/or one or more other components of the optical transmitter, such as laser source(s), a modulator bias controller, a Tx controller, and/or the like. In various embodiments, the high-speed CDM may employ nested Mach-Zehnder (MZ) architecture(s) i.e., two dual-parallel MZs (DPMZs), each with two inner MZs and one outer MZresulting in a quad parallel MZ (QPMZ) modulator. In some embodiments, the high-speed CDM may be a thin-film Lithium Niobate (TFLN)-based modulator. In other embodiments, the high-speed CDM may be based on one or more other suitable materials/technologies. In one or more embodiments, the optical transmitter may be equipped to control four quadrature data signals via the Tx ASIC (i.e., radio frequency (RF) XI, RF XQ, RF YI, RF YQ signals, where X, Y denote polarization and I, Q denote in-phase and quadrature, respectively). For instance, the high-speed CDM may include an XI modulator, an XQ modulator, and an outer phase modulator (respectively functioning as two inner MZs nested within an outer MZ for the X polarization) as well as a YI modulator, a YQ modulator, and an outer phase modulator (respectively functioning as two inner MZs nested within an outer MZ for the Y polarization). The laser source(s) may provide laser output(s) for modulation by the modulators of the high-speed CDM. A laser output may be divided (e.g., via a beam splitter) into X and Y polarizations, where the X polarization may be further divided (e.g., via another beam splitter) into an optical I input that is fed into an X-pol I-arm (i.e., the XI modulator) and an optical Q input that is fed into an X-pol Q-arm (i.e., the XQ modulator), and where the Y polarization may be further divided (e.g., via yet another beam splitter) into an optical I input that is fed into a Y-pol I-arm (i.e., the YI modulator) and an optical Q input that is fed into a Y-pol Q-arm (i.e., the YQ modulator). The high-speed CDM may be capable of independently generating orthogonal optical electric field components (I channel and Q channel) for each polarization X and Y, according to various types of multi-value modulation methods, such as N-quadrature amplitude modulation (QAM), differential quadrature phase shift keying (D-QPSK), etc.
[0032] In general operation, the Tx ASIC may receive a digital information stream at a digital input and convert the digital information stream (based on an associated modulation scheme) for driving the modulators of the high-speed CDM via analog outputs (RF XI, RF XQ, RF YI, RF YQ). The analog outputs may be communicatively coupled to the modulator via the flex 120. In some embodiments, the Tx ASIC may include a digital filter that provides a transfer function H on the received digital input. DAC(s) may be connected to an output of the digital filter. Output(s) of the DAC(s) may be connected to the driver of the high-speed CDM (which may include an analog amplifier and/or various other components) via the electrically conductive traces of the flex 120 to provide a gain G. Output(s) of the driver may provide the analog output(s) to the modulators of the high-speed CDM. In certain embodiments, a controller may be connected to the digital filter and the driver to control the transfer function H and/or the gain G responsive to a data inversion control signal from a Tx controller.
[0033] In the receiver implementation, the ICR/ICR may be configured to receive an optical signal, which may comprise a degraded version of an optical signal generated by a transmitter device (e.g., the Tx ASIC and CDM shown by reference number 102). The optical signal generated by the transmitter device may be representative of information bits (also referred to as client bits) which are to be communicated to the receiver. The optical signal generated by the transmitter device may be representative of a stream of symbols. According to some examples, the transmitter device may be configured to apply forward error correction (FEC) encoding to the client bits to generate FEC-encoded bits, which may then be mapped to one or more streams of data symbols. The optical signal transmitted by the transmitter device may be generated using any of a variety of techniques, such as frequency division multiplexing (FDM), polarization-division multiplexing (PDM), single polarization modulation, modulation of an unpolarized carrier, mode-division multiplexing, spatial-division multiplexing, Stokes-space modulation, polarization balanced modulation, wavelength division multiplexing (WDM) (where a plurality of data streams is transmitted in parallel, over a respective plurality of carriers, and where each carrier is generated by a different laser), and/or the like. The overall receiver may be configured to recover corrected client bits from the received optical signal. The ICR/ICR may include a polarizing beam splitter configured to split the received optical signal into polarized components. According to one example implementation, the polarized components may include orthogonally polarized components corresponding to an X polarization and a Y polarization. An optical hybrid may be configured to process the polarized components with respect to an optical signal produced by a laser, thereby resulting in output optical signals. Photodetectors may be configured to convert the optical signals output by the optical hybrid to analog electrical signals. In some embodiments, various components, such as transimpedance amplifier(s) (TIA(s)), a photonic integrated circuit (PIC) (such as a silicon photonics (SiPhot) coherent receiver chip with high-speed photodiodes) may be implemented in an electronic integrated circuit (EIC) that converts optical signals into analog electrical signals. In any case, the frequency difference between the Rx laser and the Tx laser is the Intermediate Frequency, and an offset of that away from nominal can be called fIF. (The nominal difference is usually zero.) According to one example implementation, the analog electrical signals may include four signals corresponding, respectively, to the dimensions XI, XQ, YI, and YQ. Together, elements such as the beam splitter, the laser, the optical hybrid, and the photodetectors may form a communication interface configured to receive optical signals from other devices in a communication network.
[0034] The Rx ASIC may include ADCs that are configured to sample the analog electrical signals and generate respective digital signals. In certain alternate embodiments, the ADCs or portions thereof may be separate from the ASIC. The ADCs may sample the analog electrical signals periodically at a sample rate that is based on a signal received from a voltage-controlled oscillator (VCO) at the receiver device. The ASIC may be configured to apply digital signal processing to the digital signals using a digital signal processing system. The digital signal processing system may be configured to perform equalization processing that is designed to compensate for a variety of channel impairments, such as CD, SOP rotation, mean PMD that determines the probability distribution which instantiates as differential group delay (DGD), PDL or PDG, and/or other effects. The digital signal processing system may further be configured to perform carrier recovery processing, which may include calculating an estimate of carrier frequency offset fIF (i.e., the difference between the frequency of the transmitter laser and the frequency of the receiver laser). According to some example implementations, the digital signal processing system may further be configured to perform operations such as multiple-input-multiple-output (MIMO) filtering, clock recovery, and FDM subcarrier de-multiplexing. The digital signal processing system may also be configured to perform symbol-to-bit demapping (or decoding) using a decision circuit, such that signals output by the digital signal processing system are representative of bit estimates. Where the received optical signal is representative of symbols comprising FEC-encoded bits generated as a result of applying FEC encoding to client bits, the signals output by the digital signal processing system may further undergo FEC decoding to recover the corrected client bits. The equalization processing implemented as part of the digital signal processing system may include one or more equalizers, some or all of which may be configured to compensate for impairments in the channel response. In general, an equalizer applies a substantially linear filter to an input signal to generate an output signal that is less degraded than the input signal. The filter may be characterized by compensation coefficients which may be incrementally updated from time to time (e.g., every so many clock cycles or every so many seconds) with the goal of reducing the degradation observed in the output signal.
[0035] The flex 120 may be a multi-layer, semi-rigid flex substrate construction. One or more portions of the flex 120 may be composed of one or more materials (e.g., liquid crystal polymer or other composite material, such as Pyralux TK or the like). The flexible section may be at least partially composed of a thin, flexible structural support material (e.g., 120r of
[0036] The flex 120 may include multiple pairs of differential traces, each pair of which may carry an analog electrical signal and a corresponding inverted signal. In particular, a first trace of one pair of differential traces may carry an XI signal and a second trace of that pair may carry an inversion of the XI signal, a first trace of another pair of differential traces may carry an XQ signal and a second trace of that pair may carry an inversion of the XQ signal, and so on for the YI and YQ signals. For instance, the top down view in
[0037] Depending on the particular implementation of the components that are to be interconnected by the flex 120 (e.g., whether the CDM is a flip-chip design or otherwise) and their relative positions (e.g., in height), there may be a desire to define traces in or proximate to a lower surface or layer of the flex 120 for one span of the flex 120 and to define traces in or proximate to an upper surface or layer of the flex 120 for another span of the flex 120. In exemplary embodiments, the flex 120 may, for a given pair of differential traces, include a jumper configuration (or a jumper pair) 150 that functions as an electrically conductive transition between such traces. See, for instance, the cross-sectional view in
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[0039] While there are signal vias in the overall CMR filter design, the differential mode IL SDD21 is nevertheless good (e.g., for up to 100 gigahertz (GHz)). It is to be understood and appreciated that the jumper configuration may be built or used for any type of lines to provide CMR filteringe.g., differential microstrip lines, coplanar lines, strip lines, and other transmission lines.
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[0041] As depicted in
[0042] In various embodiments, the jumpers 250a, 250b may be formed as vias (e.g., a micro via or the like). In some embodiments, the jumpers 250a, 250b may be formed or etched using lithography followed by hole plating and/or filling. For instance, the jumpers 250a, 250b may each be plated with electrically conductive material (e.g., copper, tungsten, aluminum, gold, and/or the like) (e.g., at a thickness of about 10 micrometers (m)) and/or partially or fully filled with such electrically conductive material, such that the traces 221t, 222t become electrically coupled to the traces 221b, 222b by way of the jumpers 250a, 250b. It is to be understood and appreciated that for a substrate other than a flex (e.g., a ceramic substrate), other techniques, such as mechanical drilling or the like, may additionally, or alternatively, be used to form the jumper pair.
[0043] The length and/or the diameter of (e.g., each of) the jumpers 250a, 250b may be defined or selected to achieve certain (e.g., optimal) CMRR improvement. For instance, in one or more implementations, the length of (e.g., each of) the jumpers 250a, 250b may be about 100 m (e.g., which may correspond to a thickness of a core like the core 120r described above with respect to
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[0045] As depicted in
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[0047] In certain embodiments, additional cascaded jumper configurations may be implemented along differential traces (e.g., repeated along other spans of the differential traces) to further improve CMRR. In these embodiments, various parameters of each additional cascaded jumper configuration, such as, for instance, the pan of one or more of bridge traces, the width of one or more bridge traces, the length of one or more jumpers, and/or the diameter of one or more jumpers may be adjusted to achieve a desired (e.g., optimal) CMRR improvement.
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[0049] As depicted in
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[0052] As depicted in
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[0054] In scenarios where individual jumper configurations are implemented for different differential trace pairse.g., a first jumper configuration for the differential traces for XI and inverted XI, a second jumper configuration for the differential traces for XQ and inverted XQ, a third jumper configuration for the differential traces for YI and inverted YI, and a fourth jumper configuration for the differential traces for YQ and inverted YQtwo or more of the jumper configurations may be positioned directly adjacent to one another, such as in-line with one another along the y-direction in
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[0060] At 902, the method may include identifying a portion of an intermediary layer of a substrate for implementing a jumper configuration, wherein the intermediary layer is disposed between a first layer of the substrate and a second layer of the substrate, wherein a first pair of traces is positioned in the first layer, and wherein a second pair of traces is positioned in the second layer. For instance, the method may include identifying a portion of an intermediary layer of a substrate for implementing a jumper configuration similar to that described above with respect to one or more embodiments. As an example, a portion of a core/dielectric layer may be identified as being suitable for implementing a jumper pair, where the identification may be made based on one or more criteria, such as a desired jumper pair arrangement pattern (
[0061] At 904, the method may include at least partially defining the jumper configuration in the portion of the intermediary layer, wherein the jumper configuration comprises a pair of vias for coupling the first pair of traces and the second pair of traces and for providing common mode rejection (CMR) filtering between first signals on the first pair of traces and second signals on the second pair of traces. For instance, the method may include at least partially defining the jumper configuration in the portion of the intermediary layer similar to that described above with respect to one or more embodiments. For example, the pair of vias may be formed using lithography/mechanical drilling techniques and plated and/or filled with conductive material, such that pairs of input traces of a differential pair and output traces of the differential pair, in different layers of the substrate, are electrically coupled to one another and such that the jumper configuration functions as a CMR filter between signals on those pairs of traces. As should be understood based on the description above with regard to various embodiments of the jumper configuration, bridge traces and anti-pads may also be correspondingly defined (with selected dimension(s)/shape(s)) to arrive at cascaded jumper pair arrangements that provide enhanced CMR filtering.
[0062] While for purposes of simplicity of explanation, the respective processes are shown and described as a series of blocks in
[0063] What has been described above includes mere examples of various embodiments. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing these examples, but one of ordinary skill in the art can recognize that many further combinations and permutations of the present embodiments are possible. Accordingly, the embodiments disclosed and/or claimed herein are intended to embrace all such alterations, modifications and variations that fall within the spirit and scope of the appended claims. Furthermore, to the extent that the term includes is used in either the detailed description or the claims, such term is intended to be inclusive in a manner similar to the term comprising as comprising is interpreted when employed as a transitional word in a claim.
[0064] Computing devices typically comprise a variety of media, which can comprise computer-readable storage media and/or communications media, which two terms are used herein differently from one another as follows. Computer-readable storage media can be any available storage media that can be accessed by the computer and comprises both volatile and nonvolatile media, removable and non-removable media. By way of example, and not limitation, computer-readable storage media can be implemented in connection with any method or technology for storage of information such as computer-readable instructions, program modules, structured data or unstructured data. Computer-readable storage media can comprise the widest variety of storage media including tangible and/or non-transitory media which can be used to store desired information. In this regard, the terms tangible or non-transitory herein as applied to storage, memory or computer-readable media, are to be understood to exclude only propagating transitory signals per se as modifiers and do not relinquish rights to all standard storage, memory or computer-readable media that are not only propagating transitory signals per se.
[0065] In addition, a flow diagram may include a start and/or continue indication. The start and continue indications reflect that the steps presented can optionally be incorporated in or otherwise used in conjunction with other routines. In this context, start indicates the beginning of the first step presented and may be preceded by other activities not specifically shown. Further, the continue indication reflects that the steps presented may be performed multiple times and/or may be succeeded by other activities not specifically shown. Further, while a flow diagram indicates a particular ordering of steps, other orderings are likewise possible provided that the principles of causality are maintained.
[0066] As may also be used herein, the term(s) operably coupled to, coupled to, and/or coupling includes direct coupling between items and/or indirect coupling between items via one or more intervening items. Such items and intervening items include, but are not limited to, junctions, communication paths, components, circuit elements, circuits, functional blocks, and/or devices. As an example of indirect coupling, a signal conveyed from a first item to a second item may be modified by one or more intervening items by modifying the form, nature or format of information in a signal, while one or more elements of the information in the signal are nevertheless conveyed in a manner than can be recognized by the second item. In a further example of indirect coupling, an action in a first item can cause a reaction on the second item, as a result of actions and/or reactions in one or more intervening items.
[0067] Although specific embodiments have been illustrated and described herein, it should be appreciated that any arrangement which achieves the same or similar purpose may be substituted for the embodiments described or shown by the subject disclosure. The subject disclosure is intended to cover any and all adaptations or variations of various embodiments. Combinations of the above embodiments, and other embodiments not specifically described herein, can be used in the subject disclosure. For instance, one or more features from one or more embodiments can be combined with one or more features of one or more other embodiments. In one or more embodiments, features that are positively recited can also be negatively recited and excluded from the embodiment with or without replacement by another structural and/or functional feature. The steps or functions described with respect to the embodiments of the subject disclosure can be performed in any order. The steps or functions described with respect to the embodiments of the subject disclosure can be performed alone or in combination with other steps or functions of the subject disclosure, as well as from other embodiments or from other steps that have not been described in the subject disclosure. Further, more than or less than all of the features described with respect to an embodiment can also be utilized. It is also to be understood and appreciated that the subject matter in one or more dependent claims may be combined with that in one or more other dependent claims.