SILICON ULTRAVIOLET PHOTODIODE AND MANUFACTURING METHOD THEREOF

20250359356 ยท 2025-11-20

    Inventors

    Cpc classification

    International classification

    Abstract

    The present invention provides a silicon ultraviolet photodiode and a manufacturing method thereof. The silicon ultraviolet photodiode includes: an N-type region formed beneath and in contact with an upper surface of a silicon substrate; a P+ region formed beneath and in contact with the N-type region; a deep N-well region formed beneath and in contact with the P+ region; and an N-type conductive channel, which is connected to the deep N-well region, and is configured to operably drain a non-ultraviolet current caused by electron-hole pairs formed in the deep N-well region; wherein a depth of the N-type region is controlled to a predetermined depth to enhance an ultraviolet sensitivity by compensating N-type dopant impurities of an N-type implantation region by out-diffused P-type dopant impurities of a P+ implantation region through a thermal process step.

    Claims

    1. A silicon ultraviolet photodiode, configured to operably sense an ultraviolet light of an incident light irradiating onto the silicon ultraviolet photodiode, the silicon ultraviolet photodiode comprising: an N-type region formed beneath and in contact with an upper surface of a silicon substrate; a P+ region formed beneath and in contact with the N-type region; a deep N-well region formed beneath and in contact with the P+ region; and an N-type conductive channel, which is connected to the deep N-well region, and is configured to operably drain a non-ultraviolet current caused by electron-hole pairs generated by the incident light; wherein a depth of the N-type region is controlled to a predetermined depth to enhance an ultraviolet sensitivity by compensating N-type dopant impurities of an N-type implantation region by out-diffused P-type dopant impurities of a P+ implantation region through a thermal process step.

    2. The silicon ultraviolet photodiode of claim 1, further comprising an ultraviolet contact plug, which is formed on the upper surface and in contact with the N-type region, wherein the ultraviolet contact plug is configured to operably collect an ultraviolet current caused by electron-hole pairs generated by the incident light.

    3. The silicon ultraviolet photodiode of claim 1, wherein the N-type region is configured to operably receive a UVA light with a wave length not larger than 400 nm and not less than 320 nm, a UVB light with a wave length less than 320 nm and not less than 280 nm, and/or a UVC light with a wave length less than 280 nm and not less than 100 nm.

    4. The silicon ultraviolet photodiode of claim 1, wherein the predetermined depth is less than 10 nm.

    5. The silicon ultraviolet photodiode of claim 1, wherein the silicon ultraviolet photodiode does not comprise a filter for filtering out a visible signal and/or an IR signal.

    6. The silicon ultraviolet photodiode of claim 1, wherein the N-type implantation region is formed beneath and in contact with an upper surface of the silicon substrate; wherein the P+ implantation region is formed above the deep N-well region and below the N-type implantation region; wherein the N-type region and the P+ region are formed by performing the thermal process step to form the N-type region and the P+ region.

    7. The silicon ultraviolet photodiode of claim 2, wherein a first PN junction is formed between the N-type region and the P+ region to sense the ultraviolet current; wherein a second PN junction is formed between the P+ region and the deep N-well region to sense the non-ultraviolet current.

    8. A manufacturing method of a silicon ultraviolet photodiode, wherein the silicon ultraviolet photodiode is configured to operably sense an ultraviolet light of an incident light irradiating onto the silicon ultraviolet photodiode, the manufacturing method comprising: providing a silicon substrate; forming a deep N-well region in the silicon substrate; forming an N-type implantation region beneath and in contact with an upper surface of the silicon substrate; forming a P+ implantation region above the deep N-well region and below the N-type implantation region; performing a thermal process step to out-diffuse P-type dopant impurities of the P+ implantation region to compensate N-type dopant impurities of the N-type implantation region to form an N-type region and a P+ region, so as to control a depth of the N-type region to a predetermined depth to enhance an ultraviolet sensitivity; and forming an N-type conductive channel, which is connected to the deep N-well region, and is configured to operably drain a non-ultraviolet current caused by electron-hole pairs generated by the incident light; wherein the N-type region is beneath and in contact with an upper surface of the silicon substrate; wherein the P+ region is beneath and in contact with the N-type region; wherein the deep N-well region is beneath and in contact with the P+ region.

    9. The manufacturing method of claim 8, further comprising forming an ultraviolet contact plug on the upper surface and in contact with the N-type region, wherein the ultraviolet contact plug is configured to operably collect an ultraviolet current caused by electron-hole pairs generated by the incident light.

    10. The manufacturing method of claim 8, wherein the N-type region is configured to operably receive a UVA light with a wave length not larger than 400 nm and not less than 320 nm, a UVB light with a wave length less than 320 nm and not less than 280 nm, and/or a UVC light with a wave length less than 280 nm and not less than 100 nm.

    11. The manufacturing method of claim 8, wherein the predetermined depth is less than 10 nm.

    12. The manufacturing method of claim 8, wherein the silicon ultraviolet photodiode does not comprise a filter for filtering out a visible signal and/or an IR signal.

    13. The manufacturing method of claim 9, wherein a first PN junction is formed between the N-type region and the P+ region to sense the ultraviolet current; wherein a second PN junction is formed between the P+ region and the deep N-well region to sense the non-ultraviolet current.

    Description

    BRIEF DESCRIPTION OF THE DRAWINGS

    [0018] FIG. 1 shows a cross-sectional schematic diagram of a prior art silicon ultraviolet photodiode.

    [0019] FIG. 2 shows a cross-sectional schematic diagram of an embodiment of a silicon ultraviolet photodiode according to the present invention.

    [0020] FIGS. 3A-3H are schematic diagrams showing a manufacturing method of a silicon ultraviolet photodiode according to the present invention.

    DESCRIPTION OF THE PREFERRED EMBODIMENTS

    [0021] The drawings as referred to throughout the description of the present invention are for illustration only, to show the interrelations between the regions and the process steps, but not drawn according to actual scale.

    [0022] FIG. 2 shows a cross-sectional schematic diagram of a silicon ultraviolet photodiode according to one embodiment of the present invention. As shown in FIG. 2, a silicon ultraviolet photodiode 20 according to the present invention is configured to operably sense an ultraviolet light of an incident light LT1 irradiating onto the silicon ultraviolet photodiode 20. The silicon ultraviolet photodiode 20 includes: a deep N-well region 22, an N-type region 23, a P+ region 24 and an N-type conductive channel 25. The N-type region 23 is formed beneath and in contact with an upper surface 21 of a silicon substrate 21. The P+ region 24 is formed beneath and in contact with the N-type region 23. The deep N-well region 22 is formed beneath and in contact with the P+ region 24. The N-type conductive channel 25 is connected to the deep N-well region 22, and is configured to operably drain a non-ultraviolet current caused by electron-hole pairs generated by the incident light LT1. In this embodiment, a depth of the N-type region 23 is controlled to a predetermined depth to enhance an ultraviolet sensitivity by compensating N-type dopant impurities of an N-type implantation region by out-diffused P-type dopant impurities of a P+ implantation region through a thermal process step.

    [0023] Still referring to FIG. 2, the silicon ultraviolet photodiode 20 further comprises an ultraviolet contact plug V1, which is formed on the upper surface 21 and in contact with the N-type region 23, wherein the ultraviolet contact plug V1 is configured to operably collect an ultraviolet current caused by electron-hole pairs generated by the incident light LT1.

    [0024] In one embodiment, the N-type region 23 is configured to operably receive a UVA light with a wave length not larger than 400 nm and not less than 320 nm, a UVB light with a wave length less than 320 nm and not less than 280 nm, and/or a UVC light with a wave length less than 280 nm and not less than 100 nm.

    [0025] In one embodiment, he predetermined depth is less than 10 nm.

    [0026] In one embodiment, the silicon ultraviolet photodiode 20 does not comprise a filter for filtering out a visible signal and/or an IR signal. Note that, the visible signal and/or an IR signal indicates a light(s) with a wavelength larger than 400 nm. In this embodiment, the incident light LT1 is not filtered by the filter, and a transmission rate of UV light may be larger than 60%, resulting in an increased sensitivity of the silicon ultraviolet photodiode 20 to UV light.

    [0027] In one embodiment, the N-type implantation region is formed beneath and in contact with an upper surface 21 of the silicon substrate 21; wherein the P+ implantation region is formed above the deep N-well region and below the N-type implantation region; wherein the N-type region 23 and the P+ region 24 are formed by performing the thermal process step.

    [0028] In one embodiment, a first PN junction 27 is formed between the N-type region 23 and the P+ region 24 to sense the ultraviolet current; wherein a second PN junction 28 is formed between the P+ region 24 and the deep N-well region 22 to sense the non-ultraviolet current.

    [0029] According to the present invention, the predetermined depth is determined as the first PN junction 27 at a relatively shallower depth, which is a depth where electron-hole pairs are maximally generated by the UV light in the incident light LT1, resulting in the highest UV current. This enhances the sensitivity of the silicon ultraviolet photodiode 20 to UV light. For light in the incident light LT1 with wavelengths longer than UV light, which generates electron-hole pairs at deeper depths, a second PN junction 28 is arranged at a deeper depth. This allows the current generated by light with wavelengths exceeding that of UV light to be directed via the electrical connection to the N-pole of the second PN junction, i.e., the deep N-well region 22. This design differentiates a current generated by longer wavelengths from the UV current as separate electronic signals without the need for a filter on the upper surface 21 of the silicon substrate 21 to reduce the transmission rate of UV light, thus improving the sensitivity of the silicon ultraviolet photodiode 20 to UV light. In other words, according to the present invention, PN junctions at different depths can be designed to target light of specific wavelengths, thereby distinguishing the light to be measured from other lights with different wavelengths.

    [0030] Still referring to FIG. 2, the N-type region 23 and the P+ region 24 in the silicon ultraviolet photodiode 20 are formed through a thermal process step. The thermal process step aims to control the depth of the N-type region 23 to a predetermined depth by compensating for N-type dopant impurities of an N-type implantation region with out-diffused P-type dopant impurities from a P+ implantation region. This design results in the first PN junction 27 located at a relatively shallow depth and enhances ultraviolet sensitivity, enabling more effective guidance and collection of UV light induced current when the incident light LT1 irradiates onto the silicon ultraviolet photodiode 20. Additionally, this design also helps to improve the overall efficiency and sensitivity of the silicon ultraviolet photodiode 20, especially under high ultraviolet light intensity.

    [0031] Furthermore, the silicon ultraviolet photodiode 20 may not comprise a filter to filter out visible and/or infrared lights, or in other words, a light with a wave length larger than 400 nm. The present invention allows the photodiode to focus on detecting within the ultraviolet range, avoiding performance degradation due to interference from visible light or infrared rays. This makes the silicon ultraviolet photodiode 20 perform better in applications requiring high ultraviolet sensitivity and specificity, such as in scientific research, medical diagnostics, and industrial testing.

    [0032] FIGS. 3A-3H are schematic diagrams showing a manufacturing method of the silicon ultraviolet photodiode 20 according to the present invention.

    [0033] First, as shown in FIG. 3A, a silicon substrate 21 is provided. In one embodiment, the silicon substrate 21 is a P-type silicon substrate.

    [0034] Next, as shown in FIG. 3B, for example, insulation regions 26 and the deep N-well region 22 are formed in the silicon substrate 21. The insulation region 26 is configured to operably electrically isolate corresponding regions in the silicon substrate 21, and is for example but not limited to a shallow trench isolation (STI) structure as shown in FIG. 3B. The deep N-well region 22 for example is formed by an ion implantation process step, and is located beneath the insulation regions 26.

    [0035] Then, as shown in FIG. 3C, an N-type implantation region 23a beneath and in contact with the upper surface 21 of the silicon substrate 21 is formed. The N-type implantation region 23a can be formed by steps including, for example but not limited to, a lithography process and an ion implantation step, wherein the lithography process includes forming a photo-resist layer as a mask and the ion implantation step dopes N-type conductivity type impurities into the silicon substrate 21, to form the N-type implantation region 23a.

    [0036] Then, as shown in FIG. 3D, a P+ implantation region 24a above the deep N-well region 22 and below the N-type implantation region 23a is formed. The P+ implantation region 24a can be formed by steps including, for example but not limited to, a lithography process and an ion implantation step, wherein the lithography process includes forming a photo-resist layer as a mask and the ion implantation step dopes P-type conductivity type impurities into the silicon substrate 21, to form the P+ implantation region 24a, wherein the lithography process can be the same lithography process as the lithography process of the N-type implantation region 23a, i.e., the N-type implantation region 23a and the P+ implantation region 24a may share the same lithography process.

    [0037] Then, as shown in FIG. 3E, a thermal process step is performed to out-diffuse P-type dopant impurities of the P+ implantation region 24a to compensate N-type dopant impurities of the N-type implantation region 23a to form the N-type region 23 and the P+ region 24, so as to control the depth of the N-type region 23 to a predetermined depth to enhance the ultraviolet sensitivity. The N-type region 23 is beneath and in contact with the upper surface 21 of the silicon substrate 21. The P+ region 24 is beneath and in contact with the N-type region 23. The deep N-well region 22 is beneath and in contact with the P+ region 24.

    [0038] Then, as shown in FIG. 3F, the N-type conductive channel 25 is formed. The N-type conductive channel 25 is connected to the deep N-well region 22, and is configured to operably drain a non-ultraviolet current caused by electron-hole pairs generated by the incident light LT1. The insulation regions 26 electrically isolates the N-type conductive channel 25 from the P+ region 24 and the N-type region 23 in the silicon substrate 21.

    [0039] Then, as shown in FIG. 3G, gates 31 are formed on the upper surface 21 of the silicon substrate 21 outside a range of the silicon ultraviolet photodiode 20.

    [0040] Then, as shown in FIG. 3H, the ultraviolet contact plug V1 is formed on the upper surface 21 and in contact with the N-type region 23, wherein the ultraviolet contact plug V1 is configured to operably collect the ultraviolet current caused by electron-hole pairs generated by the incident light LT1. As shown in FIG. 3H, a non-ultraviolet contact plug V2 is formed on the upper surface 21 and in contact with the N-type conductive channel 25, wherein the non-ultraviolet contact plug V2 is configured to operably collect the non-ultraviolet current caused by electron-hole pairs generated by the incident light LT1. As shown in FIG. 3H, a contact plug V is formed on the upper surface 21 and in contact with one of the gates 31. As shown in FIG. 3H, dielectric layers IDLs and metal lines M1s are formed. The dielectric layers IDLs and metal lines M1s are well known to those skilled in this art and therefore details thereof are omitted here. The gates 31, the contact plug V indicate other circuits formed in the silicon substrate 21. Therefore, the silicon ultraviolet photodiode 20 can be manufactured in the same silicon substrate 21 with circuit elements.

    [0041] The present invention has been described in considerable detail having reference to certain preferred embodiments thereof. It should be understood that the description is for illustrative purpose, not for limiting the scope of the present invention. Those skilled in this art can readily conceive variations and modifications within the spirit of the present invention. For example, other process steps or structures which do not affect the primary characteristic of the device, such as a threshold voltage adjustment region, etc., can be added. In view of the foregoing, the spirit of the present invention should cover all such and other modifications and variations, which should be interpreted to fall within the scope of the following claims and their equivalents. An embodiment or a claim of the present invention does not need to achieve all the objectives or advantages of the present invention. The title and abstract are provided for assisting searches but not for limiting the scope of the present invention.