SYSTEMS AND METHODS FOR MEASURING WAVEFORMS AT DEVICES UNDER TEST
20250370030 ยท 2025-12-04
Inventors
Cpc classification
International classification
G01R13/02
PHYSICS
G01R31/08
PHYSICS
Abstract
Methods, systems, and computer readable media for measuring voltage and current waveforms at devices under test. An example method includes outputting an electrical signal from a signal generator of a measurement instrument; measuring a first voltage at an input to an output resistance of the measurement instrument; measuring a second voltage at an output of the output resistance of the measurement instrument; and determining a test measurement voltage at a device under test (DUT) electrically connected to the measurement instrument using the first voltage, the second voltage, and a propagation delay of a transmission line electrically connecting the measurement instrument to the DUT.
Claims
1. A method comprising: outputting an electrical signal from a signal generator of a measurement instrument; measuring a first voltage at an input to an output resistance of the measurement instrument; measuring a second voltage at an output of the output resistance of the measurement instrument; and determining a test measurement voltage at a device under test (DUT) electrically connected to the measurement instrument using the first voltage, the second voltage, and a propagation delay of a transmission line electrically connecting the measurement instrument to the DUT.
2. The method of claim 1, wherein the DUT is a semiconductor device on a semiconductor wafer, and wherein the transmission line includes a coaxial cable.
3. The method of claim 1, wherein measuring the first voltage comprises using a first analog-to-digital converter (ADC) and wherein measuring the second voltage comprises using a second analog-to-digital converter.
4. The method of claim 1, wherein measuring the first voltage comprises: closing a first switch between an analog-to-digital converter (ADC) and the input to the output resistance; opening a second switch between the ADC and the output to the output resistance; and measuring the first voltage using the ADC.
5. The method of claim 4, wherein measuring the second voltage comprises: opening the first switch and closing the second switch; outputting the electrical signal a second time; and measuring the second voltage using the ADC.
6. The method of claim 1, comprising repeatedly outputting the electrical signal, adding an increasing time delay to each output of the electrical signal, and summing a plurality of waveforms captured at each time delay to determine a waveform at the DUT having a shorter sampling period than a configured sampling period of an analog-to-digital (ADC) converter used for measuring the first voltage and the second voltage.
7. The method of claim 1, comprising capturing first and second waveforms for the first and second voltages for a period of time greater than twice the propagation delay of the transmission line.
8. The method of claim 1, comprising measuring the propagation delay of the transmission line using an oscilloscope.
9. The method of claim 1, wherein measuring the first voltage or the second voltage or both comprises using an oscilloscope.
10. The method of claim 1, comprising measuring a differential signal at the DUT by measuring a third voltage at a second input to a second output resistance and a further voltage at a second output to a second output resistance and using a second propagation delay of a second transmission line.
11. A system comprising: a measurement instrument comprising a signal generator configured for outputting an electrical signal; and a controller configured for: measuring a first voltage at an input to an output resistance of the measurement instrument; measuring a second voltage at an output of the output resistance of the measurement instrument; and determining a test measurement voltage at a device under test (DUT) electrically connected to the measurement instrument using the first voltage, the second voltage, and a propagation delay of a transmission line electrically connecting the measurement instrument to the DUT.
12. The system of claim 11, wherein the DUT is a semiconductor device on a semiconductor wafer, and wherein the transmission line includes a coaxial cable.
13. The system of claim 11, wherein measuring the first voltage comprises using a first analog-to-digital converter (ADC) and wherein measuring the second voltage comprises using a second analog-to-digital converter.
14. The system of claim 11, wherein measuring the first voltage comprises: closing a first switch between an analog-to-digital converter (ADC) and the input to the output resistance; opening a second switch between the ADC and the output to the output resistance; and measuring the first voltage using the ADC.
15. The system of claim 14, wherein measuring the second voltage comprises: opening the first switch and closing the second switch; outputting the electrical signal a second time; and measuring the second voltage using the ADC.
16. The system of claim 11, wherein the controller is configured for repeatedly outputting the electrical signal, adding an increasing time delay to each output of the electrical signal, and summing a plurality of waveforms captured at each time delay to determine a waveform at the DUT having a shorter sampling period than a configured sampling period of an analog-to-digital (ADC) converter used for measuring the first voltage and the second voltage.
17. The system of claim 11, wherein the controller is configured for capturing first and second waveforms for the first and second voltages for a period of time greater than twice the propagation delay of the transmission line.
18. The system of claim 11, wherein the controller is configured for measuring the propagation delay of the transmission line using an oscilloscope.
19. The system of claim 11, wherein measuring the first voltage or the second voltage or both comprises using an oscilloscope.
20. The system of claim 11, wherein the controller is configured for measuring a differential signal at the DUT by measuring a third voltage at a second input to a second output resistance and a further voltage at a second output to a second output resistance and using a second propagation delay of a second transmission line.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The subject matter described herein will now be explained with reference to the accompanying drawings of which:
[0015]
[0016]
[0017]
[0018]
[0019]
[0020]
[0021]
DETAILED DESCRIPTION
[0022]
[0023] Here, we assume the following condition: Z.sub.s=Z.sub.0, Z.sub.0 in the transmission line between B and C is uniform, T.sub.d is known value, and the waveform at A and B can be observed.
[0024] In this transmission circuit, the incident wave from V.sub.s is reflected at C and back to V.sub.s. The load impedance of Z.sub.L terminating the line with the characteristic impedance of Z.sub.0 will have a reflection coefficient of .sub.c as follows:
[0025] The reflected wave back to V.sub.s is reflected again at B and then go to DUT. The reflection coefficient of .sub.B is:
[0026] If both .sub.B and .sub.C are not zero, the waves are reflecting alternately between the transmitting end and the receiving end. It is called multiple reflection. It this situation, the waveform at the DUT will be different from the source waveform.
[0027] We can set Z.sub.s=Z.sub.0 so that the .sub.B=0 and the multiple reflection does not occur. In this case, the standing wave at B can be represented by the incident wave from A and the reflected wave from DUT:
[0028] Similarly, the standing wave at C can be represented as follows:
[0029] Equation (3) and (4) are valid for any arbitrary time t. We can replace t with t-Ta in Equation (4). And then we can derive the following equation by subtracting Equation (4) from (3):
[0030] And we transform this equation, we derive:
[0031] Equation (6) indicates that the voltage waveform at the DUT can be represented by V.sub.s and V.sub.B with T.sub.d. It is easy to monitor V.sub.s and V.sub.B if they are located inside the measurement equipment. This invention utilizes the above theory to estimate the signal at the DUT from information obtained at easily observable measurement points.
[0032] The same method can be applied to calculate the current waveform. The current at B and C are:
[0033] Calculating the same way as mentioned earlier, we derive:
[0034] This indicates that the current waveform at the DUT can be represented by V.sub.s and V.sub.B with Ta and Z.sub.0.
[0035]
[0036] The measurement instrument has an output resistance 214, and current and/or voltage can be measured at the input to the output resistance 214 (point A) and the output to the output resistance 214 (point B). If the two ADCs 210 and 212 capture the voltage waveform at A and B simultaneously, the voltage and current waveform at the DUT 202 can be calculated using Equation (3). The ADCs 210 and 212 can be configured to capture the waveforms for more than 2T.sub.d to obtain a complete measurement.
[0037] The signal generator 206 can be constructed using any appropriate components, for example, using a D-to-A converter, a step voltage generator, or a voltage oscillator depending on the application. The ADCs 210 and 212 are configured to have sufficient time resolution and voltage range to capture the waveforms at A and B. The calculation of the voltage and current waveform at the DUT 202 can be performed by any appropriate computing system, for example, by central processing unit (CPU) or field programmable gate array (FPGA).
[0038]
[0039] In the system 300 of
[0040] Suppose that a controller controls the operation of the system 300. The controller may take the following actions in performing a test of the DUT 200: [0041] Cause the first switch SW1 to close and the second switch SW2 to open [0042] Control the signal generator 206 to generate a signal [0043] Measure, using the ADC 302, the responsive signal at A. [0044] Cause the first switch SW1 to open and the second switch SW2 to close [0045] Control the signal generator 206 to repeat the same signal. [0046] Measure, using the ADC 302, the responsive signal at B. [0047] Calculate the waveform at C using the measured signals at A and B
[0048] In the example systems 200 and 300 of
[0049] In the example systems 200 and 300 of
[0050]
[0051] In a second step 402, the signal generator repeats the test waveform with a delay time t.sub.v and the ADC measures the responsive waveform again. The delay time t.sub.v is incremented again and again as the signal generator repeats the test waveform again and again in third and fourth steps 404 and 406. The resulting waveform 408 is determined by summing the measured responsive waveforms.
[0052]
[0053] We assume the following condition: Z.sub.s=Z.sub.1, Z.sub.r=Z.sub.2, Z.sub.1 and Z.sub.2 are uniform in the transmission line, T.sub.d1 and T.sub.d2 are known values, and the waveform at A, B, and E can be observed.
[0054] In this condition, we can calculate the voltage between C and D as follows.
[0055] This equation indicates that the voltage waveform at the DUT can be represented by V.sub.s, V.sub.B, and V.sub.E with T.sub.d1 and T.sub.d2.
[0056] The same method can be applied to calculate the current waveform.
[0057] The optional features illustrated above with reference to
[0058]
[0059] Consider, for example, the system 200 of
[0064] Step 5. Repeat the step 1-4 until the desired V.sub.err is obtained.
[0065] During steps 3-5, any appropriate search method can be used to minimize the V.sub.err. For example, a linear search or a binary search can be used.
[0066]
[0067] The semiconductor wafer 714 is a thin slice of semiconductor material, typically silicon, used as the substrate for microelectronic devices. The semiconductor wafer 714 can be fabricated through processes involving crystal growth, slicing, polishing, and doping to achieve precise electrical characteristics.
[0068] The standard wafer is circular, with diameters ranging from a few millimeters to several inches, and thicknesses of about 150 to 775 micrometers. The surface of the semiconductor wafer 714 undergoes chemical-mechanical polishing to ensure an ultra-flat, defect-free surface, useful for subsequent photolithographic patterning and etching steps in the semiconductor manufacturing process. The semiconductor wafer 714 serves as a platform for integrated circuits, where numerous microelectronic components are fabricated in a highly controlled, cleanroom environment.
[0069] The probe card 712 is a testing interface used in semiconductor wafer testing, serving as the intermediary between the wafer 714 and the test equipment. The probe card 712 can include an array of microscopic, precision-aligned probes that make direct electrical contact with the test pads or bumps on the wafer's surface.
[0070] A primary function of the probe card 712 is to facilitate the transmission of electrical signals between the semiconductor devices on the wafer 714 and the measurement instrument 702, enabling the assessment of device functionality and performance parameters. The probe card 712 is configured to ensure high accuracy, repeatability, and minimal signal degradation. In some examples, the probe card 712 includes a substrate, probe needles or cantilever beams, and a compliant interposer. A test engineer can use the probe card 712 to identify defects and validate the integrity of the integrated circuits prior to dicing and packaging.
[0071] The controller 704 can be configured to perform the calculations described above and control switches and other components of the example measurement systems described above. In some examples, the controller 704 executes test cases and produces test results for the semiconductor wafer 714 and one or more devices on the semiconductor wafer 714. For example, measured and calculated waveforms can be displayed on a display device 716 for a test engineer, and pass/fail test results can be displayed on the display device 716.
[0072] It will be understood that various details of the subject matter described herein may be changed without departing from the scope of the subject matter described herein. Furthermore, the foregoing description is for the purpose of illustration only, and not for the purpose of limitation, as the subject matter described herein is defined by the claims as set forth hereinafter.