SWITCHING REGULATOR WITH THD AND PF COMPENSATION, THE CONTROL CIRCUIT AND THE METHOD THEREOF

Abstract

A switching regulator converts an AC input voltage into an output voltage, to power a load. The switching regulator includes a power stage having a main power switch. The main power switch has different ON time durations under different AC input voltage conditions and different load currents.

Claims

1. A switching regulator, comprising: a power stage, configured to convert an AC input voltage to an output voltage to power a load, the power stage at least having a main power switch; and a control circuit, configured to generate a control signal in response to the AC input voltage and the output voltage, to control the ON and OFF of the main power switch, so that the main power switch has different ON time durations under different AC input voltage conditions and different load currents; the ON time duration of the main power switch consisting of a basic time duration, a product of a THD compensate time duration and a first coefficient, and a product of a PF compensate time duration and a second coefficient.

2. The switching regulator of claim 1, wherein: when a root-mean-square (RMS) value of the AC input voltage is higher than a high voltage threshold and the load current is higher than a high current threshold, the first coefficient has a first compensate value, and the second coefficient has a first trim value.

3. The switching regulator of claim 1, wherein: when a root-mean-square (RMS) value of the AC input voltage is higher than a high voltage threshold and the load current is lower than a low current threshold, the first coefficient has a second compensate value, and the second coefficient has a second trim value.

4. The switching regulator of claim 1, wherein: when a root-mean-square (RMS) value of the AC input voltage is lower than a low voltage threshold and the load current is higher than a high current threshold, the first coefficient has a third compensate value, and the second coefficient has a third trim value.

5. The switching regulator of claim 1, wherein: when a root-mean-square (RMS) value of the AC input voltage is lower than a low voltage threshold and the load current is lower than a low current threshold, the first coefficient has a fourth compensate value, and the second coefficient has a fourth trim value.

6. The switching regulator of claim 1, wherein: the basic time duration is determined by the load current and a peak value of the AC input voltage; and the THD compensate time duration and the PF compensate time duration both vary with an instantaneous value of the AC input voltage.

7. A control circuit used in a switching regulator, the switching regulator including a power stage configured to converting an AC input voltage to an output voltage to power a load, the control circuit comprising: a proportional integral circuit, configured to generate a proportional integral signal in response to the output voltage and a voltage reference; a basic ON time duration unit, configured to generate a basic signal in response to a peak value of the AC input voltage and the proportional integral signal; a THD compensate circuit, configured to generate a THD compensate signal and a first coefficient in response to the AC input voltage and the proportional integral signal, to output a product of the THD compensate signal and the first coefficient; a PF compensate circuit, configured to generate a PF compensate signal and a second coefficient in response to the AC input voltage and the proportional integral signal, to output a product of the PF compensate signal and the second coefficient; and a logical unit, configured to generate a control signal in response to the basic signal, the product of the THD compensate signal and the first coefficient, and the product of the PF compensate signal and the second coefficient, to control a main power switch in the power stage.

8. The control circuit of claim 7, wherein the THD compensate circuit comprises: a THD unit, configured to generate the THD compensate signal in response to the AC input voltage, wherein the THD compensate signal has an effective time duration varying with an instantaneous value of the AC input voltage; a first coefficient unit, configured to judge whether a root-mean-square (RMS) of the AC input voltage is a high voltage or a low voltage, and judge whether a load current is high or low, to generate the first coefficient with a corresponding compensate value; and a first multiplication unit, configured to perform a multiply operation on the THD compensate signal and the first coefficient, to output the product of the THD compensate signal and the first coefficient.

9. The control circuit of claim 7, wherein the PF compensate circuit comprises: a PF unit, configured to generate the PF compensate signal in response to the AC input voltage, wherein the PF compensate signal has an effective time duration of varying with an instantaneous value of the AC input voltage; a second coefficient unit, configured to judge whether a root-mean-square (RMS) of the AC input voltage is a high voltage or a low voltage, and judge whether a load current is high or low, to generate the second coefficient with a corresponding trim value; and a second multiplication unit, configured to perform a multiply operation on the PF compensate signal and the second coefficient, to output the product of the PF compensate signal and the second coefficient.

10. The control circuit of claim 7, wherein: when a root-mean-square (RMS) value of the AC input voltage is higher than a high voltage threshold and a load current is higher than a high current threshold, the first coefficient has a first compensate value, and the second coefficient has a first trim value.

11. The control circuit of claim 7, wherein: when a root-mean-square (RMS) value of the AC input voltage is higher than a high voltage threshold and a load current is lower than a low current threshold, the first coefficient has a second compensate value, and the second coefficient has a second trim value.

12. The control circuit of claim 7, wherein: when a root-mean-square (RMS) value of the AC input voltage is lower than a low voltage threshold and a load current is higher than a high current threshold, the first coefficient has a third compensate value, and the second coefficient has a third trim value.

13. The control circuit of claim 7, wherein: when a root-mean-square (RMS) value of the AC input voltage is lower than a low voltage threshold and a load current is lower than a low current threshold, the first coefficient has a fourth compensate value, and the second coefficient has a fourth trim value.

14. The control circuit of claim 7, wherein: the basic signal has an effective time duration determined by a load current and a peak value of the AC input voltage; and the THD compensate signal and the PF compensate signal both have a time duration varying with an instantaneous value of the AC input voltage.

15. A method used in a switching regulator, the switching regulator including a power stage having a main power switch, periodically controlled to be turned on and off, the method comprising: converting an AC input voltage to an output voltage, to provide power a load; adjusting an ON time duration of the main power switch in response to the AC input voltage and a load current, the ON time duration of the main power switch consisting of a basic time duration, a product of a THD compensate time duration and a first coefficient, and a product of a PF compensate time duration and a second coefficient; and setting the first coefficient and the second coefficient to be different values when the AC input voltage and the load current are in different conditions.

16. The method of claim 15, wherein: the first coefficient is set to be a first compensate value and the second coefficient is set to be a first trim value, when a root-mean-square (RMS) value of the AC input voltage is higher than a high voltage threshold and the load current is higher than a high current threshold.

17. The method of claim 15, wherein: the first coefficient is set to be a second compensate value and the second coefficient is set to be a second trim value, when a root-mean-square (RMS) value of the AC input voltage is higher than a high voltage threshold and the load current is lower than a low current threshold.

18. The method of claim 15, wherein: the first coefficient is set to be a third compensate value and the second coefficient is set to be a third trim value, when a root-mean-square (RMS) value of the AC input voltage is lower than a low voltage threshold and the load current is higher than a high current threshold.

19. The method of claim 15, wherein: the first coefficient is set to be a fourth compensate value and the second coefficient is set to be a fourth trim value, when a root-mean-square (RMS) value of the AC input voltage is lower than a low voltage threshold and the load current is lower than a low current threshold.

20. The method of claim 15, wherein: the basic time duration is determined by the load current and a peak value of the AC input voltage; and the THD compensate time duration and the PF compensate time duration both vary with an instantaneous value of the AC input voltage.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] FIG. 1 schematically shows a switching regulator 100 in accordance with an embodiment of the present invention.

[0010] FIG. 2 schematically shows a circuit configuration of the controller 102 in accordance with an embodiment of the present invention.

[0011] FIG. 3 schematically shows a switching regulator 300 with a circuit configuration of the power stage 101 in accordance with an embodiment of the present invention.

[0012] FIG. 4 schematically shows a flowchart 400 of a method used in a switching regulator in accordance with an embodiment of the present invention.

[0013] The use of the similar reference label in different drawings indicates the same of like components.

DETAILED DESCRIPTION

[0014] Embodiments of circuits for switching regulator are described in detail herein. In the following description, some specific details, such as example circuits for these circuit components, are included to provide a thorough understanding of embodiments of the invention. One skilled in relevant art will recognize, however, that the invention can be practiced without one or more specific details, or with other methods, components, materials, etc.

[0015] The following embodiments and aspects are illustrated in conjunction with circuits and methods that are meant to be exemplary and illustrative. In various embodiments, the above problem has been reduced or eliminated, while other embodiments are directed to other improvements.

[0016] FIG. 1 schematically shows a switching regulator 100 in accordance with an embodiment of the present invention. In the example of FIG. 1, the switching regulator 100 comprises: a power stage 101, configured to receive an alternating current (AC) input voltage V.sub.ac via a rectifier B.sub.1, a safety capacitor (i.e., a X capacitor) C.sub.X, and an input capacitor C.sub.IN, to provide an output voltage V.sub.O to power a load, the power stage 101 at least having a main power switch S.sub.1. The power stage 101 comprises at least a main power switch S.sub.1. The switching regulator 100 further comprises: a control circuit 102, configured to generate a control signal G.sub.SW in response to the AC input voltage V.sub.ac and the output voltage V.sub.O, to control the ON and OFF of the main power switch S.sub.1, so that the main power switch S.sub.1 has different ON time durations at each switching cycle under different AC input voltage conditions and different load currents I.sub.O.

[0017] In one embodiment of the present invention, the ON time duration of the main power switch S.sub.1 consists of a basic time duration, a THD compensate time duration and a PF compensate time duration. Specifically, the ON time duration of the main power switch S1 consists of a sum of the basic time duration T.sub.B, a product of the THD compensate time duration T.sub.THD and a first coefficient k.sub.1, and a product of the PF compensate time duration T.sub.PF and a second coefficient k.sub.2. The basic time duration T.sub.B is determined by a peak value of the AC input voltage V.sub.ac and the load current I.sub.O. For example, the basic time duration T.sub.B has a functional relationship with the peak value of the AC input voltage V.sub.ac and the load current I.sub.O. The THD compensate time duration and the PF compensate time duration both vary with an instantaneous value of the AC input voltage V.sub.ac. For example, the THD compensate time duration and the PF compensate time duration both have a functional relationship with the instantaneous value of the AC input voltage. The first coefficient k.sub.1 and the second coefficient k.sub.1 both varies with a root-mean-square (RMS) value of the AC input voltage V.sub.ac and the load current I.sub.O. When the RMS value of the AC input voltage V.sub.ac is higher than a high voltage threshold and the load current I.sub.O is higher than a high current threshold, the first coefficient k.sub.1 has a first compensate value k.sub.11, and the second coefficient k.sub.2 has a first trim value k.sub.21. When the RMS value of the AC input voltage V.sub.ac is higher than the high voltage threshold and the load current I.sub.O is lower than a low current threshold, the first coefficient k.sub.1 has a second compensate value k.sub.12, and the second coefficient k.sub.2 has a second trim value k.sub.22. When the RMS value of the AC input voltage V.sub.ac is lower than a low voltage threshold and the load current I.sub.O is higher than the high current threshold, the first coefficient k.sub.1 has a third compensate value k.sub.13, and the second coefficient k.sub.2 has a third trim value k.sub.23. When the RMS value of the AC input voltage V.sub.ac is lower than the low voltage threshold and the load current I.sub.O is lower than the low current threshold, the first coefficient k.sub.1 has a fourth compensate value k.sub.14, and the second coefficient k.sub.2 has a fourth trim value k.sub.24.

[0018] The relationship of the first coefficient k.sub.1 vs. the AC input voltage V.sub.ac & the load condition is shown in below table 1.

TABLE-US-00001 TABLE 1 k.sub.1 relatively high V.sub.ac relatively low V.sub.ac heavy load k.sub.11 k.sub.13 light load k.sub.12 k.sub.14

[0019] The relationship of the second coefficient k.sub.2 vs. the AC input voltage V.sub.ac & the load condition is shown in below table 2.

TABLE-US-00002 TABLE 2 K.sub.2 relatively high V.sub.ac relatively low V.sub.ac heavy load K.sub.21 K.sub.23 light load K.sub.22 K.sub.24

[0020] In one embodiment of the present invention, a real-time value T.sub.B(t) of the basic time duration T.sub.B has a functional relationship with the peak value of the AC input voltage V.sub.ac and the load current I.sub.O as below:

[00001]$T_B\left(t\right)=\frac{k\times I_O\left(t\right)}{V_{\mathrm{ac}\_\mathrm{pk}}^2}$

[0021] Wherein k is a set coefficient, I.sub.O(t) represents a real-time value of the load current, and V.sub.ac_pk represents the peak value of the AC input voltage.

[0022] FIG. 2 schematically shows a circuit configuration of the controller 102 in accordance with an embodiment of the present invention. In the example of FIG. 2, the controller 102 comprises: a proportional integral circuit PI, a basic ON time duration unit 21, a THD compensate circuit 22, a PF compensate circuit 23, and a logical unit 24. The proportional integral circuit PI is configured to generate a proportional integral signal V.sub.CMP in response to a feedback voltage V.sub.FB indicative of the output voltage V.sub.O and an internal voltage reference. The basic ON time duration unit 21 is configured to generate a basic signal S.sub.TB in response to the peak value of the AC input voltage V.sub.ac and the proportional integral signal V.sub.CMP. The THD compensate circuit 22 is configured to obtain the THD compensate signal S.sub.THD and the first coefficient k.sub.1 in response to the AC input voltage V.sub.ac and the proportional integral signal V.sub.CMP, to generate the product (S.sub.THD*K.sub.1) of the THD compensate signal S.sub.THD and the first coefficient k.sub.1. The PF compensate circuit 23 is configured to obtain the PF compensate signal S.sub.PF and the second coefficient k.sub.2 in response to the AC input voltage V.sub.ac and the proportional integral signal V.sub.CMP, to generate the product (S.sub.PF*K.sub.2) of the PF compensate signal S.sub.PF and the second coefficient k.sub.2. The logical unit 24 is configured to generate the control signal G.sub.SW in response to the basic signal S.sub.TB, the product (S.sub.THD*K.sub.1) of the THD compensate signal S.sub.THD and the first coefficient k.sub.1, and the product (S.sub.PF*K.sub.2) of the PF compensate signal S.sub.PF and the second coefficient k.sub.2, to control the main power switch S1.

[0023] In one embodiment of the present invention, the control circuit 102 further comprises a summing circuit, configured to perform an add operation on the basic signal S.sub.TB, the product (S.sub.THD*K.sub.1) of the THD compensate signal S.sub.THD and the first coefficient k.sub.1, and the product (S.sub.PF*K.sub.2) of the PF compensate signal S.sub.PF and the second coefficient k.sub.2, to generate the ON time signal S.sub.ON, which is then delivered to the logical unit 24. Accordingly, the control signal G.sub.SW is generated.

[0024] In one embodiment of the present invention, an effective time duration (e.g., the time duration of the logical high level) of the basic signal S.sub.TB is T.sub.B in one switching cycle. An effective time duration (e.g., the time duration of the logical high level) of the THD compensate signal S.sub.THD is T.sub.THD in one switching cycle. An effective time duration (e.g., the time duration of the logical high level) of the PF compensate signal S.sub.PF is T.sub.PF in one switching cycle.

[0025] In one embodiment of the present invention, the THD compensate circuit 22 comprises: a THD unit 221, a first coefficient unit 222, and a first multiplication unit 223. The THD unit 221 is configured to generate the THD compensate signal S.sub.THD in response to the AC input voltage V.sub.ac. The effective time duration of the THD compensate signal S.sub.THD varies with the instantaneous value of the AC input voltage V.sub.ac. The first coefficient unit 222 is configured to judge whether the RMS of the AC input voltage V.sub.ac is a high voltage or a low voltage, and judge whether the load current is high or low, to generate the first coefficient k.sub.1 with a corresponding compensate value. For example, the RMS of the AC input voltage V.sub.ac may be compared with the high voltage threshold or the low voltage threshold, to detect the AC input voltage V.sub.ac condition; and the proportional integral signal V.sub.CMP may be compared with the high current threshold or the low current threshold, to detect the load condition. The first multiplication unit 223 is configured to perform a multiply operation on the THD compensate signal S.sub.THD and the first coefficient k.sub.1, to generate the product (S.sub.THD*K.sub.1) of the THD compensate signal S.sub.THD and the first coefficient k.sub.1.

[0026] In one embodiment of the present invention, the PF compensate circuit 23 comprises: a PF unit 231, a second coefficient unit 232, and a second multiplication unit 233. The PF unit 231 is configured to generate the PF compensate signal S.sub.PF in response to the AC input voltage V.sub.ac. The effective time duration of the PF compensate signal varies with the instantaneous value of the AC input voltage V.sub.ac. The second coefficient unit 232 is configured to judge whether the RMS of the AC input voltage V.sub.ac is a high voltage or a low voltage, and judge whether the load current is high or low, to generate the second coefficient k.sub.2 with a corresponding trim value. The second multiplication unit 233 is configured to perform a multiply operation on the PF compensate signal S.sub.PF and the second coefficient k.sub.2, to generate the product (S.sub.PF*K.sub.2) of the PF compensate signal S.sub.PF and the second coefficient k.sub.2.

[0027] In one embodiment of the present invention, the power stage circuit 101 further comprises a freewheeling power switch (as shown in FIG. 3), configured to free wheel the current when the main power switch is OFF. The logical unit 24 is further configured to receive a zero crossing information of the current flowing through the freewheeling power switch, to control the main power switch.

[0028] FIG. 3 schematically shows a switching regulator 300 with a circuit configuration of the power stage 101 in accordance with an embodiment of the present invention. In the example of FIG. 3, the power stage 101 comprises a boost circuit, having an input inductor, the main power switch S1, a freewheeling power switch and an output capacitor. The control circuit 102 is configured to receive the AC input voltage V.sub.ac via a first diode D.sub.1 and a second diode D.sub.2, and is configured to receive the feedback voltage V.sub.FB via a resistor divider, to generate the control signal G.sub.SW, which is used to control the main power switch S1 to have different ON time durations under different AC input voltage conditions and different load currents.

[0029] FIG. 4 schematically shows a flowchart 400 of a method used in a switching regulator in accordance with an embodiment of the present invention. The switching regulator includes a power stage having a main power switch. The main power switch is periodically controlled to be turned on and off. The method comprises:

[0030] Step 401, converting an AC input voltage to an output voltage, to provide power a load.

[0031] Step 402, adjusting an ON time duration of the main power switch in response to the AC input voltage and a load current, the ON time duration of the main power switch consisting of a basic time duration, a product of a THD compensate time duration and a first coefficient, and a product of a PF compensate time duration and a second coefficient. And

[0032] Step 403: setting the first coefficient and the second coefficient to be different values when the AC input voltage and the load current are in different conditions.

[0033] In one embodiment, the first coefficient is set to be a first compensate value and the second coefficient is set to be a first trim value, when a root-mean-square (RMS) value of the AC input voltage is higher than a high voltage threshold and the load current is higher than a high current threshold. The first coefficient is set to be a second compensate value and the second coefficient is set to be a second trim value, when the RMS value of the AC input voltage is higher than the high voltage threshold and the load current is lower than a low current threshold. The first coefficient is set to be a third compensate value and the second coefficient is set to be a third trim value, when the RMS value of the AC input voltage is lower than a low voltage threshold and the load current is higher than the high current threshold. The first coefficient is set to be a fourth compensate value and the second coefficient is set to be a fourth trim value, when the RMS value of the AC input voltage is lower than the low voltage threshold and the load current is lower than the low current threshold.

[0034] In one embodiment of the present invention, the basic time duration is determined by the load current and a peak value of the AC input voltage.

[0035] In one embodiment of the present invention, the THD compensate time duration and the PF compensate time duration both vary with an instantaneous value of the AC input voltage.

[0036] Several embodiments of the foregoing switching regulator set different effective THD compensate time durations and different effective PF compensate time durations, to adjust the ON time duration of the main power switch under different instantaneous values of the AC input voltage and different load currents. Thus, power factor and total harmonic distortion are optimized.

[0037] It is to be understood in these letters patent that the meaning of “A” is coupled to “B” is that either A and B are connected to each other as described below, or that, although A and B may not be connected to each other as described above, there is nevertheless a device or circuit that is connected to both A and B. This device or circuit may include active or passive circuit elements, where the passive circuit elements may be distributed or lumped-parameter in nature. For example, A may be connected to a circuit element that in turn is connected to B.

[0038] This written description uses examples to disclose the invention, including the best mode, and also to enable a person skilled in the art to make and use the invention. The patentable scope of the invention may include other examples that occur to those skilled in the art.