Method and system for equalizing digital signals using partial response maximum likelihood sequence equalization
12519565 ยท 2026-01-06
Assignee
Inventors
Cpc classification
H04L1/0054
ELECTRICITY
International classification
Abstract
A test system implemented method of equalizing a digital signal under test (SUT) results in a waveform representation of the output of a Partial Response Maximum Likelihood Sequence Equalizer (PR-MLSE). The method includes applying the SUT, having greater than one symbol period of inter-symbol interference (ISI), to a feed forward equalizer to obtain a Partial Response equalized sequence r.sub.k having an ISI characterized as (1+D), wherein r.sub.k denotes the kth equalized sample of the waveform, sampled at the symbol rate, and is a programmable variable. The method further includes obtaining a known symbol sequence, m.sub.k, as a user input to the system, and determining y(capped).sub.k, the kth sample of the PR-MLSE equivalent waveform, in accordance with the following equation,
Claims
1. A test system implemented method of equalizing a digital signal under test (SUT) resulting in a waveform representation of the output of a Partial Response Maximum Likelihood Sequence Equalizer (PR-MLSE), the method comprising: applying the SUT, having greater than one symbol period of inter-symbol interference (ISI), to a feed forward equalizer to obtain a Partial Response equalized sequence r.sub.k having an ISI characterized as (1+D), wherein r.sub.k denotes the kth equalized sample of the waveform, sampled at the symbol rate, and is a programmable variable; obtaining a known symbol sequence, m.sub.k, as a user input to the system; and determining y.sub.k, the kth sample of the PR-MLSE equivalent waveform, in accordance with the following equation,
2. The method of claim 1, wherein the digital SUT is an optical signal.
3. The method of claim 1, wherein the test system is an oscilloscope.
4. The method of claim 3, further comprising generating an eye diagram of the PR-MLSE equivalent waveform on a display on the oscilloscope.
5. A non-transitory tangible computer readable medium having stored thereon executable instructions embodied in the computer readable medium that when executed by at least one processor of a test system cause the test system to execute the method of claim 1.
6. The non-transitory tangible computer readable medium of claim 5, wherein the test system is an oscilloscope.
7. The non-transitory tangible computer readable medium of claim 6, wherein the non-transitory tangible computer readable medium is a memory of the oscilloscope.
8. An oscilloscope comprising: an input port configured to receive a digital signal under test (SUT) having greater than one symbol period of inter-symbol interference (ISI); a feed forward sampler configured to process the SUT to obtain a Partial Response equalized sequence r.sub.k having an ISI characterized as (1+D), wherein r.sub.k denotes the kth equalized sample of the waveform, sampled at the symbol rate, and is a programmable variable; a waveform generator configured to generate a Partial Response Maximum Likelihood Sequence Equalizer (PR-MLSE) equivalent waveform in accordance with the following equation,
9. The oscilloscope of claim 8, wherein the oscilloscope includes a display and is configured to display an eye diagram of the PR-MLSE equivalent waveform on the display.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The above and other aspects and features of the inventive concepts will become readily apparent from the detailed description that follows, with reference to the accompanying drawings, in which:
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DETAILED DESCRIPTION
(8) In the following detailed description, for purposes of explanation and not limitation, representative embodiments disclosing specific details are set forth in order to provide a thorough understanding of the present teachings. However, it will be apparent to one having ordinary skill in the art having had the benefit of the present disclosure that other embodiments according to the present teachings that depart from the specific details disclosed herein remain within the scope of the appended claims. Moreover, descriptions of well-known apparatuses and methods may be omitted to avoid obscuring the description of the example embodiments. Such methods and apparatuses are clearly within the scope of the present teachings. Further, throughout the drawings, like reference numbers refer to the same or similar elements.
(9) The terminology used herein is for purposes of describing particular embodiments only, and is not intended to be limiting. The defined terms are in addition to the technical and scientific meanings of the defined terms as commonly understood and accepted in the technical field of the present teachings. As used in the specification and appended claims, the terms a, an and the include both singular and plural referents, unless the context clearly dictates otherwise. Thus, for example, a device includes one device and plural devices. Further, for example, when one element is described as being connected to another element, the one element may be directly connected to the other element, or indirectly connected to the other element in an operative manner.
(10) Separately, as is traditional in the field of the inventive concepts, example embodiments are described, and illustrated in the drawings, in terms of functional blocks, units and/or modules. Those skilled in the art will appreciate that these blocks, units and/or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, and the like, which may be formed using semiconductor-based fabrication techniques or other manufacturing technologies. In the case of the blocks, in the absence of an indication to the contrary, the units and/or modules being implemented by microprocessors or similar may be programmed using software (e.g., microcode) to perform various functions discussed herein and may optionally be driven by firmware and/or software. Alternatively, each block, unit and/or module may be implemented by dedicated hardware, or as a combination of dedicated hardware to perform some functions and a processor (e.g., one or more programmed microprocessors and associated circuitry) to perform other functions. Also, each block, unit and/or module of the example embodiments may be physically separated into two or more interacting and discrete blocks, units and/or modules without departing from the scope of the example embodiments. Conversely, the blocks, units and/or modules of the example embodiments may be physically combined into more complex blocks, units and/or modules without departing from the scope of the example embodiments.
(11) Real-time oscilloscopes and sampling oscilloscopes are used to characterize high-speed digital data. Testing by real-time oscilloscopes is a part of several industry protocols, such as universal serial bus (USB), ethernet or peripheral component interconnect express (PCIe), which rely on data processing algorithms and statistical methods to determine compliance. Acceptable levels of performance, for a wide variety of metrics, are defined in official specifications for industry protocols.
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(13) In this example, the DUT 10 includes a circuit 14, for example a high speed digital communication circuit or oscillator, at least one power supply 16, and at least one clock 18. The circuit 14 is powered by one or more supply voltages, including at least one supply voltage 15 produced by the power supply 16. The circuit 14 also receives a clock signal 12 from the clock 18 and may use the clock signal 12 to control the timing of edges or bit transitions in one of more signals of the circuit 14.
(14) In exemplary embodiments, the measurement instrument 100 may be a digital oscilloscope, and may include an input port 112 configured to receive the output signal 11 from the DUT 10, a clock 130, a sampler 122 configured to capture samples of the received output signal 11, a memory 140, a signal processor 150, a display device 160 and a user interface 170.
(15) The sampler 122 may include an analog-to-digital converter (ADC) (not shown) which may be clocked in response to the clock 130 of the measurement instrument 100. In some embodiments, clock 130 may be recovered from the captured samples of the signal 11 by any of many clock recovery techniques known to those skilled in the art.
(16) The display device 160 is not limited to any particular type of display technology, and may include a liquid crystal display (LCD), a plasma display, a cathode ray tube (CRT), or the like, together with the associated processor and software for implementing the display device 160. Likewise, the user interface 170 is also not limited, and may include one or more of a keyboard, a keypad, control knobs, a mouse, a trackball, buttons, indicator lights, and so on, together with the associated processor and software for implementing the user interface 170.
(17) The memory 140 which may store therein digitized samples of the DUT signal 11 captured by sampler 122. In that case, in some embodiments the digitized samples may be communicated by the measurement instrument 100 under control of a controller or processor (not shown) via a communications interface (also not shown) to an external device such as a computer where the digitized samples may be processed as described below with respect to signal processor 150. The communication interface may be any suitable interface, for example conforming to standards such as Ethernet, specialized test instrument standards, etc. In some embodiments, the communication interface may allow the measurement instrument 100 to communicate commands and data with one or more external computers and/or other measurement instruments via the Internet.
(18) The memory 140 may also include a working memory for the signal processor 150 including instructions, when executed the by the signal processor 150, carry out the methods described later herein. The working memory storing the instructions can comprise random access memory (RAM), read only memory (ROM), optical read/write memory, cache memory, magnetic read/write memory, flash memory, and/or any other non-transitory computer readable storage medium.
(19) In the case where the techniques of the inventive concepts are executed off-line of the measurement instrument 100, the aforementioned instructions would be stored in remote memory accessible by processor external the measurement instrument 100. Again, the remote working memory storing the instructions can comprise random access memory (RAM), read only memory (ROM), optical read/write memory, cache memory, magnetic read/write memory, flash memory, and/or any other non-transitory computer readable storage medium.
(20) The measurement instrument 100 may include other components and subsystems not illustrated in
(21) Partial Response Maximum Likelihood Sequence Detection/Equalization (PR-MLSE) has become a common component of many electrical and optical channels in recent standards documents. The output of an MLSE is the estimated discrete symbol sequence. The discrete output prevents the construction of an eye diagram that takes into account the performance of the MLSE, which limits the quality metrics that can be evaluated for a system using an MLSE.
(22) The inventive concepts described below present a derivation to create a continuous signal which will have SER performance correlated to an MLSE receiver using threshold testing. This signal can then be used for normal eye mode measurements.
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(24) Referring to
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where r.sub.k is the output of the channel 201, m.sub.j is the jth symbol and b.sub.0=1.
(26) The output of the DFE are discrete symbol values, m(capped).sub.k, determined by threshold testing by slicer 204 of the modified input signal y(capped)k:
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(28) In a real DFE implementation, the previous estimated symbol values are used to feed back into the threshold test as above. It is noted here the feedback of estimated symbols can lead to bursts of errors if the estimates are wrong.
(29) A scope implementation of the DFE will now be described with reference to
(30) In the real equalizer described previously, the equalizer only has access to the channel output r.sub.k and the previously detected symbols m(capped).sub.l, where l<k. In contrast, in the scope implementation as illustrated in
(31) In the scope implementation, continuous output y(capped).sub.k, is used instead of discrete symbols, to determine the signal qualities as seen by the receiver. This allows for standard eye and scope measurements to be made, with possible modifications for discontinuity at eye boundaries. Separately, threshold testing is still needed to generate the feedback values.
(32) A problem with the implementation is that small variations in the input noise, which may cause a symbol error, can lead to large changes in the output signal. This can lead to unstable and inconsistent results. As such, a simplifying assumption is made that all previous symbols are known without error, which leads to a stable and repeatable measurement. The results are well-correlated when compared to the when compared to the real implementation.
(33) The discussion will now be directed to a Maximum Likelihood Sequence Detector (MLSD).
(34) As described previously, for a channel of the form 1+b.sub.1D+b.sub.2D.sup.2+ . . . the maximum likelihood symbol detector is based on the minimum square distance:
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where r.sub.k is the output of the channel 201, m.sub.j is the jth symbol and b.sub.0=1.
(36) If we let the m.sub.k take continuous values, the solution to the minimization problem is the system of equations defined by:
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(38) Solving this system of equations and then rounding m.sub.k to the nearest valid symbol values is not guaranteed to be a solution to the original minimization problem. The exception to this is if the sequence length is l.
(39) In consideration of the above, a simplifying assumption is made: At symbol k assume that m.sub.j is known for all jk1 and jk+1. This is essentially equivalent to assuming perfect decoding before and after symbol k, and optimization is over a single continuous variable, renamed y(capped).sub.k, for each symbol.
(40) This is similar to the DFE in a number of ways. The discrete symbol value can be determined by threshold testing:
{circumflex over (m)}.sub.k={j if th.sub.j-1.sub.kth.sub.j
(41) The continuous output signal y(capped).sub.k (below) can be used to determine the signal qualities as seen by the receiver using eye and scope measurements.
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(43) In the meantime, IEEE receivers are specifying a Partial Response MLSE (PR-MLSE) as part of the reference receiver. Linear receivers are used to make rk have a 1+D response. MLSD knowledge of the 1+D response is leveraged to decode the symbol sequence. Applying this partial response special case to the optimization equation of the immediately preceding equation, the continuous output signal y(capped).sub.k can be characterized as follows:
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(45) Referring now to
(46) A feed forward sampler 402 configured to process the SUT to obtain a Partial Response equalized sequence r.sub.k having an ISI characterized as (1+D), wherein r.sub.k denotes the kth equalized sample of the waveform, sampled at the symbol rate, and a is a programmable variable.
(47) A waveform generator 403 (labeled MLSD in
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where m.sub.k is a known symbol sequence as a user input to the oscilloscope, and y.sub.k is the kth sample of the PR-MLSE equivalent waveform.
(49) Referring now to
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(51) It is noted that the digital SUT may be an optical signal. Further, the method may be implemented by a test system, an example of which is an oscilloscope. The method may further include generating an eye diagram (S505) of the PR-MLSE equivalent waveform on a display on the oscilloscope.
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(53) The methods of the inventive concepts may be implemented by the processor of an oscilloscope, such as the oscilloscope described above in connection with
(54) Further, the inventive concepts encompass oscilloscopes configured to acquire the waveform of a signal under test (SUT) and programmed to carry out the methods of the inventive concepts.
(55) While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive; the invention is not limited to the disclosed embodiments. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims. While representative embodiments are disclosed herein, one of ordinary skill in the art will appreciate that many variations that are in accordance with the present teachings are possible and remain within the scope of the appended claim set. The invention therefore is not to be restricted except within the scope of the appended claims.