Circuit system and circuit control method applied to motor drive

11469703 · 2022-10-11

Assignee

Inventors

Cpc classification

International classification

Abstract

A circuit system and a circuit control method applied to a motor drive are disclosed. The circuit control method includes the steps of providing a phase-locked circuit unit and providing a PWM control unit. The phase-locked circuit unit enables a first carrier signal and a second carrier signal to have identical amplitudes and starting points. The PWM control unit compares the first carrier signal with a reference signal for controlling a switch. When a load current is independently supplied by at least one DC capacitor, a SVPWM control unit controls an inverter unit for the load current to be zero, thereby reducing DC voltage ripple, operation loss and transient voltage surge.

Claims

1. A circuit system applied to a motor drive, comprising: a voltage-stabilizing unit; a DC power conversion unit, electrically connected to the voltage-stabilizing unit, the DC power conversion unit including a PWM control unit, a first switch, a second switch, and at least one DC capacitor; an inverter unit, electrically connected to the DC power conversion unit, the inverter unit including an SVPWM control unit and a power transistor; and a phase-locked circuit unit, electrically connected to the DC power conversion unit and the inverter unit, the phase-locked circuit unit enabling a first carrier signal generated by the DC power conversion unit and a second carrier signal generated by the inverter unit to have identical amplitudes and starting points; wherein the voltage-stabilizing unit generates a reference signal to the DC power conversion unit, the PWM control unit compares the first carrier signal with the reference signal, the PWM control unit generates a turn-on command or a turn-off command of the first switch and the second switch according to a comparison result; wherein when the PWM control unit drives the first switch and the second switch to turn on or off, a load current sent to the inverter unit is independently supplied by the DC capacitor, the SVPWM control unit controls the power transistor of an upper arm of the inverter unit to turn on or the power transistor of a lower arm of the inverter unit to turn on, so that the load current is zero.

2. The circuit system as claimed in claim 1, wherein the DC power conversion unit includes an inductor, when a magnitude of the first carrier signal is less than a reference value of the reference signal, the PWM control unit drives the first switch to turn off and the second switch to turn on, and the load current sent to the inverter unit is independently supplied by the DC capacitor; when the magnitude of the first carrier signal is greater than the reference value, the PWM control unit drives the first switch to turn on and the second switch to turn off, and an electric energy stored in the inductor is transferred to the DC capacitor for storage and converted into the load current.

3. The circuit system as claimed in claim 1, wherein the DC power conversion unit is a DC-to-DC power converter.

4. A circuit control method applied to a motor drive, comprising the steps of: providing a phase-locked circuit unit, the phase-locked circuit unit enabling a first carrier signal generated by a DC power conversion unit and a second carrier signal generated by a inverter unit to have identical amplitudes and starting points; providing a voltage-stabilizing unit, the voltage-stabilizing unit generating a reference signal to the DC power conversion unit, a PWM control unit of the DC power conversion unit comparing the first carrier signal with the reference signal, the PWM control unit generating a turn-on command or a turn-off command of a switch according to a comparison result; wherein when the PWM control unit drives the switch to turn on or off, a load current sent to the inverter unit is independently supplied by at least one DC capacitor, a SVPWM control unit of the inverter unit controls a power transistor of an upper arm of the inverter unit to turn on or the power transistor of a lower arm of the inverter unit to turn on, so that the load current is zero.

5. The circuit control method as claimed in claim 4, wherein the switch includes a first switch and a second switch, when a magnitude of the first carrier signal is less than a reference value of the reference signal, the PWM control unit drives the first switch to turn off and the second switch to turn on, and the load current sent to the inverter unit is independently supplied by the DC capacitor; when the magnitude of the first carrier signal is greater than the reference value, the PWM control unit drives the first switch to turn on and the second switch to turn off, and an electric energy stored in an inductor of the DC power conversion unit is transferred to the DC capacitor for storage and converted into the load current.

6. The circuit control method as claimed in claim 4, wherein the DC power conversion unit is a DC-to-DC power converter.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic circuit diagram according to an embodiment of the present invention;

(2) FIG. 2 is a schematic flow diagram according to an embodiment of the present invention;

(3) FIG. 3 is a timing diagram according to an embodiment of the present invention;

(4) FIG. 4 is an additional torque diagram according to an embodiment of the present invention;

(5) FIG. 5 is a simulation diagram of the relationship between voltage and time according to an embodiment of the present invention;

(6) FIG. 6 is a simulation diagram of the relationship between torque and time according to an embodiment of the present invention; and

(7) FIG. 7 is a simulation diagram of the relationship between rotating speed and time according to an embodiment of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

(8) Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings.

(9) Referring to FIG. 1, a circuit system applied to a motor drive according to an embodiment of the present invention, comprising a voltage-stabilizing unit 1, a DC power conversion unit 2, an inverter unit 3 and a phase-locked circuit unit 4 for performing a circuit control method applied to a motor drive.

(10) The DC power conversion unit 2 is a DC-to-DC power converter. The DC power conversion unit 2 includes an inductor L, two power transistors, at least one DC capacitor C.sub.DC, and a PWM control unit 21. Although only one DC capacitor is shown in FIG. 1, multiple DC capacitors are usually required in practice; the present invention has no limitation on the number of the DC capacitor. The two power transistors serve as a first switch Q1 and a second switch Q2, respectively.

(11) The inverter unit 3 includes a plurality of power transistors and an SVPWM control unit 31. The number of the power transistors in the embodiment of the present invention is six, defined as a first power transistor S1, a second power transistor S2, a third power transistor S3, a fourth power transistor S4, a fifth power transistor S5 and a sixth power transistor S6. Every adjacent two of the power transistors form an arm. More specifically, the first power transistor S1 and the second power transistor S2 form a first arm, the third power transistor S3 and the fourth power transistor S4 form a second arm, and the fifth power transistor S5 and the sixth power transistor S6 form a third arm. The first power transistor S1, the third power transistor S3 and the fifth power transistor S5 serve as the upper arms of the first arm, the second arm, and the third arm, respectively. The second power transistor S2, the fourth power transistor S4 and the sixth power transistor S6 serve as the lower arms of the first arm, the second arm and the third arm, respectively.

(12) Referring to FIG. 2 and FIG. 3, in cooperation with FIG. 1, the circuit control method applied to a motor drive comprises the following steps:

(13) The phase-locked circuit unit 4 enables a first carrier signal S.sub.carrier-1 generated by the DC power conversion unit 2 and a second carrier signal S.sub.carrier-2 generated by the inverter unit 3 to have identical amplitudes and starting points. The following describes the state in a switching time period T.sub.S. In an embodiment of the present invention, both the first carrier signal S.sub.carrier-1 and the second carrier signal S.sub.carrier-2 are triangular waves. Since the frequency of the first carrier signal S.sub.carrier-1 is twice the frequency of the second carrier signal S.sub.carrier-2. In the switching time period, the first carrier signal S.sub.carrier-1 has two complete cycles, and the second carrier signal S.sub.carrier-2 has only one complete cycle. The start point and the end point of the first carrier signal S.sub.carrier-1 and the second carrier signal S.sub.carrier-2 are both zero.

(14) The operation of the DC power conversion unit 2 is described below. The voltage-stabilizing unit 1 generates a reference signal through a voltage loop or a current loop, and the reference signal is input to the DC power conversion unit 2. The reference signal is, for example, a wave whose magnitude is fixed to a reference value S.sub.r. The reference value S.sub.r may be, for example, half of the maximum peak value of the first carrier signal S.sub.carrier-1. After the first carrier signal S.sub.carrier-1 is input to the DC power conversion unit 2, the PWM control unit 21 compares the first carrier signal S.sub.carrier-1 with the reference value S.sub.r. When the magnitude of the first carrier signal S.sub.carrier-1 is less than the reference value S.sub.r, it is in a first state. When the magnitude of the first carrier signal S.sub.carrier-1 is greater than the reference value S.sub.r, it is in a second state. The PWM control unit 21 generates a turn-on command or a turn-off command of the first switch Q1 and the second switch Q2 according to the first state or the second state. Then, the first switch Q1 and the second switch Q2 are turned on or off through proper signal isolation and amplification.

(15) In the first state, the PWM control unit 21 drives the first switch Q1 to turn off and the second switch Q2 to turn on. At this time, the state of the switch is defined as 1 according to the connection of the second switch Q2. The electric energy of a battery A is stored in the inductor L. A load current sent to the inverter unit 3 is independently supplied by the DC capacitor C.sub.DC. The electric quantity Q stored in the DC capacitor C.sub.DC is represented by a first formula: Q=I.sub.Ct=CΔV.sub.C, wherein I.sub.C is the load current, t is the time parameter, and ΔV.sub.C is the voltage change of the DC capacitor C.sub.DC.

(16) In the second state, the PWM control unit 21 drives the first switch Q1 to turn on and the second switch Q2 to turn off. At this time, the state of the switch is defined as 0 according to the disconnection of the second switch Q2. The electric energy stored in the inductor L is transferred to the DC capacitor C.sub.DC for storage and converted into the load current.

(17) Next, the operation of the inverter unit 3 is described below. The state that the upper arms of the first arm, the second arm and the third arm are turned on is defined as 1, and the state that the lower arms are turned on is defined as 0.

(18) In a period of the second carrier signal S.sub.carrier-2, that is, in the switching time period T.sub.S, the control mode of the SVPWM control unit 31 for the power transistors is symmetrical. The sequence is: the lower arms of the first arm, the second arm and the third arm are all turned on, that is, the second power transistor S2, the fourth power transistor S4 and the sixth power transistor S6 are turned on; the upper arm of the first arm is turned on and the lower arms of the second arm and the third arm are turned on, that is, the first power transistor S1, the fourth power transistor S4, and the sixth power transistor S6 are turned on; the upper arms of the first arm and the second arm are turned on and the lower arm of the third arm is turned on, that is, the first power transistor S1, the third power transistor S3 and the sixth power transistor S6 are turned on; the upper arms of the first arm, the second arm and the third arm are all turned on, that is, the first power transistor S1, the third power transistor S3 and the fifth power transistor S5 are turned on; the upper arms of the first arm and the second arm are turned on and the lower arm of the third arm is turned on, that is, the first power transistor S1, the third power transistor S3 and the sixth power transistor S6 are turned on; the upper arm of the first arm is turned on and the lower arms of the second arm and the third arm are turned on, that is, the first power transistor S1, the fourth power transistor S4 and the sixth power transistor S6 are turned on; the lower arms of the first arm, the second arm and the third arm are all turned on, that is, the second power transistor S2, the fourth power transistor S4 and the sixth power transistor S6 are turned on.

(19) When the lower arms of the first arm, the second arm and the third arm are all turned on, or the upper arms of the first arm, the second arm and the third arm are all turned on, that is, when the second power transistor S2, the fourth power transistor S4 and the sixth power transistor S6 are turned on, or the first power transistor S1, the third power transistor S3 and the fifth power transistor S5 are turned on, the load current is zero.

(20) The circuit control method applied to the motor drive is explained below. Because the phase-locked circuit unit 4 enables the first carrier signal S.sub.carrier-1 and the second carrier signal S.sub.carrier-2 to have the identical amplitudes and starting points, the first state corresponds to that the lower arms of the first arm, the second arm and the third arm are all turned on, or that the lower arms of the first arm, the second arm and the third arm are all turned on, that is, the first switch Q1 is turned off and the second switch Q2 is turned on, so that when the DC capacitor C.sub.DC alone supplies the load current, the load current must be zero. According to the first formula, ΔV.sub.C is proportional to the magnitude of the load current. When the load current decreases, ΔV.sub.C will decrease accordingly, thereby reducing the DC voltage ripple, reducing the operation loss when the first switch Q1 and the second switch Q2 are switched and the transient voltage surge of the drain and source of the first switch Q1 and the second switch Q2. In addition, because the DC voltage ripple is reduced, when driving a motor B of the same specification, the required DC capacitance value is also reduced. That is, the number of the DC capacitors C.sub.DC required for the drive circuit is reduced, the overall volume of the circuit is reduced, and the power density and operating reliability of the drive circuit of the motor B is further improved.

(21) Referring to FIG. 4, in cooperation with FIG. 1 and Table 1 and Table 2 below, in order to verify the correctness of the circuit control method applied to the motor drive, SIMULINK in MATLAB is used for computer circuit simulation calculation. The relevant parameters of the motor B and the DC power conversion unit 2 are shown in Table 1 and Table 2 below.

(22) TABLE-US-00001 TABLE 1 the parameters for testing the motor Parameter Numerical value rated torque (N .Math. m) 5 maximum torque (N .Math. m) 10 rated voltage (V.sub.max) 48 rated current (A.sub.rms) 70 Maximum current (A.sub.rms) 140 rated rotating speed (RPM) 2000 rated power (kW) 2.3 number of poles 8 direct-axis inductance (mH) 0.135 Quadrature-axis inductance (mH) 0.16 stator resistance (mΩ) 65 flux linkage (mWb) 25.12

(23) TABLE-US-00002 TABLE 1 the parameters for testing the DC power converter Parameter Numerical value input voltage (V) 24 output voltage (V) 48 inductance (H) 8.33 μ Capacitance (F) 2 m

(24) For performing simulation with the parameters in Table 1 and Table 2, the rotating speed command for simulation is 1900 rpm, and the additional torque is as shown in FIG. 4. The torque is 2 N-m from 0 to 3 seconds, the torque is increased to 4 N-m from 3 to 6 seconds, and the torque is reduced to 1 N-m after 6 seconds.

(25) Please refer to FIG. 5 through FIG. 7, in cooperation with FIG. 1. FIGS. 5 to 7 are computer simulation results. The darker curve is the simulation result of the prior art only using the PWM control technology. The lighter curve is the simulation result of the circuit control method applied to the motor drive of the present invention.

(26) As shown in FIG. 5, the DC voltage ripple generated by the prior art is 5.95% during the period of 3 to 6 seconds when the load is maximum. In the present invention, because the load current in the first state is reduced, the DC voltage ripple of a load voltage is only 2.3%, which is better than the prior art significantly. In addition, no matter whether it is loading in 3 seconds or unloading in 6 seconds, the load voltage of the present invention has no transient voltage surge. The present invention does have a better DC voltage variation performance curve.

(27) Since the present invention has a smaller DC voltage ripple, under the same control parameters of the inverter unit 3, the present invention reduces the motor torque ripple compared with the prior art. As shown in FIG. 6, the motor torque ripple of the prior art is 76.5% during the period of 3 to 6 seconds when the load is maximum. The motor torque ripple of the present invention is reduced to 62.5%, which indeed reduces the motor torque ripple.

(28) As shown in FIG. 7, compared with the prior art, the present invention not only has the aforementioned advantages but also accurately controls the rotating speed of the motor B, without negatively affecting the driving of the motor B.

(29) Although particular embodiments of the present invention have been described in detail for purposes of illustration, various modifications and enhancements may be made without departing from the spirit and scope of the present invention. Accordingly, the present invention is not to be limited except as by the appended claims.