AC/DC CONVERTER

Abstract

An AC/DC converter including a PFC circuit. The PFC circuit includes: a reactor; a first thyristor and a second thyristor; at least one switching element; and a capacitor. When an input of an alternating-current voltage is started, with a function of the switching element being made inactive, a controller executes a soft start by adjusting a pulse width when each of the thyristors is turned ON by changing a timing when each of the thyristors is turned ON based on a phase angle.

Claims

1. An AC/DC converter comprising: a PFC circuit including: a reactor; a first thyristor; a second thyristor; at least one switching element that includes a diode; and a capacitor that is arranged between a pair of pieces of direct-current output wiring on an output side relative to the reactor, the first thyristor, the second thyristor, and the at least one switching element, and a controller configured to: control turning ON and OFF the first thyristor and the second thyristor in accordance with alternately repeated positive and negative half-cycles of an alternating-current voltage; control turning ON and OFF the at least one switching element to convert the alternating-current voltage into a predetermined direct-current voltage; and when an input of the alternating-current voltage is started, with a function of the at least one switching element being made inactive, execute a soft start by adjusting a pulse width when each of the first thyristor and the second thyristor is turned ON by changing a timing when each of the first thyristor and the second thyristor is turned ON based on a phase angle.

2. The AC/DC converter according to claim 1, wherein the controller includes: a phase synchronization circuit including: a first phase synchronization circuit corresponding to a reverse phase of the alternating-current voltage and configured to output a first phase angle; and a second phase synchronization circuit corresponding to a normal phase of the alternating-current voltage and configured to output a second phase angle; a first comparator configured to compare the first phase angle with a comparison phase angle which is set in advance for execution of the soft start and output a first control signal; and a second comparator configured to compare the second phase angle with the comparison phase angle and output a second control signal, and the controller is configured to: control the turning ON and OFF of the second thyristor based on the first control signal, and control the turning ON and OFF of the first thyristor based on the second control signal.

3. The AC/DC converter according to claim 2, wherein the controller includes: a first transfer function configured to convert a distorted wave of the alternating-current voltage into a reverse-phase alternating-current voltage that is a sinusoidal wave in the reverse phase; and a second transfer function configured to convert the distorted wave of the alternating-current voltage into a normal-phase alternating-current voltage that is a sinusoidal wave in the normal phase, the first phase synchronization circuit is configured to output the first phase angle based on the reverse-phase alternating-current voltage, and the second phase synchronization circuit is configured to output the second phase angle based on the normal-phase alternating-current voltage.

4. The AC/DC converter according to claim 2, wherein the controller includes a first transfer function configured to convert a distorted wave of the alternating-current voltage into a reverse-phase alternating-current voltage that is a sinusoidal wave in the reverse phase, the first phase synchronization circuit is configured to output the first phase angle based on the reverse-phase alternating-current voltage, and the second phase synchronization circuit is configured to output the second phase angle based on a normal-phase alternating-current voltage which is obtained by inverting the reverse-phase alternating-current voltage.

5. The AC/DC converter according to claim 1, wherein the alternating-current voltage is configured with three different phases, the PFC circuit includes: a third thyristor; and a first diode, a second diode, and a third diode that are connected in series with the first thyristor, the second thyristor, and the third thyristor, respectively, with conducting directions of the first diode, the second diode, and the third diode being the same as conducting directions the first thyristor, the second thyristor, and the third thyristor, respectively, the capacitor is arranged between the pair of pieces of direct-current output wiring on the output side relative to the reactor, the first thyristor, the second thyristor, the third thyristor, the first diode, the second diode, and the third diode, and the at least one switching element, the controller includes: three phase synchronization circuits that respectively correspond to the different phases; and three comparators that are provided for the respective phases and are each configured to compare a phase angle which is output from a respective one of the phase synchronization circuits with a comparison phase angle which is set in advance for execution of the soft start and to output a respective control signal, and the controller is configured to control turning ON and OFF the first thyristor, the second thyristor, and the third thyristor based on the control signals for the respective phases.

6. The AC/DC converter according to claim 2, wherein the controller includes a gate driver configured to take an error amount of the alternating-current voltage obtained from the phase synchronization circuit, at least one of the first control signal and the second control signal as inputs and output a drive signal to turn ON or OFF each of the first thyristor and the second thyristor, and the gate driver is configured to: not output the drive signal when an absolute value of the error amount of the alternating-current voltage is equal to or larger than a predetermined threshold value, and output the drive signal when the absolute value of the error amount of the alternating-current voltage is smaller than the threshold value.

7. The AC/DC converter according to claim 3, wherein the controller includes a gate driver configured to take an error amount of the alternating-current voltage obtained from the phase synchronization circuit, the first control signal, and the second control signal as inputs and output a drive signal to turn ON or OFF each of the first thyristor and the second thyristor, and the gate driver is configured to: not output the drive signal when an absolute value of the error amount of the alternating-current voltage is equal to or larger than a predetermined threshold value, and output the drive signal when the absolute value of the error amount of the alternating-current voltage is smaller than the threshold value.

8. The AC/DC converter according to claim 4, wherein the controller includes a gate driver configured to take an error amount of the alternating-current voltage obtained from the phase synchronization circuit, the first control signal, and the second control signal as inputs and output a drive signal to turn ON or OFF each of the first thyristor and the second thyristor, and the gate driver is configured to: not output the drive signal when an absolute value of the error amount of the alternating-current voltage is equal to or larger than a predetermined threshold value, and output the drive signal when the absolute value of the error amount of the alternating-current voltage is smaller than the threshold value.

9. The AC/DC converter according to claim 5, wherein the controller includes a gate driver configured to take an error amount of the alternating-current voltage obtained from at least one of the three phase synchronization circuit and at least one of the control signals as inputs and output a drive signal to turn ON or OFF each of the first thyristor, the second thyristor, and the third thyristor, and the gate driver is configured to: not output the drive signal when an absolute value of the error amount of the alternating-current voltage is equal to or larger than a predetermined threshold value, and output the drive signal when the absolute value of the error amount of the alternating-current voltage is smaller than the threshold value.

10. The AC/DC converter according to claim 1, wherein the diode is a freewheel diode.

11. A method comprising: controlling turning ON and OFF a first thyristor and a second thyristor in accordance with alternately repeated positive and negative half-cycles of an alternating-current voltage; controlling turning ON and OFF at least one switching element to convert the alternating-current voltage into a predetermined direct-current voltage; and when an input of the alternating-current voltage is started, with a function of the at least one switching element being made inactive, executing a soft start by adjusting a pulse width when each of the first thyristor and the second thyristor is turned ON by changing a timing when each of the first thyristor and the second thyristor is turned ON based on a phase angle.

12. The method according to claim 11, further comprising: outputting a first phase angle; outputting a second phase angle; comparing the first phase angle with a comparison phase angle which is set in advance for execution of the soft start and outputting a first control signal; comparing the second phase angle with the comparison phase angle and outputting a second control signal; controlling the turning ON and OFF of the second thyristor based on the first control signal; and controlling the turning ON and OFF of the first thyristor based on the second control signal.

13. The method according to claim 12, further comprising: converting a distorted wave of the alternating-current voltage into a reverse-phase alternating-current voltage that is a sinusoidal wave in the reverse phase; and converting the distorted wave of the alternating-current voltage into a normal-phase alternating-current voltage that is a sinusoidal wave in the normal phase, wherein the first phase angle is output based on the reverse-phase alternating-current voltage, and the second phase angle is output based on the normal-phase alternating-current voltage.

14. The method according to claim 12, further comprising: converting a distorted wave of the alternating-current voltage into a reverse-phase alternating-current voltage that is a sinusoidal wave in the reverse phase; and obtaining a normal-phase alternating-current voltage by inverting the reverse-phase alternating-current voltage, wherein the first phase angle is output based on the reverse-phase alternating-current voltage, and the second phase angle is output based on the normal-phase alternating-current voltage.

15. The method according to claim 11, wherein the alternating-current voltage is configured with three different phases, and the method further comprises controlling turning ON and OFF the first thyristor, the second thyristor, and a third thyristor based on respective control signals for the different phases.

16. The method according to claim 12, further comprising: obtaining an error amount of the alternating-current voltage; not outputting a drive signal to turn ON or OFF each of the first thyristor and the second thyristor when an absolute value of the error amount of the alternating-current voltage is equal to or larger than a predetermined threshold value; and outputting the drive signal when the absolute value of the error amount of the alternating-current voltage is smaller than the threshold value.

17. The method according to claim 13, further comprising: obtaining an error amount of the alternating-current voltage; not outputting a drive signal to turn ON or OFF each of the first thyristor and the second thyristor when an absolute value of the error amount of the alternating-current voltage is equal to or larger than a predetermined threshold value; and outputting the drive signal when the absolute value of the error amount of the alternating-current voltage is smaller than the threshold value.

18. The method according to claim 14, further comprising: obtaining an error amount of the alternating-current voltage; not outputting a drive signal to turn ON or OFF each of the first thyristor and the second thyristor when an absolute value of the error amount of the alternating-current voltage is equal to or larger than a predetermined threshold value; and outputting the drive signal when the absolute value of the error amount of the alternating-current voltage is smaller than the threshold value.

19. The method according to claim 15, further comprising: obtaining an error amount of the alternating-current voltage; not outputting a drive signal to turn ON or OFF each of the first thyristor, the second thyristor, and the third thyristor when an absolute value of the error amount of the alternating-current voltage is equal to or larger than a predetermined threshold value; and outputting the drive signal when the absolute value of the error amount of the alternating-current voltage is smaller than the threshold value.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0036] FIG. 1 is diagram for explaining an application example (OBC) of a disclosed technique (AC/DC converter).

[0037] FIG. 2 is a diagram illustrating examples of a PFC circuit which can be included in the AC/DC converter.

[0038] FIG. 3 is a conceptual diagram of a state change of a direct-current bus voltage at activation.

[0039] FIG. 4 is a control block diagram concerning control of thyristors.

[0040] FIG. 5 is a diagram for explaining a flow of a process by a first transfer function.

[0041] FIG. 6 is a control block diagram of a phase synchronization circuit.

[0042] FIG. 7 illustrates one example of setting information related to control for turning ON and OFF the thyristors.

[0043] FIG. 8 is a conceptual diagram of a time chart at activation.

[0044] FIG. 9 is a conceptual diagram of a time chart in a steady condition.

[0045] FIG. 10 is a control block diagram of the PFC circuit.

[0046] FIG. 11A is a diagram illustrating results of effect inspection by a simulation.

[0047] FIG. 11B is a diagram illustrating the results of effect inspection by the simulation.

[0048] FIG. 11C is a diagram illustrating the results of effect inspection by the simulation.

[0049] FIG. 12 is a diagram of another form of the AC/DC converter (a diagram corresponding to FIG. 4).

[0050] FIG. 13A is a diagram for explaining an example of application to a three-phase PFC circuit.

[0051] FIG. 13B is a diagram for explaining an example of application to a three-phase PFC circuit.

DETAILED DESCRIPTION

[0052] The disclosed technique will hereinafter be described. However, the following descriptions are merely exemplary in nature. Configuration elements of circuits are given alphanumeric reference characters identifying them, together with predetermined symbols. For convenience, there can be a case where explanations and illustrations are made by using only those symbols. A capital character symbol I or the like denotes its maximum value (amplitude value), and a lower-case character symbol i or the like denotes its instantaneous value.

<AC/DC Converter>

[0053] FIG. 1 illustrates a vehicle-mounted charger 3 (OBC) as a preferable application example of the disclosed technique (AC/DC converter). The vehicle-mounted charger 3 is mounted on a vehicle 1 such as an electric automobile or a hybrid vehicle, together with a battery 4 with a high output which is used as a power source for traveling.

[0054] In the upper diagram in FIG. 1, the vehicle 1 and a commercial power supply 2 during charging are illustrated. The commercial power supply 2 outputs an alternating-current commercial system voltage (alternating-current voltage e.sub.ac) at a high voltage such as 100 V or 200 V. The commercial power supply 2 and the vehicle 1 are connected together by a cable, thereby performing charging of the battery 4. In this case, the vehicle-mounted charger 3 is interposed between the battery 4 and the commercial power supply 2, and converts the alternating-current voltage e.sub.ac into a direct-current voltage e.sub.dc adapted to the battery 4.

[0055] As illustrated in the middle diagram in FIG. 1, the vehicle-mounted charger 3 is configured with a DC/DC converter 5 and an AC/DC converter 6. The AC/DC converter 6 converts the input alternating-current voltage e.sub.ac into a direct-current voltage e.sub.dc and outputs that. The disclosed technique is applied to this AC/DC converter 6.

[0056] The DC/DC converter 5 is a device that converts a direct-current voltage into a different direct-current voltage. The DC/DC converter 5 converts the direct-current voltage e.sub.dc resulting from conversion in the AC/DC converter 6 into a predetermined direct-current voltage e.sub.dc and outputs that to the battery 4.

[0057] As illustrated in the lower diagram in FIG. 1, the AC/DC converter 6 includes a converter mechanism 13 and a controller 14 which controls the converter mechanism 13. The converter mechanism 13 includes a current sensor 10, an input voltage sensor 11, an output voltage sensor 12, and a PFC circuit 20. The controller 14 is an example of a controller.

[0058] The current sensor 10 is a sensor of a Hall element type. Two current sensors 10 are provided and installed at predetermined locations in the PFC circuit 20. The first current sensor 10 directly measures a value of an alternating current i.sub.ac which is input to the AC/DC converter 6 and outputs the value to the controller 14. The second current sensor 10 directly measures a value of a current (reactor current i.sub.inv) which flows through a reactor 24 described later, for example, and outputs the value to the controller 14.

[0059] The input voltage sensor 11 and the output voltage sensor 12 are also installed in predetermined locations in the PFC circuit 20. The input voltage sensor 11 directly measures a value of the alternating-current voltage e.sub.ac which is input from the commercial power supply 2 to the AC/DC converter 6 and outputs the value to the controller 14. The output voltage sensor 12 directly measures a value of the direct-current voltage e.sub.dc (direct-current bus voltage e.sub.dc) which is output from the AC/DC converter 6 and outputs the value to the controller 14.

[0060] Based on those measured values, the controller 14 outputs drive signals to thyristors 25 (SR1 and SR2) and switching elements 26 (for example, S1 and S2) and controls turning ON and OFF of them. That is, these thyristors 25 and switching elements 26 are switched at predetermined timings between a conducting state (ON) where a current flows and a non-conducting state (OFF) where no current flows.

(PFC Circuit)

[0061] FIG. 2 illustrates, as examples, two PFC circuits 20 which can be included in the AC/DC converter 6. The PFC circuit 20 of a type A is of a bridgeless type. The PFC circuit 20 of a type B is of a bridge type. A basic structure is common to both of the PFC circuits 20.

[0062] That is, each of the PFC circuits 20 has a pair of pieces of alternating-current input wiring 21 and 21, a pair of pieces of direct-current output wiring 22 and 22, a plurality of pieces of relay wiring 23 (23a and so forth) which connect portions between the pair of pieces of direct-current output wiring 22 and 22, one reactor 24, two thyristors 25 including first and second thyristors, at least one switching element 26, and one smoothing capacitor 27 which is arranged on an output side relative to the reactor 24, thyristors 25, and switching element 26.

[0063] The switching element 26 is a power semiconductor device such as an IGBT and includes a diode (freewheel diode) which is connected in antiparallel. The thyristor 25 is a commonly used electronic component as with the switching element 26, can retain the conducting state in a certain direction by being turned ON (so-called firing), and can be retained in the non-conducting state by being turned OFF (so-called turn-off).

[0064] The pair of pieces of direct-current output wiring 22 and 22 have, at their ends on the output side, a pair of output terminals (an N terminal on a grounding side and a P terminal on a non-grounding side) from which the direct-current bus voltage e.sub.dc is output.

[0065] In the PFC circuit 20 of a bridgeless type, between the pair of pieces of direct-current output wiring 22 and 22, first relay wiring 23a in which two switching elements S1 and S2 as first and second switching elements are arranged in series, second relay wiring 23b in which two thyristors SR1 and SR2 are arranged in series, and third relay wiring 23c in which the smoothing capacitor 27 (C.sub.dc) is arranged are in parallel arranged in this order from an input side toward the output side.

[0066] In the PFC circuit 20 of a bridge type, between the pair of pieces of direct-current output wiring 22 and 22, the first relay wiring 23a in which one thyristor 25 (SR2) and one diode 28 (D2) are arranged in series in this order from the non-grounding side, the second relay wiring 23b in which one thyristor 25 (SR1) and one diode 28 (D1) are arranged in series in this order from the non-grounding side, fourth relay wiring 23d in which one switching element 26 (S1) is arranged, and the third relay wiring 23c in which the smoothing capacitor 27 (C.sub.dc) is arranged are in parallel arranged in this order from the input side toward the output side.

[0067] The pair of pieces of alternating-current input wiring 21 and 21 have, at their ends on the input side, a pair of input terminals (an N terminal on the grounding side and an L terminal on the non-grounding side) to which the alternating-current voltage e.sub.ac is input. The other ends, on the output side, of the pair of pieces of alternating-current input wiring 21 and 21 are respectively connected with middle points of the first and second relay wiring 23a and 23b. Between the pair of pieces of alternating-current input wiring 21 and 21, a relay capacitor 29 (C.sub.inv) for the purpose of reducing noise is connected. Note that the relay capacitor 29 is not necessarily required.

[0068] In a case of the PFC circuit 20 of the bridgeless type, the reactor 24 (L.sub.inv) is arranged in a portion on the output side relative to the relay capacitor 29 in the alternating-current input wiring 21 on the non-grounding side. On the other hand, in a case of the PFC circuit 20 of the bridge type, the reactor 24 (L.sub.ac) is arranged in a portion between the second relay wiring 23b and the fourth relay wiring 23d in the direct-current output wiring 22 on the non-grounding side. In the case of the PFC circuit 20 of the bridge type, a third diode 28 (D3) is arranged in a portion between the fourth relay wiring 23d and the third relay wiring 23c in the direct-current output wiring 22 on the non-grounding side.

(Action in Steady Condition)

[0069] In a steady condition of the AC/DC converter 6, the controller 14 performs control such that the direct-current bus voltage e.sub.dc becomes constant at a predetermined value. That is, in accordance with alternately repeated positive and negative half-cycles of an alternating-current voltage e.sub.ac, turning ON and OFF of the first and second thyristors SR1 and SR2 are switched. Accordingly, turning ON and OFF of the corresponding switching elements S1 and S2 are controlled such that the direct-current bus voltage e.sub.dc becomes constant at the predetermined value.

[0070] Specifically, for the PFC circuit 20 of the bridgeless type, in the positive half-cycle, the first thyristor SR1 is turned OFF and the second thyristor SR2 is turned ON. In this state, turning ON and OFF of the second switching element S2 is controlled. Although known in the art, a current path CR1 at a time when the second switching element S2 is turned ON and a current path CR2 at a time when the second switching element S2 is turned OFF in this case are illustrated in FIG. 2.

[0071] In the negative half-cycle, the first thyristor SR1 is turned ON, and the second thyristor SR2 is turned OFF. In this state, turning ON and OFF of the first switching element S1 is controlled. Current paths in this case are not illustrated.

[0072] For the PFC circuit 20 of the bridge type, in the positive half-cycle, the first thyristor SR1 is turned OFF and the second thyristor SR2 is turned ON. In this state, turning ON and OFF of the switching element S1 is controlled. Although known in the art, a current path CR3 at a time when the switching element S1 is turned ON and a current path CR4 at a time when the switching element S1 is turned OFF in this case are each illustrated.

[0073] In the negative half-cycle, the first thyristor SR1 is turned ON, and the second thyristor SR2 is turned OFF. In this state, turning ON and OFF of the switching element S1 is controlled. Current paths in this case are not illustrated.

(Soft Start)

[0074] When the alternating-current voltage e.sub.ac is input to the AC/DC converter 6 in response to activation, a large current flows into the PFC circuit 20 (so-called inrush current) in order to charge the smoothing capacitor C.sub.dc. In related art, it is typical to implement a precharge circuit in an AC/DC converter in order to prevent this inrush current.

[0075] Because an amount of current that flows into the PFC circuit at the start of an input of the alternating-current voltage e.sub.ac is restricted by the precharge circuit, the inrush current can be inhibited (soft start). For the precharge circuit, a precharge circuit in which a resistance and a relay are connected in parallel is common, in which case, however, its size is likely to be large. Further, the relay might be degraded over time and cause failure.

[0076] By contrast, in the AC/DC converter 6, a precharge circuit is configured by using the thyristors 25 for the PFC circuit 20. Note that the following description assumes that the AC/DC converter 6 includes the above-described PFC circuit 20 of the bridgeless type.

[0077] FIG. 3 illustrates, as an example, a state change of the direct-current bus voltage e.sub.dc at an activation in which the soft start is executed. A time period from the start of activation to t1 corresponds to the soft start.

[0078] The table on the upper side represents settings of a first gate block signal (S.sub.GB) and a second gate block signal (S.sub.GB.CTL) which correspond to the state change of the direct-current bus voltage e.sub.dc. The first gate block signal is a control signal for gate block of the two thyristors SR1 and SR2, and the second gate block signal is a control signal for gate block of the two switching elements S1 and S2.

[0079] During execution of the soft start, the first gate block signal is in an enabling state, and functions of the two thyristors SR1 and SR2 are active. After execution of the soft start, the first gate block signal is also in the enabling state, and the functions of the two thyristors SR1 and SR2 are active.

[0080] In contrast, during execution of the soft start, the second gate block signal is in a disabling state, and functions of the two switching elements S1 and S2 are made inactive. After execution of the soft start, the second gate block signal becomes the enabling state, and the functions of the two switching elements S1 and S2 become active.

[0081] Accordingly, when the input of the alternating-current voltage e.sub.ac to the PFC circuit 20 is started, as described later in more detail, with the functions of the switching elements S1 and S2 being made inactive, the controller 14 changes a timing when each of the thyristors SR1 and SR2 is turned ON based on a phase angle which is obtained by processing the alternating-current voltage e.sub.ac in a predetermined phase synchronization circuit, and thereby adjusts a pulse width at a time when each of the thyristors SR1 and SR2 is turned ON. The soft start is thereby executed.

[0082] Accordingly, the direct-current bus voltage e.sub.dc gradually increases, and the smoothing capacitor Coc is steadily charged. Then, when the direct-current bus voltage e.sub.dc reaches a maximum value (E.sub.ac.max) of the alternating-current voltage e.sub.ac (timing of t1), the soft start is finished.

[0083] When the soft start is finished, the respective functions of the two thyristors SR1 and SR2 and two switching elements S1 and S2 are made active, and they are driven. Through control by the controller 14, the direct-current bus voltage e.sub.dc is boosted until the direct-current bus voltage e.sub.dc reaches a direct-current bus voltage command value (e.sub.dc*) as its target value. When the direct-current bus voltage command value is reached, the direct-current bus voltage e.sub.dc is retained at the voltage value (steady state).

(Control Block of Thyristors)

[0084] FIG. 4 illustrates one example of a control block concerning control of the thyristors SR1 and SR2, which is executed by the controller 14. The control block illustrated as an example is configured with a first transfer function 41a, a second transfer function 41b, first and second phase synchronization circuits 43a and 43b, a first comparator 45a, a second comparator 45b, and a first gate driver 46 for the thyristors.

[0085] Each of the first transfer function 41a and the second transfer function 41b is configured with a plurality of primary low-pass filters, for example. Furthermore, the first transfer function 41a converts a distorted wave of the alternating-current voltage e.sub.ac into a sinusoidal wave in a reverse phase. Accordingly, a signal of the alternating-current voltage e.sub.ac in the reverse phase and with no distortion is formed.

[0086] FIG. 5 illustrates, as an example, a flow of a process by the first transfer function 41a. As illustrated in the upper diagram in FIG. 5, a waveform of the alternating-current voltage e.sub.ac to be input to the AC/DC converter 6 is often distorted due to influence such as noise (distorted wave). When its distortion factor is high, a determination about a zero-crossing point or the like is influenced and it is difficult to appropriately execute control.

[0087] Accordingly, so that the influence of distortion can be eliminated, the AC/DC converter 6 processes the alternating-current voltage e.sub.ac by using the first transfer function 41a such that the alternating-current voltage e.sub.ac has a waveform with no distortion (sinusoidal wave). Specifically, as illustrated in FIG. 4, the alternating-current voltage e.sub.ac and its angular frequency (.sub.ac) are input to the first transfer function 41a.

[0088] Furthermore, as illustrated in the middle diagram in FIG. 5, a process is executed by the first transfer function 41a on a portion (solid line portion) whose phase is delayed by 180 degrees with respect to the alternating-current voltage e.sub.ac to be input. Accordingly, as illustrated in a lower diagram in FIG. 5, a signal of the alternating-current voltage e.sub.ac, which is formed with a sinusoidal wave whose phase is reverse (reverse phase) to the alternating-current voltage e.sub.ac to be input, is obtained. Here, this is assumed to be a waveform of the alternating-current voltage e.sub.ac with no phase delay. By doing so, a sinusoidal wave (e.sub.ac.y), whose phase is reverse (reverse phase) to the alternating-current voltage e.sub.ac to be actually input, is obtained (here, the reverse phase is distinguished by adding y).

[0089] In a similar manner, the second transfer function 41b converts the distorted wave of the alternating-current voltage e.sub.ac into a sinusoidal wave whose phase is the same (normal phase). For example, a process may be executed by the second transfer function 41b on a portion whose phase is delayed by 360 degrees with respect to the alternating-current voltage e.sub.ac to be input. Accordingly, a signal (e.sub.ac.x) of the alternating-current voltage e.sub.ac, which is formed with a sinusoidal wave in the normal phase whose phase is the same as the alternating-current voltage e.sub.ac to be actually input, is obtained (here, the normal phase is distinguished by adding x).

[0090] The first phase synchronization circuit 43a corresponds to the alternating-current voltage e.sub.ac in the reverse phase, and the second phase synchronization circuit 43b corresponds to the alternating-current voltage e.sub.ac in the normal phase. The first phase synchronization circuit 43a outputs a first phase angle .sub.ac.y based on a signal e.sub.ac.y of the alternating-current voltage in the reverse phase, which is obtained by the first transfer function 41a, and the angular frequency .sub.ac of the alternating-current voltage e.sub.ac. The second phase synchronization circuit 43b outputs a second phase angle .sub.ac.x based on the signal e.sub.ac.x of the alternating-current voltage in the normal phase, which is obtained by the second transfer function 41b, and the angular frequency .sub.ac of the alternating-current voltage e.sub.ac.

[0091] These phase synchronization circuits 43a and 43b synchronize the signals e.sub.ac.x and e.sub.ac.y of the alternating-current voltage in the normal phase and reverse phase with a phase of the alternating-current voltage e.sub.ac to be input to the AC/DC converter 6 and output their phase angles .sub.ac.x and .sub.ac.y. Consequently, precise phase angles .sub.ac.x and .sub.ac.y can be obtained.

[0092] FIG. 6 illustrates a control block of those phase synchronization circuits 43a and 43b. The control block is configured with a transfer function 51 composed of a predetermined low-pass filter and an integration element 52. Note that because contents of the control block are the same except a difference between the normal phase and the reverse phase being processed, for convenience, their reference characters ac.x, ac.y will be substituted and represented by in.

[0093] A signal (e.sub.in) of the alternating-current voltage in the normal phase and reverse phase to be input to the phase synchronization circuits 43a and 43b is obtained by multiplication expressed as Cos(e.sub.in)/E.sub.in.max, which is a predetermined feedback value related to the phase angle. Accordingly, an error amount (e.sub.in) of the alternating-current voltage is obtained and is processed by the transfer function 51.

[0094] Here, e.sub.in corresponds to E.sub.in.max*Sin(.sub.a). Note that .sub.a denotes the phase angle of the alternating-current voltage e.sub.ac (.sub.a denotes a phase angle of an actual commercial system voltage and an actual phase angle). Consequently, by multiplying e.sub.in by the feedback value, S.sub.in(.sub.a)*Cos() can be obtained. This corresponds to e.sub.in. Furthermore, when .sub.a= holds, a phase-locked state is established, alternating-current components are cut by the transfer function 51, and a direct-current component, that is, a deviation value (angular frequency deviation value) between an angular frequency of the actual commercial system voltage and an angular frequency (fixed angular frequency) .sub.ac of a set commercial system voltage is output.

[0095] After an output value (angular frequency deviation value) of the transfer function 51 is subtracted from the fixed angular frequency .sub.ac, this value is processed by the integration element 52. A resulting phase angle .sub.in is output from the phase synchronization circuit 43a. The feedback value can be obtained from the phase angle .sub.in and expressions indicated on a lower side in FIG. 6. Note that T.sub.ac denotes a period of the alternating-current voltage e.sub.ac, and f.sub.ac denotes a frequency of the alternating-current voltage e.sub.ac.

[0096] As illustrated in FIG. 4, the first comparator 45a compares the first phase angle .sub.ac.y output from the first phase synchronization circuit 43a with a comparison phase angle (.sub.comp) and outputs a first control signal Sy to the first gate driver 46. The comparison phase angle is a set value which is set in advance for execution of the soft start and is implemented in a memory of the controller 14.

[0097] The comparison phase angle is set to constantly change from 2 side toward side in a range (conduction width) of 180 degrees () or larger to 360 degrees (2) or smaller. As described later, a timing to turn ON each of the thyristors SR1 and SR2 is determined based on the comparison phase angle and the pulse width at a time when each of the thyristors SR1 and SR2 is turned ON is adjusted. A time corresponding to the conduction width in execution of the soft start may appropriately be set when circuit constants are designed. For example, the time corresponding to the conduction width may be set as one second.

[0098] Similarly, the second comparator 45b compares the second phase angle .sub.ac.x output from the second phase synchronization circuit 43b with the comparison phase angle and outputs a second control signal Sx to the first gate driver 46. Note that the first control signal Sy corresponds to the second thyristor SR2. The second control signal Sx corresponds to the first thyristor SR1.

[0099] To the first gate driver 46, error amounts (e.sub.ac.x and e.sub.ac.y) of the alternating-current voltage which are obtained from the first and second phase synchronization circuits 43a and 43b, together with the first and second control signals Sy and Sx, are input. To the first gate driver 46, the above-described first gate block signal (S.sub.GB) is also input. The first gate driver 46 then outputs drive signals to turn ON and OFF the first and second thyristors SR1 and SR2 to them.

[0100] Here, the first gate driver 46 does not output the drive signals when the error amount (absolute value) of the alternating-current voltage e.sub.ac is equal to or larger than a predetermined threshold value k. On the other hand, the first gate driver 46 outputs the drive signals when the error amount (absolute value) of the alternating-current voltage e.sub.ac is smaller than the threshold value k. The threshold value k is a limit value at which the phase synchronization circuits 43a and 43b can function.

[0101] Specifically, a table related to control for turning ON and OFF the thyristors SR1 and SR2, which is illustrated in FIG. 7, is set in the controller 14. When the error amount (absolute value) of the alternating-current voltage e.sub.ac in the normal phase or reverse phase is equal to or larger than the predetermined threshold value (|e.sub.in|k), the alternating current i.sub.ac becomes excessively large, and phase locking cannot be performed in each of the phase synchronization circuits 43a and 43b.

[0102] In such a case, when the thyristors SR1 or SR2 are turned ON or OFF, an excessively large inrush current might flow. In order to inhibit it, the controller 14 sets the first gate block signal (S.sub.GB) to the disabling state. Then, the controller 14 outputs a predetermined control signal (L) which makes each of the thyristors SR1 and SR2 incapable of functioning. Consequently, the drive signal is not output.

[0103] On the other hand, when the error amount (absolute value) of the alternating-current voltage e.sub.ac in the normal phase or reverse phase is smaller than the threshold value k (|e.sub.in|<k), it is assessed that each of the phase synchronization circuits 43a and 43b is in the phase-locked state, and the phase angle of the commercial system voltage which is measured is output. The controller 14 evaluates the first gate block signal. Then, when the first gate block signal is in the enabling state, the first gate driver 46 outputs the drive signal based on the first control signal Sy, controls turning ON and OFF of the second thyristor SR2, outputs the drive signal based on the second control signal Sx, and controls turning ON and OFF of the first thyristor SR1.

[0104] In such a manner, the first and second control signals Sy and Sx for controlling turning ON and OFF of the two thyristors SR1 and SR2 can be obtained by the control block which is configured with simple logic. Hence, the first and second control signals Sy and Sx can inexpensively be realized by using an I/O pin of a commercially available control microcomputer.

(Time Chart at Activation)

[0105] FIG. 8 illustrates, as an example, a time chart at activation in which the soft start is executed. The uppermost stage represents a change in the direct-current bus voltage e.sub.dc. The phase angles .sub.ac.x and .sub.ac.y periodically change in a range of 0 degree to 360 degrees (2). The first and second control signals Sy and Sx are turned OFF at the timing of 0 degree (360 degrees). Specifically, the first control signal Sy is turned OFF at timings of t2 and t6, and the second control signal Sx is turned OFF at timings of t4 and t8.

[0106] Based on that, as described above, the comparison phase angle (.sub.comp) is set in the range of 180 degrees () or larger to 360 degrees (2) or smaller, and this is compared with the phase angles .sub.ac.x and .sub.ac.y in the first comparator 45a and the second comparator 45b. Accordingly, timings for turning ON the first and second control signals Sy and Sx are determined. Specifically, the first control signal Sy is turned ON at timings of t1 and t5, and the second control signal Sx is turned ON at timings of t3 and t7.

[0107] Consequently, the pulse width at a time when the first and second thyristors SR1 and SR2 are turned ON is adjusted. As a result, the direct-current bus voltage e.sub.dc gradually increases, and the smoothing capacitor C.sub.DC is steadily charged. The soft start can appropriately be executed, and the inrush current can effectively be inhibited.

(After Completion of Soft Start)

[0108] After completion of the soft start, the steady state is established as described above, where turning ON and OFF of the first and second thyristors SR1, SR2 are switched in accordance with the alternately repeated positive and negative half-cycles of the alternating-current voltage e.sub.ac.

[0109] FIG. 9 illustrates a time chart related to control of the first and second thyristors SR1 and SR2 in the steady state. The comparison phase angle .sub.comp of each of the first comparator 45a and the second comparator 45b is constant (180 degrees: ). The pulse widths at times when the first and second thyristors SR1 and SR2 are turned ON and OFF become the same magnitude, and tuning ON and OFF of them are switched at each half cycle.

[0110] In response to that, the second gate block signal becomes the enabling state, and the functions of the two switching elements S1 and S2 become active. Then, PWM control is performed for the first and second switching elements S1 and S2, and the PFC circuit 20 executes its original control.

(Control Block of PFC Circuit)

[0111] FIG. 10 illustrates a control block of the PFC circuit 20. In order to control the PFC circuit 20, the controller 14 has a direct-current bus voltage controller 61, a current controller 63, and a second gate driver 65.

[0112] The direct-current bus voltage command value e.sub.dc* and the value of the direct-current bus voltage e.sub.dc, which is detected by the output voltage sensor 12, are input to the direct-current bus voltage controller 61, and the direct-current bus voltage controller 61 outputs an alternating current command value I.sub.ac*. An alternating current command value i.sub.ac* is obtained by multiplying the alternating current command value I.sub.ac* by S.sub.in (.sub.ac.x), and the alternating current command value i.sub.ac* is input to the current controller 63.

[0113] To the current controller 63, the value of the alternating current i.sub.ac, which is detected by the first and second current sensors 10, the value of the reactor current i.sub.inv, and the values of the alternating-current voltage e.sub.ac and the direct-current bus voltage e.sub.dc, which are detected by the input voltage sensor 11 and the output voltage sensor 12, are also input. Then, the current controller 63 calculates a duty factor command value d.sub.ac* based on those numerical values and outputs that to the second gate driver 65.

[0114] To the second gate driver 65, together with the duty factor command value d.sub.ac*, a switching frequency F.sub.s, a dead time T.sub.d, and the second gate block signal (S.sub.GB.CTL) are input. Then, the second gate driver 65 executes PWM control based on those numerical values and outputs the drive signals to turn ON and OFF the first and second switching elements S1 and S2 to them.

<Inspection of Effects by Simulation>

[0115] A simulation was performed for inspecting effects of the disclosed technique. In the simulation, the alternating-current voltage (active value) was set to 240V at a frequency of 60 Hz, and its total harmonic distortion factor (THDv) was set to 14.3%.

[0116] FIG. 11A illustrates the waveform of the alternating-current voltage e.sub.ac and waveforms of alternating-current voltages e.sub.ac.x and e.sub.ac.y which result from processes by the first transfer function 41a and the second transfer function 41b. It was observed that the unprocessed alternating-current voltage e.sub.ac had a distorted waveform (distorted wave) but waveforms with no distortion (sinusoidal waves) could be obtained for the alternating-current voltages e.sub.ac.x and e.sub.ac.y which resulted from the processes by the transfer functions 41a and 41b.

[0117] FIG. 11B and FIG. 11C illustrate time charts in activation and in the steady condition in the simulation, which correspond to FIG. 8 and FIG. 9. It was observed that even when the alternating-current voltage e.sub.ac with a high distortion factor was input, the soft start could be performed by adjusting the timings when the first and second thyristors SR1 and SR2 were turned ON without hindrance, and precharge could be performed for the direct-current bus voltage e.sub.dc. Accordingly, it was observed that a smooth transition to the steady state could be performed.

<Other Form of AC/DC Converter>

[0118] In the above-described embodiment, in order to form sinusoidal waves in the normal phase and reverse phase with no distortion from the distorted alternating-current voltage e.sub.ac, the first transfer function 41a and the second transfer function 41b are used for the respective phases (see FIG. 4). However, the second transfer function 41b which forms the sinusoidal wave in the normal phase may be omitted or simplified. Consequently, a control program can be simplified, and a processing load on the controller 14 can be reduced.

[0119] As illustrated in FIG. 12, the controller 14 in this other form has the first transfer function 41a which converts the distorted wave of the alternating-current voltage e.sub.ac into a sinusoidal wave in the reverse phase. Furthermore, the first phase synchronization circuit 43a outputs the first phase angle .sub.ac.y based on the signal e.sub.ac.y of the alternating-current voltage in the reverse phase, which is obtained by the first transfer function 41a. This point is similar to the above-described embodiment.

[0120] On the other hand, the controller 14 in this other form does not have the second transfer function 41b. Instead, the controller 14 multiplies the signal e.sub.ac.y of an alternating-current voltage formed with the sinusoidal wave in the reverse phase, which is output from the first transfer function 41a, by 1 and thereby inverts the signal. Consequently, the signal e.sub.ac.x of the alternating-current voltage formed with the sinusoidal wave in the normal phase is formed and is input to the second phase synchronization circuit 43b.

[0121] Then, the second phase synchronization circuit 43b outputs the second phase angle .sub.ac.x based on the signal e.sub.ac.x of the alternating-current voltage in the normal phase. Other configurations of the control block are the same as those of the above-described embodiment.

<Other Application Example of Disclosed Technique>

[0122] In the above-described embodiment, a case is described where the disclosed technique is applied to the AC/DC converter 6 including the single-phase PFC circuit 20. The disclosed technique can also be applied to a three-phase PFC circuit. In the following, this application example will be described. Note that because a basic circuit configuration is similar to that of the single-phase PFC circuit 20 of a bridge type and basic control actions are similar to those of the above-described embodiment, descriptions thereof will not be made.

[0123] FIG. 13A illustrates, as an example, a three-phase PFC circuit 70 to which the disclosed technique is applied. The alternating-current voltage e.sub.ac to be input to the AC/DC converter 6 is configured with three phases (U phase, V phase, and W phase) that are phases different from each other by 120 degrees.

[0124] The PFC circuit 70 is configured with one reactor 24, three thyristors 25 (SR1, SR2, and SR3) including first, second, and third thyristors, four diodes 28 (D1 to D4) including first, second, third, and fourth diodes, one switching element 26 (S1), one smoothing capacitor 27 (C.sub.dc), and three relay capacitors 29 (C.sub.u, C.sub.v, and C.sub.w).

[0125] Between a pair of pieces of direct-current output wiring 22 and 22, first to fifth relay wiring 23a to 23e are connected in parallel. As with the single-phase PFC circuit 20 of the bridge type, the reactor 24 (L.sub.dc) is arranged in the direct-current output wiring 22 on a non-contact side. The smoothing capacitor C.sub.dc is arranged in the fourth relay wiring 23d, and the switching element S1 is arranged in the fifth relay wiring 23e.

[0126] The alternating-current input wiring 21 is configured with three pieces of wiring, which correspond to the respective phases. At one end of their input side, input terminals (U terminal, V terminal, and W terminal) to which the respective phases of the alternating-current voltage e.sub.ac are input are provided. The other ends, on the output side, of those pieces of alternating-current input wiring 21 are respectively connected with middle points of the first, second, and third relay wiring 23a, 23b, and 23c. The relay capacitors C.sub.u, C.sub.v, and C.sub.w are respectively connected with portions between those pieces of alternating-current input wiring 21.

[0127] The three thyristors SR1, SR2, and SR3 respectively correspond to the phases and are arranged in the first to third relay wiring 23a to 23c. Turning ON and OFF of these thyristors SR1, SR2, and SR3 are switched in accordance with alternately repeated positive and negative half-cycles of alternating-current voltages e.sub.un, e.sub.vn, and e.sub.wn in the respective phases being input. Conducting directions of the first to third diodes D1 to D3 are respectively the same as conducting directions of the thyristors SR1, SR2, and SR3, and the first to third diodes D1 to D3 are connected in series with grounding sides of the thyristors SR1, SR2, and SR3.

[0128] FIG. 13B illustrates, as an example, a control block concerning control of the thyristors SR1, SR2, and SR3, which is executed by the controller 14. For each of the three phases, the controller 14 has a control element formed of a transfer function 71, a phase synchronization circuit 73, and a comparator 75.

[0129] Functions of each of those control elements are the same except the point that the phases of the alternating-current voltages e.sub.un, e.sub.vn, and e.sub.wn to be input are different. Their control actions are the same as that of the control block which is illustrated in FIG. 12 and corresponds to the sinusoidal wave in the normal phase.

[0130] That is, the alternating-current voltages e.sub.un, e.sub.vn, and e.sub.wn in the respective phases and angular frequencies .sub.ac of those alternating-current voltages are input to the respective control elements, and a process is executed by the transfer function 71 corresponding to the first transfer function 41a. Accordingly, alternating-current voltage signals formed with sinusoidal waves in the reverse phase can be obtained. By multiplying the alternating-current voltage signals by 1, those signals are inverted. Consequently, signals (e.sub.un.z, e.sub.vn.y, and e.sub.wn.x) of the alternating-current voltages formed with the sinusoidal waves in the normal phase are formed and are input to the respective phase synchronization circuits 73.

[0131] Accordingly, because phase angles .sub.un.z, .sub.vn.y, and .sub.wn.x are obtained for the respective phases, the respective comparators 75 compare those phase angles with the comparison phase angle .sub.comp and output control signals Sx, Sy, and Sz, for the respective phases, to the first gate driver 46. To the first gate driver 46, error amounts (e.sub.un.z, e.sub.vn.y, and e.sub.wn.x) of the alternating-current voltages, which are obtained from the respective phase synchronization circuits 73, and the first gate block signal (S.sub.GB) are also input.

[0132] Then, based on those input signals, the first gate driver 46 outputs the drive signal to each of the first, second, and third thyristors SR1, SR2, and SR3 and controls tuning ON and OFF of the first to third thyristors SR1, SR2, and SR3.

[0133] Note that the disclosed technique is not limited to the above-described embodiment and also includes various configures other than that. For example, as a control scheme for a PFC circuit, average current mode control is common. Consequently, the disclosed technique can be applied to a PFC circuit which executes the average current mode control. The disclosed technique is not limited to this and may be applied to a PFC circuit which executes peak current mode control.

REFERENCE SIGNS LIST

[0134] 1 vehicle [0135] 2 commercial power supply [0136] 3 vehicle-mounted charger [0137] 4 battery [0138] 5 DC/DC converter [0139] 6 AC/DC converter [0140] 10 current sensor [0141] 11 input voltage sensor [0142] 12 output voltage sensor [0143] 13 converter mechanism [0144] 14 controller (controller) [0145] 20 PFC circuit [0146] 21 alternating-current input wiring [0147] 22 direct-current output wiring [0148] 23a to 23e relay wiring [0149] 24 reactor [0150] 25 thyristor [0151] 26 switching element [0152] 27 smoothing capacitor [0153] 28 diode [0154] 29 relay capacitor [0155] 41a first transfer function [0156] 41b second transfer function [0157] 43a first phase synchronization circuit [0158] 43b second phase synchronization circuit [0159] 45a first comparator [0160] 45b second comparator [0161] 46 first gate driver [0162] 51 transfer function [0163] 52 integration element [0164] 61 direct-current bus voltage controller [0165] 63 current controller [0166] 65 second gate driver