CHARGE TRANSFER METHOD AND APPARATUS FOR ELECTROCHEMICAL IMPEDANCE SPECTROSCOPY

Abstract

Subjecting batteries with a plurality of cells to a balancing is known. Active balancing is carried out between adjacent cells or cell groups by means of a bus across uninvolved cells. Using this charge transfer for electrochemical impedance spectroscopy is known. The problem is to provide a system and method with which EIS measurements can be carried out on a battery using significantly less equipment outlay, with as little energy loss as possible, on batteries with high capacity and also on those with low excitation frequencies. The problem is solved in that charge is transferred back and forth between a first number of accumulator cells and a second number of accumulator cells during determination of at least one voltage value. The first and second numbers of accumulator cells are wired in series, and the first and second number is at least two.

Claims

1. A method for determining at least one impedance value of at least one accumulator cell of a first quantity of accumulator cells, wherein the first quantity of accumulator cells is formed by a first number of accumulator cells and a second number of accumulator cells, wherein at least one voltage value or voltage change, of at least one of the accumulator cells of the first number or of the second number is determined, wherein the accumulator cells of the first number are wired in series with the accumulator cells of the second number, and wherein the first number and the second number respectively is at least two, and wherein the first number of accumulator cells has at least two accumulator cells wired in series, and wherein the second number of accumulator cells has at least two accumulator cells wired in series, wherein charge is transferred back and forth between the first number of accumulator cells and the second number of accumulator cells during the determination of the at least one voltage value.

2. The method according to claim 1, wherein the accumulator cells of the first number are wired in series or wherein the accumulator cells of the second number are wired in series, or wherein the accumulator cells of the first number are wired in series with the accumulator cells of the second number, or wherein the accumulator cells of the first quantity of accumulator cells are wired in series.

3. The method according to claim 1, wherein the charge and discharge is carried out by means of at least one DC/DC converter.

4. The method according to claim 1, wherein the accumulator cells of the first quantity are accumulator cells of a single accumulator.

5. The method according to claim 1, wherein the charge transfer is effected and reversed.

6. The method according to claim 5, wherein the charge transfer and the reversed charge transfer are carried out such that in a time average over multiples of a period of a smallest contained frequency, no net charge offset takes place between the first quantity of accumulator cells and a second quantity of accumulator cells.

7. The method according to claim 4, wherein the charge transfer is carried out such that a total voltage of the first quantity of accumulator cells, of the quantities, or of the single accumulator fluctuates less than 2% or wherein the charge transfer and the reversed charge transfer or the determination of the at least one voltage value occurs during the charging or discharging.

8. The method according to claim 5, wherein a stored energy quantity effected by the charge transfer or periodically or by the method, in an energy store outside of a single accumulator and/or of the accumulator cells of the first quantity and or/or of the first quantity and additional quantities is kept less than $\frac{{\hat{l}}_f.Math.\left(U_{\mathrm{open}-\mathrm{circuit}}+{\hat{u}}_f\right)}{2.Math.f_{\min }},$ wherein î.sub.f is a maximum amplitude of the excitation signal or of the charge transfer current, U.sub.open-circuit is a nominal total voltage or total open-circuit voltage of the first quantity of accumulator cells, and û.sub.f is a maximum amplitude of the sum of the individual voltage response of the first quantity of accumulator cells.

9. An apparatus for carrying out at least one impedance measurement, configured for determining at least one impedance value of at least one accumulator cell of a first quantity of accumulator cells, wherein the first quantity of accumulator cells is formed by a first number of accumulator cells and a second number of accumulator cells, wherein the apparatus is configured to determine at least one voltage value of at least one of the accumulator cells of the first number or of the second number, wherein the accumulator cells of the first number are wired in series with the accumulator cells of the second number, and wherein the first number and the second number, respectively, are at least two, and wherein the first number of accumulator cells has at least two accumulator cells wired in series, and wherein the second number of accumulator cells has at least two accumulator cells wired in series, wherein the apparatus is configured to transfer charge back and forth between the first number of accumulator cells and the second number of accumulator cells during the determination of the at least one voltage value.

10. The apparatus according to claim 9, having a control apparatus configured for carrying out a method for determining at least one impedance value of at least one accumulator cell of a first quantity of accumulator cells, wherein the first quantity of accumulator cells is formed by a first number of accumulator cells and a second number of accumulator cells, wherein at least one voltage value or voltage change, of at least one of the accumulator cells of the first number or of the second number is determined, wherein the accumulator cells of the first number are wired in series with the accumulator cells of the second number, and wherein the first number and the second number respectively is at least two, and wherein the first number of accumulator cells has at least two accumulator cells wired in series, and wherein the second number of accumulator cells has at least two accumulator cells wired in series, wherein charge is transferred back and forth between the first number of accumulator cells and the second number of accumulator cells during the determination of the at least one voltage value.

11. The apparatus according to claim 9, wherein the apparatus is configured to temporarily store energy, only for a maximum of 1/10 of the period of the lowest frequency of the charge transfer or excitation signal for which the apparatus is configured, or for a maximum of ten times the greatest closing time of a switching element used for the charge transfer that is provided in the apparatus, in the apparatus or outside of the first quantity of accumulator cells or of an accumulator of a voltage converter, or wherein the apparatus that in sum cannot store more energy than $\frac{u_{\max }.Math.i_{\max }}{4.Math.f_{\min }}\left[[,]\right]$ wherein u.sub.max is a maximum accumulator voltage or maximum total voltage of the accumulator cells of the first quantity for which the apparatus is configured, and i.sub.max is a maximum charge transfer current intensity for which the apparatus is configured, and f.sub.min is a minimum charge transfer frequency or a minimum frequency component in the charge transfer current for which the apparatus is configured.

12. A charging device for an accumulator with a first quantity of accumulator cells, wherein the charging device has an apparatus according to claim 9 and is configured to determine the at least one impedance value.

13. A battery management system, having an apparatus according to claim 9.

14. An accumulator having a first quantity of accumulator cells and at least one battery management system according to claim 13.

15. Usage of a charge offset, between a first number of accumulator cells and a second number of accumulator cells, wherein the first number of accumulator cells and the second number of accumulator cells form a first quantity of accumulator cells, wherein the accumulator cells of the first number are wired in series with the accumulator cells of the second number, or wherein the first number and the second number is respectively at least two, and wherein the first number of accumulator cells has at least two accumulator cells wired in series, and wherein the second number of accumulator cells has at least two accumulator cells wired in series, wherein at least one voltage value of at least one of the accumulator cells of the first or of the second number is determined, for determining at least one impedance value.

16. The method according to claim 1, wherein charge is periodically transferred back and forth between the first number of accumulator cells and the second number of accumulator cells during the determination of the at least one voltage value.

17. The method according to claim 1, wherein the single accumulator does not have any additional accumulator cells.

18. The method according to claim 1, wherein the charge transfer is effected and reversed periodically.

19. The method according to claim 1, wherein the charge transfer is effected, with at least one frequency in the range between 0.1 and 10 kHz or with at least one frequency of 1 kHz or less

20. The method according to claim 1, wherein the charge transfer is effected so that frequency components of the charge transfer below 1 kHz have a charge transfer total current of at least 0.1 A.

21. The method according to claim 1, wherein the charge transfer is effected, at a nominal total voltage of the accumulator cells of the first quantity of accumulator cells of 12 V and less.

22. The method according to claim 1, wherein charge transfer current is at least 1 A.

23. The apparatus according to claim 9, wherein the apparatus is configured to periodically transfer charge back and forth between the first number of accumulator cells and the second number of accumulator cells during the determination of the at least one voltage value.

24. The usage according to claim 15, wherein said charge offset is performed periodically.

Description

[0084] Further advantages and possible embodiments are intended purely as examples in the following purely schematic figures. They show:

[0085] FIG. 1: a depiction of a prior art EIS arrangement

[0086] FIG. 2 a simplified schematic depiction of the circuit for generating the charge transfer according to the present invention

[0087] FIG. 3 a depiction of various voltages at an accumulator

[0088] FIG. 4 an idealized voltage curve of two voltage curves during the method according to the invention

[0089] FIG. 5 an arrangement with a first and a second quantity

[0090] FIG. 6 an arrangement with a galvanically isolated voltage converter

[0091] FIG. 7 a detailed depiction of an apparatus according to the invention with an accumulator

[0092] FIG. 8 a depiction of the actuation of two circuits of a rectifier from FIG. 7

[0093] FIG. 9 a depiction of a plurality of voltage converters with a shared filter for generating phase-offset current components

[0094] FIG. 10 a depiction of a plurality of voltage converters, respectively with a dedicated filter for generating phase-offset current components

[0095] FIG. 1 shows an arrangement of a first quantity of accumulator cells wired in series. Sense conductors that lead to a voltage measuring unit are arranged between each of the accumulator cells, and at the beginning and end of the series circuit. At the end and the beginning of the series circuit, there is a unit for generating the charge transfer via an optional filter, in this case from the entire arrangement of accumulator cells into a store capacitor and back. Furthermore, a unit for controlling the charge transfer is arranged in the upper region.

[0096] Referring back to the introductory depiction of the prior art, it is noted here that arrangements are known that carry out a charge offset between neighboring cells with at least one voltage converter per cell pair and do not have a store capacitor.

[0097] FIG. 2 shows an arrangement with an accumulator with a first number of accumulator cells and a second number of accumulator cells, all of which are wired in series. Between the first and the second number, a conductor for the charge transfer is arranged, which occurs by means of the voltage converter of the two conductors arranged at the positive and negative terminal of the accumulator. The voltage measurement is not shown here in the interest of clarity. Conversely, three exemplary conceivable locations for a measurement of the charge transfer current are depicted. In principle, in a symmetrical division of the accumulator cells of the first quantity into a first and second number, it would also be sufficient to measure i.sub.m. However, i.sub.Bat+ and/or i.sub.Bat− can also be determined alternatively and/or together.

[0098] FIG. 3 illustrates the voltage measurement not shown in FIG. 2. The accumulator possesses a plurality of connections for the voltage measurement (on the right in the image) and three connections for the charge transfer/left side). Depicted are the individual cell voltages of the individual accumulator cells of the first number V.sub.P1 to V.sub.Pn, and of the second number V.sub.N1 to V.sub.Nn. Therefore the accumulator is suitable for a four-point measurement at each accumulator cell, in that a charge transfer is effected by means of the connections of the left side, and voltage measurements occur by means of the right connections. The total voltage of the first number of accumulator cells V.sub.Bat+ and of the second number of accumulator cells V.sub.Bat− can also be measured.

[0099] FIG. 4 shows resulting voltages, omitting the switching artefacts of the voltage converter. In this context, V.sub.Bat is the total voltage of the accumulator. It is evident that while V.sub.Bat−, of which only a single sinus component is shown here, fluctuates sinusoidally, V.sub.Bat remains nearly constant, however.

[0100] FIG. 5 shows an arrangement with a first quantity, arranged between the uppermost three horizontal conductors, and a second quantity, arranged between the lowermost three horizontal conductors. A voltage converter is assigned to each quantity. The dots in the accumulator are intended to suggest that a plurality of not shown cells are also arranged in series here. The dots at the lower left are intended to suggest that beyond this, further additional quantities can follow, wherein the lowermost accumulator cell always belongs to the lowest quantity.

[0101] FIG. 6 shows an arrangement as in FIG. 2, however with galvanic isolation.

[0102] FIG. 7 shows a detailed depiction of an arrangement according to the invention based on the prior art of FIG. 1. A voltage converter with switches S.sub.1 and S.sub.2 depicted in detail is evident, as well as capacitors and inductors. Said voltage converter is connected to three connections of an accumulator by means of an optional, i.e. dispensable, filter, and specifically at the positive terminal, at the negative terminal, and once between the cells wired in series. The switches S1 and S2 are actuated by means of PWM by the switching signals PWM1 and PWM2, which are generated in a control and computing unit. The individual voltage measurement unit for measuring all individual voltages of the accumulator cells is depicted schematically on the right side.

[0103] FIG. 8 illustrates the switching signals PWM1 and PWM2 from FIG. 7. The duty durations d.sub.1*T.sub.pwm and d.sub.2*T.sub.pwm as well as the duty factors d.sub.1 and d.sub.2 of the switches S.sub.1 and S.sub.2 are evident, as are the delay times occurring between the duty durations.

[0104] FIG. 9 shows a parallel circuit of a plurality of voltage converters that use a shared filter, via which they are connected to accumulator cells. Such an arrangement can, for example, replace the individual voltage converters and the filter from FIG. 7. Particularly, the switches of the individual voltage converters are actuated such that they, particularly approximately (deviations result particularly from the non-synchronous actuation by the corresponding controllers), generate the same current curve, however phase-offset to one another. Additionally or alternatively, a parallel circuit of voltage converters can also be used, each having its own filter. This is shown in FIG. 10. Additionally or alternatively, a parallel circuit of voltage converters can be used, each of which generates a different current curve, particularly different frequency components. A single voltage converter, insofar as it can be switched quickly enough, can be used to generate different signal components, for example phase-offset and/or with different frequencies.