DISPLAY APPARATUS AND METHOD OF OPERATION FOR A DISPLAY APPARATUS

Abstract

A display apparatus includes a multiplicity of picture elements for emitting visible light in different colors in an adjustable manner by means of a plurality of semiconductor layer sequences. Each of the picture elements has a plurality of types of pixels and each type of pixels is configured for emitting light of a specific color. The pixels are each subdivided into a plurality of sub-pixel. All the sub-pixels are configured for emitting light of the same color out of the display apparatus without further color change. At least two sub-pixels within each pixel have emission areas of different sizes. An electrical control unit is assigned to each pixel. The control units are each configured to automatically control the sub-pixels of a relevant pixel depending on an energization intensity in such a way that a light-emitting area of the relevant pixel increases in stepped fashion with the energization intensity.

Claims

1. A display apparatus comprising a multiplicity of picture elements for emitting visible light in different colors in an adjustable manner by means of a plurality of semiconductor layer sequences, wherein each of the picture elements has a plurality of types of pixels and each type of pixel is configured for emitting light of a specific color, the pixels are each subdivided into a plurality of sub-pixels and all the sub-pixels are configured for emitting light of the same color out of the display apparatus without further color change, at least two sub-pixels within each pixel have emission areas of different sizes, an electrical control unit is assigned to each pixel, and the control units are each configured to automatically control the sub-pixels of a relevant pixel depending on an energization intensity in such a way that a light-emitting area of the relevant pixel increases in stepped fashion with the energization intensity.

2. The display apparatus as claimed in claim 1, wherein each of the picture elements is formed from a pixel for emitting red light, a pixel for emitting green light and a pixel for emitting blue light, and wherein the pixels for emitting green and blue light have a semiconductor layer sequence based on AlInGaN and the pixels for emitting red light have a semiconductor layer sequence based on AlInGaP, such that the green, blue and red light is emitted by the display apparatus without color change and as generated in the semiconductor layer sequences.

3. The display apparatus as claimed in claim 1, wherein the emission areas of the sub-pixels within a pixel increase logarithmically.

4. The display apparatus as claimed in claim 1, wherein the emission areas of the sub-pixels within a pixel increase in accordance with a power law.

5. The display apparatus as claimed in claim 1, wherein the electrical control units are fitted in each case in pixel proximity, such that a distance between the relevant control unit and the assigned pixel is at most 0.5*√{square root over (E.sub.tot)} and E.sub.tot is the total area of all the emission areas of the assigned pixel.

6. The display apparatus as claimed in claim 1, wherein all the sub-pixels of a pixel are integrated in a common semiconductor chip.

7. The display apparatus as claimed in claim 1, wherein at least some of the sub-pixels of a pixel are formed by separate semiconductor chips.

8. The display apparatus as claimed in claim 1, wherein the semiconductor chips for the sub-pixels are arranged on a common intermediate carrier comprising the assigned control unit of the relevant pixel.

9. The display apparatus as claimed in claim 1, wherein a plurality of the pixels or all the pixels are arranged on a common intermediate carrier comprising the assigned control units.

10. The display apparatus as claimed in claim 1, wherein the sub-pixels of a pixel and the assigned control unit are integrated in a common semiconductor chip.

11. The display apparatus as claimed in claim 1, wherein the sub-pixels of a pixel and the assigned control unit are arranged in overlapping fashion as seen in a plan view of the relevant emission areas.

12. The display apparatus as claimed in claim 1, wherein the control units in each case comprise a plurality of thyristors.

13. The display apparatus as claimed in claim 1, wherein the thyristors are controlled with the aid of operational amplifiers, wherein all the sub-pixels apart from the sub-pixel having the smallest emission area are connected to outputs of the associated thyristors and the sub-pixel having the smallest emission area is connected to a current line without control.

14. The display apparatus as claimed in claim 1, wherein the control units are in each case configured to switch on the sub-pixels of a pixel, ordered according to the size of the emission areas, progressively as the energization intensity increases, such that within a pixel the sub-pixels having a larger emission area are operated only when all the sub-pixels having a smaller emission area have been turned on.

15. The display apparatus as claimed in claim 1, wherein the control units are in each case configured to switch on the sub-pixels of a pixel in accordance with the energization intensity encoded as a binary number, such that the sizes of the emission areas of the sub-pixels respectively correspond to a significance of the assigned digit of the binary number.

16. The display apparatus as claimed in claim 1, which is a cinema screen with high dynamic range capability, and wherein the display apparatus is configured to emit a luminance of at least 6000 nits at certain times and at certain regions.

17. A method of operation for a display apparatus as claimed in claim 1, wherein the sub-pixels are controlled by the control units per pixel in such a way that the light-emitting area of the relevant pixel increases in stepped fashion with the energization intensity.

Description

[0061] In the figures:

[0062] FIGS. 1 and 2 show schematic illustrations of a switch-on delay as a function of a semiconductor material and a chip size,

[0063] FIG. 3 shows a schematic plan view of one exemplary embodiment of a display apparatus described here,

[0064] FIGS. 4 and 5 show schematic illustrations of an emission area as a function of an energization intensity for exemplary embodiments of display apparatuses described here,

[0065] FIG. 6 shows a schematic plan view of a picture element for exemplary embodiments of display apparatuses described here,

[0066] FIG. 7 shows a schematic plan view of one exemplary embodiment of a display apparatus described here,

[0067] FIGS. 8 and 9 show schematic plan views of pixels for exemplary embodiments of display apparatuses described here,

[0068] FIGS. 10 to 14 show schematic sectional illustrations of exemplary embodiments of pixels for display apparatuses described here,

[0069] FIGS. 15 and 16 show schematic illustrations of a profile of the emission area over the sub-pixels of a pixel for exemplary embodiments of display apparatuses described here,

[0070] FIGS. 17 and 18 show schematic illustrations of exemplary embodiments of pixels for display apparatuses described here, and

[0071] FIG. 19 shows a schematic sectional illustration of a picture element for exemplary embodiments of display apparatuses described here.

[0072] FIG. 1 shows a diagram of a temporal profile of the light intensity Iv for continuous emission areas 40R, 40G, 40B for generating red, green and blue light, respectively. The emission areas 40R, 40G, 40B are based on the material system AlInGaP for red light and on AlInGaN for green and blue light. This results in a different intrinsic switch-on delay TR, TG, TB for each of the emission areas 40R, 40G, 40B. The illustration in FIG. 1 applies to emission areas 40R, 40G, 40B embodied with the same size within the scope of the manufacturing tolerances.

[0073] In the event of simultaneous control of the emission areas, therefore, firstly electromagnetic radiation is emitted by the emission areas 40R in the red spectral range, followed only then by the beginning of the emission of radiation in the second and third emission areas 40G, 40B with a short temporal separation between them.

[0074] The intrinsic switch-on delays Tx, TX of different magnitudes can also arise as a result of a parasitic capacitance of different magnitudes at the respective emission areas 40x, 40X.

[0075] Causes of a different parasitic capacitance can be, for example, different lateral dimensions of the emission areas 40x, 40X. In this regard, the emission area 40x in FIG. 2 is smaller than the emission area 40X. Accordingly, the switch-on delay Tx is shorter than the switch-on delay TX.

[0076] Such a staggered emission of electromagnetic radiation of different wavelengths can no longer be perceived by an observer as a single mixed color, under certain circumstances, but rather can bring about the impression of a sequence of different color perceptions. Furthermore, such a high temporal difference between the switch-on points in time can have the effect that the pixels 4G, 4B with the highest intrinsic switch-on delay TG, TB within a limited time window of a pulse width modulation period during the representation of moving picture contents can be excited to emission only in part. This can give rise to an undesired deviation in the mixed color represented, in particular a red cast.

[0077] FIG. 3 illustrates an exemplary embodiment of a display apparatus 1. Many picture elements 3 are applied to a carrier 6. The picture elements 3 in each case comprise three pixels 4R, 4G, 4B for generating red, green and blue light. The pixels 4R, 4G, 4B in each case comprise a semiconductor layer sequence, not illustrated in FIG. 3.

[0078] As seen in plan view, the pixels 4R, 4G, 4B are in each case subdivided into for example three sub-pixels 5a, 5b, 5c. The sub-pixels 5a, 5b, 5c have emission areas 40a, 40b, 40c of different sizes and are controllable independently of one another. To that end, each of the pixels has a control unit 8 that controls the sub-pixels 5a, 5b, 5c depending on an energization intensity.

[0079] The control is illustrated schematically in FIG. 4. The greater the energization intensity I, the greater the number of sub-pixels 5a, 5b, 5c that are operated. In the case of very low energization intensities I, as yet no sub-pixels 5a, 5b, 5c are operated; subsequently, only the emission area 40a of the sub-pixel 5a emits light. The further sub-pixels 5b, 5c having the emission areas 40b, 40c are progressively switched on, thus resulting in a stepped profile of the emission area E operated overall as a function of the energization intensity I. The corner points of the individual steps at the jumps can lie on a straight line, in particular on a straight line extending through the origin.

[0080] FIG. 5 schematically describes an alternative switching of the sub-pixels 5a, 5b, 5c, such that a smoother profile with smaller step heights is attainable. In this case, the energization intensity I is expressed as a binary number and the sub-pixels 5a, 5b, 5c are assigned to individual digits of the binary number, wherein the significance of the digits corresponds to the size of the sub-pixels 5a, 5b, 5c. In this case, the sizes of the emission areas 40a, 40b, 40c are preferably in a ratio of 1:2:4:8 and so on.

[0081] FIG. 6 illustrates a further exemplary embodiment of a picture element 3. Per pixel 4R, 4G, 4B, a plurality of sub-pixels 5a, 5b, 5c of different sizes are present, for example in each case four of the sub-pixels 5. The sub-pixels 5a, 5b are designed such that they are comparatively large and rectangular in each case. The smallest sub-pixels 5c are square in shape, as seen in plan view, and can be present twice. A size ratio of the sub-pixels 5a, 5b, 5c to one another is 4:2:1. The control units are not illustrated in FIG. 6.

[0082] FIG. 7 illustrates a further exemplary embodiment of a display apparatus 1. The picture elements 3 are applied on a carrier 6 in matrix form in a regular square or rectangular pattern, the control units 8 being integrated in the carrier 6. The carrier 6 is a printed circuit board, for example. The individual picture elements 3 are preferably constructed as illustrated in FIG. 3, alternatively as illustrated in FIG. 6.

[0083] The display apparatus 1 is preferably suitable for 4K and has approximately 4000×2000 of the picture elements 3. The picture elements 3 are electrically controllable independently of one another. The picture elements 3 are controlled via the carrier 6.

[0084] FIG. 8 illustrates that the control unit 8 is embodied as a current switch. The control unit 8 and the for example only two sub-pixels 5a, 5b of the pixel 4 are designed in each case as a dedicated semiconductor chip 20 and fitted for example on an intermediate carrier 7, for instance a submount. An electrical connection is effected via conductor tracks 71.

[0085] In FIG. 9, by contrast, the entire pixel 4 is a separate semiconductor chip 20, into which the sub-pixels 5a, 5b, 5c and the control unit 8 are integrated. The sub-pixels 5a, 5b, 5c thus cover the control unit 8.

[0086] FIG. 10 shows a further exemplary embodiment of a display apparatus 1, wherein only one of the picture elements 3 is illustrated in order to simplify the illustration. The picture element 3 is formed by a single semiconductor chip 20, as is also possible in all the other exemplary embodiments. The individual sub-pixels 5 of the pixels 4G, 4B, 4R for generating green, blue and red light are monolithically integrated in the semiconductor chip 20 for the picture element 3.

[0087] The semiconductor chip 20 for the picture element 3 is fitted on the intermediate carrier 7, for example. The intermediate carrier 7 is based on silicon, in particular, and comprises a control circuit 75. The control circuit 75 is produced using CMOS technology in a layer of the intermediate carrier 7 that is closest to the semiconductor chip 20. The individual sub-pixels 5 can thus be electrically addressed and controlled via the control unit 8 of the intermediate carrier 7.

[0088] The intermediate carrier 7 is situated on the carrier 6. For this purpose, the intermediate carrier 7 and accordingly the carrier 6 have a plurality of electrical connection areas 76, 77. By way of example, three connection areas 76 are present for supplying energy to the intermediate carrier 7 and the picture elements 3. Moreover, by way of example, two connection areas 77 are present for a data line. An electrical connection between the connection areas 76, 77 and the control circuit 75 is effected via electrical through contacts 78, for example.

[0089] Between the semiconductor chip 20 having the sub-pixels 5 and the control circuit 75 there is for example one electrical connection more than the number of sub-pixels 5. The semiconductor chips 20 having the sub-pixels 5 can be soldered or adhesively bonded onto the intermediate carrier 7 or else be secured thereto by way of direct bonding or wafer bonding. Direct bonding or wafer bonding is employed particularly if the semiconductor chip 20 having the sub-pixels 5 is designed as a substrateless chip without a growth substrate and then has for example a thickness of at least 2 μm and/or at most 12 μm.

[0090] The exemplary embodiment in FIG. 11 illustrates that a plurality of the picture elements 3 are applied jointly on the intermediate carrier 7. A wiring and a number of conductor tracks on the carrier 6 can thus be reduced. A wiring is effected via the intermediate carrier 7 to an increased extent.

[0091] The exemplary embodiment in FIG. 12 illustrates that a thin-film transistor array 63 is fitted to the carrier 6. The picture elements 3 are electrically controlled via the thin-film transistor array 63. The picture elements 3 can thus be applied directly to the carrier 6.

[0092] In the exemplary embodiments of the pixels 4 such as can be seen in FIGS. 13 and 14, the pixels 4 are in each case fabricated from a single semiconductor layer sequence 2. In accordance with FIG. 13, an active zone 22 of the semiconductor layer sequence extends continuously across all the sub-pixels 5. The semiconductor layer sequence 2 is partly removed between adjacent sub-pixels 5, such that the sub-pixels 5 are electrically controllable independently of one another and no or no significant electrical transverse conductivity occurs between adjacent sub-pixels 5 within the semiconductor layer sequence 2. For this purpose, it is also possible, in a departure from the illustration in FIG. 13, for the active zone 22 also to be severed, the semiconductor layer sequence 2 being maintained as a continuous layer sequence.

[0093] By contrast, in accordance with FIG. 14, the semiconductor layer sequence 2 is completely removed between adjacent sub-pixels 5. In this case, during the production of the sub-pixels 5, their relative position with respect to one another is not altered during application to the carrier 6 or the intermediate carrier 7 in comparison with a growth substrate. The semiconductor layer sequence 2 thus extends with an unchanged, constant composition across the sub-pixels 5, disregarding the gaps between the sub-pixels 5.

[0094] The gaps between adjacent sub-pixels 5 are preferably at least 0.2 μm or 0.5 μm or 1 μm and/or at most 10 μm or 5 μm or 2 μm. This preferably also applies to all the other exemplary embodiments.

[0095] As also in all the other exemplary embodiments, the display apparatus 1 is preferably free of phosphors for a wavelength conversion. That is to say that the radiation generated in the respective semiconductor layer sequence 2 is emitted by the display apparatus 1 preferably directly without wavelength conversion. Notwithstanding that, color filters that only remove wavelength components, but—unlike in the case of wavelength conversion—do not add wavelength components, can optionally be present.

[0096] As also in all the exemplary embodiments, it is possible for an optical isolation, not depicted, to be introduced between adjacent pixels 4R, 4G, 4B, for example by way of diffusely reflective potting materials or by way of specularly reflective metals, for example in trenches in the semiconductor layer sequence 2.

[0097] The picture elements 3 described here can be controlled with regard to a brightness for example with a 10-bit dimming in order to attain a high brightness dynamic range. It is possible for the 10-bit control to be obtained from an 8-bit data set or a 7-bit data set by means of expansion or interpolation in order to extend the brightness range.

[0098] FIGS. 15 and 16 show how the sizes of the emission areas E.sub.i of the i-th sub-pixel are in a ratio to one another. In this regard, the emission areas E.sub.i lie on the curve of a power function in accordance with FIG. 15 and on the curve of a logarithmic function in accordance with FIG. 16.

[0099] FIGS. 17 and 18 illustrate exemplary circuits that can be used to realize the control units 8 for pixels 4 described here.

[0100] In accordance with FIG. 17, thyristors Th1, Th2 are used in order to supplementarily switch on the sub-pixels 5b, 5c, depending on the energization intensity. A respective resistance R1, R2 is electrically connected in parallel with the thyristors Th1, Th2, such that a respective gate of the thyristors Th1, Th2 is controlled by way of a voltage drop across the resistances R1, R2. The resistance R1 is greater than the resistance R2 for example by the same factor by which the luminous areas of the associated sub-pixels 5b, 5c differ from one another. For example, the resistance R1 is approximately 0.05Ω and the resistance R2 is approximately 0.1Ω. The sub-pixel 5a is controlled directly, that is to say without a thyristor.

[0101] In the case of the exemplary embodiment in accordance with FIG. 18, there are only smaller or no resistances in the main current path, with the result that a higher efficiency is attainable. The thyristors Th1, Th2 are respectively controlled via the operational amplifiers OA1, OA2. Resistances R2, R3 are connected upstream of the operational amplifiers OA1, 0A2 and resistances R4 are connected in parallel with said operational amplifiers.

[0102] Depending on a size ratio of the assigned sub-pixels 5b, 5c, it preferably holds true that R3≈R2/2. It preferably holds true, moreover, that R4>>R3 and/or R4>>R2. For the switch-on voltage V1 at the thyristor Th1 it holds true that, in particular, V1=I R1 (1+R4/R3) and, for the switch-on voltage V2 at the thyristor Th2, it correspondingly holds true that V2=I R1 (1+R4/R2). For the resistance R1 it preferably holds true that R1<<1Ω, such that R1 can be regarded as line resistance.

[0103] If more than three sub-pixels 5a, 5b, 5c are present, correspondingly more thyristors and/or operational amplifiers should be provided.

[0104] In the case of the picture element 3 in FIG. 19, all the semiconductor layer sequences 2 are based on the material system AlInGaN. The pixel 4R for generating red light therefore comprises a phosphor 9 in order to generate red light from blue or from green light as generated by the assigned semiconductor layer sequence 2. In a departure from the illustration in FIG. 19, the phosphor 9 can be structured with respect to the sub-pixels 5 in the same way as the semiconductor layer sequence 2.

[0105] Furthermore, in a departure from the illustration in FIG. 19, it is possible for there to be a continuous semiconductor layer sequence having electrically independently controllable regions for the pixels and for the sub-pixels, wherein a plurality of different phosphors, for example for generating green and red light from blue light, are then disposed downstream of said semiconductor layer sequence.

[0106] The invention described here is not restricted by the description on the basis of the exemplary embodiments. Rather, the invention encompasses any novel feature and also any combination of features, which in particular includes any combination of features in the patent claims, even if this feature or this combination itself is not explicitly specified in the patent claims or exemplary embodiments.

LIST OF REFERENCE SIGNS

[0107] 1 Display apparatus [0108] 2 Semiconductor layer sequence [0109] 20 Semiconductor chip [0110] 22 Active zone [0111] 3 Picture element [0112] 4 Pixel [0113] 40 Light-emitting area/emission area [0114] 5 Sub-pixel [0115] 50 Emission area [0116] 6 Carrier [0117] 63 Thin-film transistor array [0118] 7 Intermediate carrier [0119] 71 Electrical conductor track [0120] 76 Connection area for energy supply [0121] 77 Connection area for data line [0122] 78 Electrical through contact [0123] 8 Electrical control unit [0124] 9 Phosphor [0125] E.sub.tot Total area of all emission areas taken together [0126] I Energization intensity [0127] Iv Light intensity [0128] OA Operational amplifier [0129] R Resistance [0130] T Turn-on time [0131] Th Thyristor