Semiconductor Light-Emitting Device And Preparation Method Thereof

Abstract

Disclosed are a semiconductor light-emitting device and a preparation method of the semiconductor light-emitting device. The preparation method of the semiconductor light-emitting device includes: forming a mask layer on a substrate, the mask layer is provided with a plurality of openings exposing the substrate; etching the substrate at each of the plurality of openings to form a first groove, and forming a first reflector in the first groove; epitaxially growing a light-emitting structure on the first reflector, and the light-emitting structure includes a first conductive type semiconductor layer, a multiple quantum well layer and a second conductive type semiconductor layer epitaxial grown in sequence; forming a second reflector in one side of the light-emitting structure away from the first reflector.

Claims

1. A preparation method of a semiconductor light-emitting device, comprising: forming a mask layer on a substrate, the mask layer being provided with a plurality of openings exposing the substrate; etching the substrate at each of the plurality of openings to form a first groove, and forming a first reflector in the first groove; epitaxially growing a light-emitting structure on the first reflector, the light-emitting structure comprising a first conductive type semiconductor layer, a multiple quantum well layer and a second conductive type semiconductor layer epitaxially grown in sequence; forming a second reflector on one side of the light-emitting structure facing away from the first reflector.

2. The preparation method of a semiconductor light-emitting device according to claim 1, wherein before the forming a first reflector in the first groove, the preparation method further comprises: forming a dielectric layer on the first groove and the mask layer conformally; removing the dielectric layer from a horizontal bottom surface of the first groove to expose a bottom surface of the first groove.

3. The preparation method of a semiconductor light-emitting device according to claim 1, wherein after the forming a second reflector, the preparation method further comprises: forming a first electrode electrically connected to the first conductive type semiconductor layer and a second electrode electrically connected to the second conductive type semiconductor layer.

4. The preparation method of a semiconductor light-emitting device according to claim 3, further comprising: forming a second groove on one side of the semiconductor light-emitting device facing away from the substrate, wherein the second groove exposes one side of the first conductive type semiconductor layer facing away from the substrate, and the first electrode is arranged on the first conductive type semiconductor layer in the second groove.

5. The preparation method of a semiconductor light-emitting device according to claim 3, further comprising: arranging a third groove extending to the first conductive type semiconductor layer on a back of the substrate, wherein the first electrode is arranged in the third groove and is electrically connected to the first conductive type semiconductor layer.

6. The preparation method of a semiconductor light-emitting device according to claim 3, wherein the first reflector has electrical conductivity, and the preparation method further comprises: arranging a third groove extending to the first reflector on a back of the substrate, wherein the first electrode is arranged in the third groove and is electrically connected to the first reflector.

7. The preparation method of a semiconductor light-emitting device according to claim 3, wherein a plurality of the light-emitting structures share the second electrode.

8. The preparation method of a semiconductor light-emitting device according to claim 1, wherein the first reflector is a porous conductive structure, and the porous conductive structure comprises a first porous conductive layer and a second porous conductive layer stacked alternately and formed after electrochemical corrosion, a plurality of first holes are formed in the first porous conductive layer, a plurality of second holes are formed in the second porous conductive layer, and a diameter of each of the plurality of first holes is different from a diameter of each of the plurality of second holes.

9. The preparation method of a semiconductor light-emitting device according to claim 1, wherein the second reflector is Bragg reflector, and before the forming a second reflector, the preparation method further comprises: forming an ITO layer on one side of the light-emitting structure facing away from the first reflector, wherein the second reflector is formed on a surface of the ITO layer facing away from the first reflector.

10. The preparation method of a semiconductor light-emitting device according to claim 9, wherein a surface of the light-emitting structure facing away from the first reflector is aligned with a surface of the mask layer facing away from the substrate, a plurality of the light-emitting structures share an ITO layer.

11. The preparation method of a semiconductor light-emitting device according to claim 1, wherein the light-emitting structure comprises an oxide layer, and the oxide layer comprises a low-resistance area and a high-resistance area surrounding the low-resistance area.

12. A semiconductor light-emitting device, wherein the semiconductor light-emitting device is prepared by the preparation method of a semiconductor light-emitting device according to claim 1.

13. A semiconductor light-emitting device, comprising: a substrate; a mask layer formed on the substrate, the mask layer being provided with a plurality of openings exposing the substrate; a first groove formed by etching the substrate at each of the plurality of openings; a first reflector formed in the first groove; a light-emitting structure epitaxially grown on the first reflector, the light-emitting structure comprising a first conductive type semiconductor layer, a multiple quantum well layer and a second conductive type semiconductor layer epitaxially grown in sequence; a second reflector formed on one side of the light-emitting structure facing away from the first reflector.

14. The semiconductor light-emitting device according to claim 13, further comprising: a first electrode electrically connected to the first conductive type semiconductor layer; and a second electrode electrically connected to the second conductive type semiconductor layer.

15. The semiconductor light-emitting device according to claim 14, further comprising: a second groove formed on one side of the semiconductor light-emitting device facing away from the substrate, wherein the second groove exposes one side of the first conductive type semiconductor layer facing away from the substrate, and the first electrode is arranged on the first conductive type semiconductor layer in the second groove.

16. The semiconductor light-emitting device according to claim 14, further comprising: a third groove extending to the first conductive type semiconductor layer on a back of the substrate, wherein the first electrode is arranged in the third groove and is electrically connected to the first conductive type semiconductor layer.

17. The semiconductor light-emitting device according to claim 14, further comprising: a third groove extending to the first reflector on a back of the substrate, wherein the first reflector has electrical conductivity, and the first electrode is arranged in the third groove and is electrically connected to the first reflector.

18. The semiconductor light-emitting device according to claim 13, further comprising: an ITO layer formed on one side of the light-emitting structure facing away from the first reflector, wherein the second reflector is Bragg reflector, and the second reflector is formed on a surface of the ITO layer facing away from the first reflector.

19. The semiconductor light-emitting device according to claim 13, wherein the first reflector is a porous conductive structure, and the porous conductive structure comprises a first porous conductive layer and a second porous conductive layer stacked alternately and formed after electrochemical corrosion, a plurality of first holes are formed in the first porous conductive layer, a plurality of second holes are formed in the second porous conductive layer, and a diameter of each of the plurality of first holes is different from a diameter of each of the plurality of second holes.

20. The semiconductor light-emitting device according to claim 13, wherein the light-emitting structure comprises an oxide layer, and the oxide layer comprises a low-resistance area and a high-resistance area surrounding the low-resistance area.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0029] FIG. 1 is a flow chart of a preparation method of a semiconductor light-emitting device of a first embodiment of the present disclosure.

[0030] FIG. 2 is a schematic structural diagram of a semiconductor light-emitting device after completion of step S100 of the preparation method of the semiconductor light-emitting device according to the first embodiment of the present disclosure.

[0031] FIG. 3 is a schematic structural diagram of a semiconductor light-emitting device after completion of step S200 of the preparation method of the semiconductor light-emitting device according to the first embodiment of the present disclosure.

[0032] FIG. 4 is a schematic diagram of a first reflector in the semiconductor light-emitting device of the first embodiment of the present disclosure.

[0033] FIG. 5 is a schematic structural diagram of a semiconductor light-emitting device after completion of step S300 of the preparation method of the semiconductor light-emitting device according to the first embodiment of the present disclosure.

[0034] FIG. 6 is a schematic structural diagram of a semiconductor light-emitting device after completion of step S400 of the preparation method of the semiconductor light-emitting device according to the first embodiment of the present disclosure.

[0035] FIG. 7 is a schematic structural diagram of a semiconductor light-emitting device after completion of step S500 of the preparation method of the semiconductor light-emitting device according to the first embodiment of the present disclosure.

[0036] FIG. 8 is a schematic structural diagram of a semiconductor light-emitting device after completion of step S220 of the preparation method of semiconductor light-emitting device according to the second embodiment of the present disclosure.

[0037] FIG. 9 is the schematic structural diagram of a semiconductor light-emitting device after the completion of step S230 of the preparation method of semiconductor light-emitting device according to a second embodiment of the present disclosure.

[0038] FIG. 10 is a schematic structural diagram of a semiconductor light-emitting device according to a third embodiment of the present disclosure.

[0039] FIG. 11 is a schematic structural diagram of a semiconductor light-emitting device according to a fourth embodiment of the present disclosure.

DETAILED DESCRIPTIONS OF THE EMBODIMENTS

[0040] Exemplary embodiments will be described in detail and are illustrated in the accompanying drawings. The following description refers to the drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments are not intended to represent all implementations consistent with this disclosure. Rather, they are merely embodiments consistent with some aspects of the present disclosure, as recited in the appended claims.

First Embodiment

[0041] The first embodiment of the present disclosure provides a semiconductor light-emitting device and a preparation method of the semiconductor light-emitting device. As shown in FIG. 1, the preparation method of the semiconductor light-emitting device may include steps S100 to S400.

[0042] Step S100: forming a mask layer 2 on a substrate 1, the mask layer 2 is provided with a plurality of openings 201 exposing the substrate.

[0043] Step S200: etching the substrate 1 at each of the plurality of openings 201 to form a first groove 110, and forming a first reflector 3 in the first groove 110.

[0044] Step S300: epitaxially growing a light-emitting structure 4 on the first reflector 3, the light-emitting structure 4 includes a first conductive type semiconductor layer 401, a multiple quantum well layer 402 and a second conductive type semiconductor layer 403 grown epitaxially in sequence;

[0045] Step S400: forming a second reflector 5 on one side of the light-emitting structure 4 facing away from the first reflector 3.

[0046] In the preparation method of semiconductor light-emitting device of the first embodiment of the present disclosure, the mask layer 2 is provided with a plurality of openings 201, and are etched to form a plurality of first grooves 110 at the plurality of openings 201. The first reflector 3 is formed in each of the plurality of first grooves 110, and first reflectors 3 are spaced apart from each other, eliminating the need for a patterning step of the first reflector, which simplifies the preparation process of the semiconductor light-emitting device.

[0047] The steps of the preparation method of the semiconductor light-emitting device in the first embodiment of the present disclosure will be described in detail below:

[0048] In step S100, a mask layer 2 is formed on a substrate 1, and the mask layer 2 is provided with a plurality of openings 201 exposing the substrate.

[0049] As shown in FIG. 2, the substrate 1 may be a III-V or II-VI semiconductor material. For example, the substrate 1 may be a silicon substrate. The substrate 1 may also be a silicon carbide substrate, but the embodiment of the present disclosure is not limited thereto, and the substrate 1 may also be a sapphire substrate. The substrate 1 may also be a composite substrate, for example, epitaxial gallium nitride on silicon carbide forms a gallium nitride-silicon carbide composite substrate, and epitaxial silicon arsenide on germanium forms a silicon arsenide-germanium composite substrate. The composite substrate alleviates problems of lattice mismatch and thermal mismatch of an ordinary sapphire substrates used to grow a GaN-based semiconductor material, thereby reducing the cost of existing GaN-based semiconductor growth substrates, and improving subsequent growth quality of the light-emitting structure of GaN-based semiconductor materials.

[0050] A material of the mask layer 2 may be silicon oxide, such as SiO.sub.2. In a thickness direction of the mask layer 2, the opening 201 penetrates the mask layer 2. The number of the openings 201 may be two, four or more, and multiple openings 201 are arranged at intervals. For example, step S100 may include: forming a dielectric material layer on a substrate 1; patterning the dielectric material layer to form a mask layer 2, the mask layer 2 is provided with the opening 201 exposing the substrate 1. The dielectric material layer may be prepared by vapor deposition, and may also be prepared by other methods. In the embodiments of the present disclosure, the dielectric material layer may be patterned through a photolithography process.

[0051] In step S200, the substrate 1 is etched at the opening 201 to form a first groove 110, and a first reflector 3 is formed in the first groove 110.

[0052] As shown in FIG. 3, in the embodiment of the present disclosure, the substrate 1 may be epitaxially grown by atomic layer deposition, and may also be epitaxially grown by chemical vapor deposition, the embodiment of the present disclosure is not limited thereto. The first reflector 3 may be a Bragg reflector. Furthermore, the first reflector 3, which is the Bragg reflector, may be a porous conductive structure. As shown in FIG. 4, the porous conductive structure may include first porous conductive layers 301 and second porous conductive layers 302 alternately stacked and formed after electrochemical corrosion. A plurality of first holes may be formed in the first porous conductive layer 301, and a plurality of second holes may be formed in the second porous conductive layer 302, and a diameter of each of the plurality of first holes and a diameter of each of the plurality of second holes may be different. The difference in refractive index between the first porous conductive layer 301 and the second porous conductive layer 302 is large, which improves the reflectivity of the first reflector 3. A material of the first reflector 3 may be a III-V group semiconductor material. Taking the first reflector 3 including first porous conductive layers 301 and second porous conductive layers 302 alternately stacked as an example, the first porous conductive layers 301 and the second porous conductive layers 302 are both made of gallium nitride-based materials. For example, a material of the first porous conductive layer 301 is n-type GaN or n-type AlInGaN, and a material of the second porous conductive layer 302 is u-type GaN or u-type AlInGaN. In addition, in the embodiment of the present disclosure, a buffer layer may be formed in each opening 101 of the first groove110 before forming the first reflector 3, the first reflector 3 is formed on one side of the buffer layer facing away from the substrate 1. In actual operation, the first groove 110 may be implemented by dry etching or wet etching. The dry etching may be Inductively Coupled Plasma (ICP) etching. An etching gas may include: Cl.sub.2 and BCl.sub.3. An etching solution for wet etching may be H.sub.3PO.sub.4 solution or KOH solution.

[0053] In step S300, a light-emitting structure 4 is epitaxially grown on the first reflector 3, and the light-emitting structure 4 includes a first conductive type semiconductor layer 401, a multiple quantum well layer 402 and a second conductive type semiconductor layer 403 grown epitaxially in sequence.

[0054] As shown in FIG. 5, the light-emitting structure 4 may include a first conductive type semiconductor layer 401, an active layer 402 and a second conductive type semiconductor layer 403 stacked alternatively. The active layer 402 may be at least one of a single quantum well structure, a multiple quantum well (MQW) structure, a quantum wire structure and a quantum dot structure. Taking the active layer 402 being a multiple quantum well structure as an example, the active layer 402 may include alternately stacked potential well layers and potential barrier layers. The first conductivity type is different from the second conductivity type. The first conductive type semiconductor layer 401 may be a p-type semiconductor layer, and the second conductive type semiconductor layer 403 may be an n-type semiconductor layer, the embodiments of the present disclosure are not particularly limited thereto. In addition, the surface of each light-emitting structure 4 arranged in each opening 201 facing away from the substrate 1 may be aligned with the surface of the mask layer 2 facing away from the substrate 1.

[0055] In step S400, a second reflector 5 is formed on one side of the light-emitting structure 4 facing away from the first reflector 3.

[0056] As shown in FIG. 6, a reflectivity of the second reflector 5 may be smaller than that of the first reflector 3, and the embodiments of the present disclosure are not limited thereto. The second reflector 5 may be a Bragg reflector, and the material is at least one group of multi-period materials selected from the group consisting of TiO.sub.2/SiO.sub.2, Ti.sub.3O.sub.5/SiO.sub.2, Ta.sub.2O.sub.5/SiO.sub.2, Ti.sub.3O.sub.5/Al.sub.2O.sub.3, ZrO.sub.2/SiO.sub.2 or TiO.sub.2/Al.sub.2O.sub.3, and the embodiment of the present disclosure is not limited thereto. Before forming the second reflector 5, this embodiment may further include: forming an ITO layer 7 on one side of the light-emitting structure 4 facing away from the first reflector 3. The second reflector 5 is formed on one surface of the ITO layer 7 facing away from the first reflector 3. Taking the surface of each light-emitting structure 4 facing away from the substrate 1 being aligned with the surface of the mask layer 2 facing away from the substrate 1 as an example, a plurality of light-emitting structures 4 may share one ITO layer 7.

[0057] After the second reflector 5 is formed, as shown in FIG. 1, the preparation method of the embodiment of the present disclosure may further include the following steps.

[0058] Step S500: forming a first electrode 8 electrically connected to the first conductive type semiconductor layer 401 and a second electrode 9 electrically connected to the second conductive type semiconductor layer.

[0059] As shown in FIG. 7, the first conductive type semiconductor layer 401 has a first side surface 4011 and a second side surface 4012, the first side surface 4011 is one surface facing away from the substrate 1, and the second side surface 4012 is the other surface close to the substrate 1. A conductive groove 102 is arranged on the side of the semiconductor light-emitting device facing away from the substrate 1 , and the second groove102 exposes the first side surface 4011 of the first conductive type semiconductor layer 401 facing away from the substrate 1; the first electrode 8 is arranged on the first type semiconductor layer 401 in the second groove 102, that is, the first electrode 8 is arranged on the first side surface 4011 of the first conductive type semiconductor layer 401 , and the second electrode 9 electrically connected to the second conductive type semiconductor layer is formed. A plurality of light-emitting structures 4 may share the second electrode 9, and the second electrode 9 may be in contact with the ITO layer 7.

Second Embodiment

[0060] The preparation method of the semiconductor light-emitting device and the semiconductor light-emitting device in the second embodiment of the present disclosure is substantially the same as the preparation method of the semiconductor light-emitting device and the semiconductor light-emitting device in the first embodiment of the present disclosure, and the difference is only in that the step S200 includes:

[0061] S210: etching the substrate 1 at an opening 201 to form a first groove 101;

[0062] S220: forming a dielectric layer 6 on the first groove 101 and the mask layer 2 conformally;

[0063] S230: removing the dielectric layer 6 from a horizontal bottom of the first groove 101, and retaining the dielectric layer 6 on a sidewall of the first groove 101;

[0064] S240: forming the first reflector 3 in the first groove 101.

[0065] As shown in FIG. 8, before forming the first reflector 3 in the first groove 101, the preparation method further includes: forming a dielectric layer 6 on the first groove 101 and the mask layer 2 conformally; as shown in FIG. 9, the dielectric layer on the horizontal bottom of the first groove 101 is removed, because a thickness of the dielectric layer 2 on the horizontal bottom of the first groove101 is smaller than a thickness of the dielectric layer 6 on the sidewall of first groove 101, so the dielectric layer 6 on the horizontal bottom surface of first groove 101 is easily removed by the method of etching, and the dielectric layer 6 on the sidewall of the first groove 101 is retained. Compared with the first embodiment, the dielectric layer 6 is added to the sidewall in the second embodiment, and the material of the dielectric layer 6 and the material of the substrate 1 is different. Therefore, it is difficult for the subsequent epitaxial structure to grow on the sidewall of the first groove 101, thereby reducing the stress in the subsequent epitaxial structure, which is beneficial to improve the performance of the semiconductor light-emitting device of this embodiment.

Third Embodiment

[0066] The preparation method of the semiconductor light-emitting device and the semiconductor light-emitting device in the third embodiment of the present disclosure is substantially the same as the preparation method of the semiconductor light-emitting device and the semiconductor light-emitting device in the first or second embodiment of the present disclosure , and the difference is: as shown in FIG. 10 , the positions of the first electrode 8 are different, a third groove 103 extending to the first conductive type semiconductor layer is arranged on a back of the substrate 1 , and the first electrode 8 is arranged in the third groove 103 to be electrically connected to the first conductive type semiconductor layer 401. In this embodiment, if the first reflector 3 has conductivity, for example, the first reflector 3 is a metal reflector, or the first reflector 3 is a porous conductive structure, the above-mentioned third groove 103 is formed on the back of the substrate 1 and extend to the first reflector 3, and the first electrode 8 is arranged in the third groove 103 to be electrically connected to the first reflector 3.

[0067] The semiconductor light-emitting device in the first, second and third embodiments of the present disclosure may be a resonant chamber LED. Taking the first conductive type semiconductor layer 401 being a p-type semiconductor layer and the second conductive type semiconductor layer 403 being an n-type semiconductor layer as an example, the first electrode 8 is a p-type electrode, and the second electrode 9 is an n-type electrode. Both the material of the first electrode 8 and the material of the second electrode 9 may be at least one selected from gold, silver, aluminum, chromium, nickel, platinum, and titanium.

Fourth Embodiment

[0068] The preparation method of the semiconductor light-emitting device and the semiconductor light-emitting device in the fourth embodiment of the present disclosure is substantially the same as the preparation method of the semiconductor light-emitting device and the semiconductor light-emitting device in the first to third embodiments of the present disclosure, and the difference is only in light-emitting structure. As shown in FIG. 11, the light-emitting structure 4 of the fourth embodiment of the present disclosure may include an oxide layer 41. The oxide layer 41 may be stacked on the light-emitting layer 40 described above. The oxide layer 41 may include a low-resistance region 412 and a high-resistance region 411. The high-resistance region 411 surrounds the low-resistance region 412, and the low-resistance region forms a current aperture, that is, an internal current window, so that the light emitting device of the fourth embodiment of the present disclosure constitutes a Vertical Chamber Surface Emitting Laser (VCSEL). The low-resistance region also forms an optical path of the Vertical Chamber Surface Emitting Laser.

[0069] As shown in FIG. 11, taking the light-emitting layer 40 including a first conductive type semiconductor layer 401, an active layer 402 and a second conductive type semiconductor layer 403 stacked alternatively as an example, an oxide layer 41 may also be arranged on one side of the second conductive type semiconductor layer 403 facing away from the active layer 402. In addition, the oxide layer 41 may also be arranged in the active layer 402. The number of the oxide layers 41 may be multiple. Taking the number of oxide layers 41 being two as an example, one oxide layer 41 may be arranged in the active layer 402, and the other oxide layer 41 may be arranged on a side of the second conductive type semiconductor layer 403 facing away from the active layer 402. The oxide layer 41 in the embodiment of the present disclosure may be obtained by oxidizing a single-layer structure of AlInN, AlGaAs, AlAs, or AlN, or by oxidizing AlInN/GaN, AlN/GaN, AlGaAs/GaN, or AlAs/GaN.

[0070] The above description is only the preferred embodiment of the present disclosure, and does not limit the present disclosure in any form. Although the present disclosure has been disclosed as above in the preferred embodiment, it is not intended to limit the present disclosure. A person skilled in the art can make some changes or modifications of equivalent embodiments by using the technical content disclosed above within the scope of the technical solutions of the present disclosure. Provided that any content that does not depart from the technical solutions of the present disclosure, any simple modifications, equivalent changes and modifications made to the above embodiments by the technical essence of the present disclosure still fall within the scope of the technical solutions of the present disclosure.