Semiconductor wafer of monocrystalline silicon and method of producing the semiconductor wafer

Abstract

Epitaxially coated semiconductor wafers of monocrystalline silicon comprise a p.sup.+-doped substrate wafer and a p-doped epitaxial layer of monocrystalline silicon which covers an upper side face of the substrate wafer; an oxygen concentration of the substrate wafer of not less than 5.3×10.sup.17 atoms/cm.sup.3 and not more than 6.0×10.sup.17 atoms/cm.sup.3; a resistivity of the substrate wafer of not less than 5 mΩcm and not more than 10 mΩcm; and the potential of the substrate wafer to form BMDs as a result of a heat treatment of the epitaxially coated semiconductor wafer, where a high density of BMDs has a maximum close to the surface of the substrate wafer.

Claims

1. A method of producing a p/p.sup.+ epitaxially coated semiconductor wafer of monocrystalline silicon, comprising: pulling a single crystal of silicon at a pulling rate from a melt doped with boron in a crucible, where the concentration of oxygen in an envisaged section of the single crystal is not less than 5.3×10.sup.17 atoms/cm.sup.3 and not more than 6.0×10.sup.17 atoms/cm.sup.3 and the resistivity of this single crystal is not less than 5 mΩcm and not more than 10 mΩcm; cooling the single crystal within a first temperature range from 600° C. to 500° C., where the dwell time within the first temperature range is not less than 353 min and not more than 642 min, and cooling the single crystal within a second temperature range from 500° C. to 400° C., where the dwell time within the second temperature range is not less than 493 min and not more than 948 min; dividing a substrate wafer from the envisaged section of the cooled single crystal; and depositing a p-doped epitaxial layer of monocrystalline silicon on a polished upper side face of the substrate wafer.

2. The method of claim 1, further comprising pulling the single crystal at a pulling rate of not less than 0.4 mm/min and not more than 1.8 mm/min.

3. The method of claim 1, further comprising subjecting the melt to a magnetic field.

4. The method of claim 1, further comprising omitting deliberate addition of carbon or of nitrogen or of carbon and of nitrogen to the melt.

5. The method of claim 1, comprising cooling of the single crystal in a water-cooled cooler.

6. The method of claim 1, wherein deposition of the epitaxial layer is a first heat treatment of the substrate wafer, which is effected at a temperature of more than 700° C.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIGS. 1, 3 and 4 each show the profile of the density of BMDs (N.sub.BMD) as a function of the distance (D) from the front side of an epitaxially coated semiconductor wafer which represents an example.

(2) FIG. 2 shows the profile of the density of BMDs (N.sub.BMD) as a function of the distance (D) from the front side of an epitaxially coated semiconductor wafer which represents a comparative example.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

(3) The substrate wafer contains an amount of boron sufficient to adjust the resistivity (the specific electrical resistance) to not less than 5 mΩcm and not more than 10 mΩcm. Preferably, the resistivity is not less than 6 mΩcm and less than 10 mΩcm.

(4) The oxygen concentration of the substrate wafer is not less than 5.3×10.sup.17 atoms/cm.sup.3 and not more than 6.0×10.sup.17 atoms/cm.sup.3 (new ASTM).

(5) The substrate wafer has not been deliberately doped with carbon and therefore contains preferably not more than 1×10.sup.16 atoms/cm.sup.3 of this element, more preferably not more than 1×10.sup.15 atoms/cm.sup.3. The substrate wafer has also not been deliberately doped with nitrogen and therefore preferably contains not more than 1×10.sup.12 atoms/cm.sup.3 of this element.

(6) The thickness of the epitaxial layer is preferably not less than 1 μm and not more than 5 μm, more preferably 2 μm to 3 μm.

(7) The epitaxially coated semiconductor wafer has a denuded zone, i.e. a region which extends from the front side into the interior and in which no BMDs are formed. The denuded zone has a thickness of preferably not less than 3 μm and not more than

(8) The diameter of the epitaxially coated semiconductor wafer is not less than 200 mm, preferably not less than 300 mm.

(9) The substrate wafer contains BMD nuclei which can be developed by a heat treatment to give BMDs. The heat treatment is preferably effected in a furnace and preferably in the course of the further processing of the epitaxially coated semiconductor wafer to give electronic components.

(10) The heat treatment is conducted, for example, at a temperature of 850° C. over a period of 1 h in oxygen or, for example, at a temperature of 900° C. over a period of 30 min in argon, or is, for example, a two-stage heat treatment consisting of heating of the epitaxially coated semiconductor wafer to a temperature of 850° C. over a period of 1 h and subsequently heating to a temperature of 1000° C. over a period of 1 h in oxygen.

(11) Irrespective of which of these three options is implemented, the substrate wafer of the epitaxially coated semiconductor wafer after the implemented heat treatment or a heat treatment with a comparable thermal budget has the following properties: the density of BMDs has a maximum of not less than 2×10.sup.10/cm.sup.3, and the distance of this maximum from the front side of the epitaxially coated semiconductor wafer is not more than 20 μm. In addition, the quotient of the density of BMDs at a distance of 20 μm from the front side and the density of BMDs at a distance of 60 μm from the front side is not less than 5, where the surface of the epitaxial layer facing away from the substrate wafer forms the front side of the coated semiconductor wafer.

(12) The profile of the density of BMDs from the front side into the interior of the epitaxially coated semiconductor wafer is preferably determined by counting defects with an optical microscope, specifically at a fracture edge of the epitaxially coated semiconductor wafer after preparation (delineation) of the BMDs by RIE (reactive ion etching). The preparation method by means of RIE has been described, for example, by Nakashima et al. in the Journal of The Electrochemical Society, 147 (11), 4294-4296 (2000).

(13) The invention further provides a method of producing a p/p.sup.+ epitaxially coated semiconductor wafer of monocrystalline silicon, comprising:

(14) the pulling of a single crystal of silicon at a pulling rate from a melt doped with boron and present in a crucible, where the concentration of oxygen in an envisaged section of the single crystal is not less than 5.3×10.sup.17 atoms/cm.sup.3 and not more than 6.0×10.sup.17 atoms/cm.sup.3 and the resistivity of the single crystal is not less than 5 mΩcm and not more than 10 mΩcm;

(15) the cooling of the single crystal within a first temperature range from 600° C. to 500° C., where the dwell time within the first temperature range is not less than 353 min and not more than 642 min, and the cooling of the single crystal within a second temperature range from 500° C. to 400° C., where the dwell time within the second temperature range is not less than 493 min and not more than 948 min;

(16) the dividing of a substrate wafer from the envisaged section of the cooled single crystal; and

(17) the depositing of a p-doped epitaxial layer of monocrystalline silicon on a polished upper side face of the substrate wafer.

(18) The dwell time within the first temperature range is preferably not less than 353 min and not more than 514 min. The dwell time within the second temperature range is preferably not less than 493 min and not more than 759 min.

(19) Within a third temperature range from 1000° C. to 800° C., the dwell time is preferably not less than 105 min and not more than 157 min.

(20) There are important differences from the process described in DE 10 2014 221 421 B3. The melt is doped with a greater amount of boron, such that the resistivity of the single crystal is not less than 5 mΩcm and not more than 10 mΩcm, preferably not less than 6 mΩcm and less than 10 mΩcm.

(21) In addition, in the cooling of the single crystal, it is ensured that the single crystal cools down comparatively slowly within the temperature range from 600° C. to 500° C. and within the temperature range from less than 500° C. to 400° C.

(22) The single crystal can be cooled down, for example, in the presence of a water-cooled cooler. The dwell times envisaged may especially be established via the arrangement and the performance of the cooler and via the pulling rate with which the single crystal is pulled out of the melt. A favorable combination of arrangement, power and pulling rate can be discovered, for example, via simulation calculations. It is also possible to dispense with the cooler. In this case, the pulling rate necessary for the desired dwell times needs to be determined for a given configuration of the apparatus for pulling the single crystal.

(23) The pulling rate is preferably not less than 0.4 mm/min and not more than 1.8 mm/min, this range being crucial particularly for pulling of single crystals having diameters of 200 mm, 300 mm or greater.

(24) The melt is preferably subjected to a magnetic field. The magnetic field is preferably a horizontal magnetic field.

(25) Deliberate doping of the melt with carbon or with nitrogen or with carbon and nitrogen is omitted.

(26) As described, for example, in DE 10 2014 221 421 B3, the pulled single crystal is processed further to give substrate wafers of monocrystalline silicon, and the substrate wafers to give epitaxially coated semiconductor wafers. The operating steps preferably include the mechanical processing of a substrate wafer, for example the lapping and/or the grinding of the side faces of the substrate wafer, and the rounding of the edge of the substrate wafer. The substrate wafer is preferably also subjected to chemical etching and chemical-mechanical polishing. It therefore has a polished edge and at least one polished side face. Preferably, the upper and lower side faces are polished. The epitaxial layer of silicon is deposited on a polished side face. This step is preferably conducted in a single-wafer reactor, for example in a reactor of the Centura® type supplied by Applied Materials. The deposition gas preferably contains a hydrogen-containing silane, for example trichlorosilane (TCS), and a dopant-containing gas. The deposition temperature in the case of use of TCS is within a temperature range of preferably not less than 1000° C. and not more than 1250° C.

(27) The deposition of the epitaxial layer is the first heat treatment of the substrate wafer, which is effected at a temperature of more than 700° C.

(28) The invention is described further hereinafter with reference to drawings and examples.

(29) Example:

(30) A single crystal of monocrystalline silicon was pulled by the CZ method at a pulling rate of 0.57 mm/min. The single crystal was cooled using a water-cooled cooler. The melt had been doped with boron only and had been subjected to a horizontal magnetic field. Details of dwell times (dt) with which the single crystal has been cooled within the crucial temperature intervals can be found in the table below. Substrate wafers divided from the single crystal with a diameter of 300 mm and a thickness of 775 μm, an oxygen concentration of 5.7×10.sup.17/cm.sup.3 and a resistivity of 9 mΩcm were processed further to give p/p.sup.+ epitaxially coated semiconductor wafers of silicon. The thickness of the epitaxial layer was 3 μm.

(31) The potential of such an epitaxially coated semiconductor wafer to be able to form BMDs was ascertained after the two-stage heat treatment (850° C., 1 h and 1000° C., 1 h, each in oxygen) of the epitaxially coated semiconductor wafer by means of RIE and defect counts in an optical microscope. An RIE system of the Plasmalab System 133 type from the manufacturer OXFORD INSTRUMENTS was used in conjunction with HBr, O.sub.2, Cl.sub.2 and Ar as gases for etching. At a pressure of 2 Pa and with an rf power of 350 W, etching was effected with a selectivity in the region of 1:100 (SiO.sub.2:Si).

(32) FIG. 1 shows the profile of the density of BMDs (N.sub.BMD) as a function of the distance (D) from the front side of an epitaxially coated semiconductor wafer. Accordingly, there is a rise in the density of BMDs even at a comparatively small distance from the front side to a maximum of somewhat less than 1×10.sup.11/cm.sup.3, in order then to drop to values in the region of 5×10.sup.9/cm.sup.3 within a comparatively short distance.

(33) Comparative Example:

(34) A single crystal of monocrystalline silicon was pulled by the CZ method at a pulling rate of 0.57 mm/min. Details of dwell times (dt) with which the single crystal was cooled in particular temperature intervals can be found in the table below. Substrate wafers divided from the single crystal with a diameter of 300 mm and a thickness of 775 μm, an oxygen concentration of 5.5×10.sup.17/cm.sup.3 and a resistivity of 8 mΩcm were processed further to give p/p.sup.+ epitaxially coated semiconductor wafers of silicon. The thickness of the epitaxial layer was 3 μm.

(35) The potential of such an epitaxially coated semiconductor wafer to be able to form BMDs was ascertained after the two-stage heat treatment (850° C., 1 h and 1000° C., 1 h, each in oxygen) of the epitaxially coated semiconductor wafer by means of RIE and defect counts in an optical microscope.

(36) FIG. 2 shows the profile of the density of BMDs (N.sub.BMD) as a function of the distance (D) from the front side of an epitaxially coated semiconductor wafer. Accordingly, no maximum of BMDs with the required property is obtained close to the front side and the density of BMDs remains clearly below 1×10.sup.10/cm.sup.3.

(37) TABLE-US-00001 TABLE dt 1000° C.- dt 700° C.- dt 600° C.- dt 500° C.- 800° C. 600° C. 500° C. 400° C. (min) (min) (min) (min) Example 147 218.5 390.5 562.5 Comparative 365 255 285 400 example

(38) The data show that the dwell time in the temperature ranges from 600° C. onward is of particular significance. It must be comparatively long in order that the desired BMD profile can develop.

(39) A similar profile of BMD densities is also obtained when, instead of the two-stage heat treatment, one of the above-described heat treatments is conducted.

(40) FIG. 3 shows the profile of the density of BMDs (N.sub.BMD) as a function of the distance (D) from the front side of a semiconductor wafer epitaxially coated according to the example after a heat treatment in a furnace at a temperature of 850° C. in oxygen over a period of 1 h.

(41) FIG. 4 shows the profile of the density of BMDs (N.sub.BMD) as a function of the distance (D) from the front side of a semiconductor wafer epitaxially coated according to the example after a heat treatment in a furnace at a temperature of 900° C. in argon over a period of 30 min.

(42) The above description of illustrative embodiments should be regarded as an illustration. The disclosure that has thus been made enables the person skilled in the art firstly to understand the present invention and the associated advantages, and secondly encompasses, within the understanding of the person skilled in the art, obvious alterations and modifications to the structures and methods described as well. Therefore, all such alterations and modifications and equivalents shall be covered by the scope of protection of the claims.