Passivation process

Abstract

A passivation process includes the successive steps of a) providing a stack having, in succession, a substrate based on crystalline silicon, a layer of silicon oxide, and at least one layer of transparent conductive oxide; and b) applying a hydrogen-containing plasma to the stack, step b) being executed at a suitable temperature so that hydrogen atoms of the hydrogen-containing plasma diffuse to the interface between the substrate and the layer of silicon oxide.

Claims

1. A passivation process comprising the successive steps of: a) providing a stack comprising, in succession, a substrate based on crystalline silicon, a layer of silicon oxide, and at least one layer of transparent conductive oxide; and b) applying a hydrogen-containing plasma to the stack, step b) being executed at a suitable temperature for the hydrogen-containing plasma so that hydrogen atoms of the hydrogen-containing plasma diffuse from the hydrogen-containing plasma to the interface between the substrate and the layer of silicon oxide.

2. The process according to claim 1, wherein the hydrogen-containing plasma applied in step b) contains at least one gas selected from NH.sub.3 and H.sub.2.

3. The process according to claim 1, wherein a temperature at which step b) is executed is comprised between 340° C. and 600° C.

4. The process according to claim 1, wherein the hydrogen-containing plasma is applied in step b) with a power density comprised between 1×10.sup.−3 W.Math.cm.sup.−2 and 2×10.sup.−2 W.Math.cm.sup.−2.

5. The process according to claim 1, wherein the hydrogen-containing plasma is applied in step b) with a pressure comprised between 1.5 torr and 2.5 torr.

6. The process according to claim 1, wherein step b) is executed under an atmosphere containing an inert gas selected from Ar and N.sub.2.

7. The process according to claim 1, wherein step b) is executed for a time comprised between 5 minutes and 90 minutes.

8. The process according to claim 1, wherein the layer of silicon oxide of the stack provided in step a) has a thickness smaller than or equal to 4 nm.

9. The process according to claim 1, wherein the at least one layer of transparent conductive oxide has a total thickness comprised between 10 nm and 200 nm.

10. The process according to claim 1, wherein the transparent conductive oxide is selected from an indium oxide and a zinc oxide.

11. The process according to claim 10, wherein the transparent conductive oxide is selected from a zinc oxide, an aluminum-doped zinc oxide and a boron-doped zinc oxide.

12. The process according to claim 1, wherein step a) comprises a step a.sub.1) consisting in forming a layer of alumina on the one or more layers of transparent conductive oxide.

13. The process according to claim 12, wherein step a.sub.1) is executed so that the layer of alumina has a thickness smaller than or equal to 20 nm.

14. The process according to claim 12, wherein step a.sub.1) is executed using a deposition technique chosen from ALD, physical vapor deposition (PVD) and chemical vapor deposition (CVD).

15. The process according to claim 1, wherein step a) is executed so that a layer of polysilicon is inserted between the layer of silicon oxide and the one or more layers of transparent conductive oxide.

16. The process according to claim 1, wherein a temperature at which step b) is executed is comprised between 400° C. and 550° C.

17. The process according to claim 1, wherein the hydrogen-containing plasma is applied in step b) with a power density comprised between 5×10.sup.−3 W.Math.cm.sup.−2 and 1×10.sup.−2 W.Math.cm.sup.−2.

18. The process according to claim 1, wherein the hydrogen-containing plasma is applied in step b) with a pressure comprised between 1.7 torr and 2.2 torr.

19. The process according to claim 1, wherein step b) is executed for a time comprised between 10 minutes and 30 minutes.

20. The process according to claim 10, wherein the indium oxide is chosen from indium-tin oxide, a fluorine-doped indium oxide, a hydrogen-containing indium oxide and a tungsten-doped indium oxide, and the zinc oxide is chosen from an aluminum-doped zinc oxide and a boron-doped zinc oxide.

21. The process according to claim 1, wherein: providing the stack comprises providing the at least one layer of transparent conductive oxide having a first layer formed by atomic layer deposition (ALD) on the layer of silicon oxide and a second layer formed by physical vapor deposition (PVD) on the first layer.

22. The process according to claim 21, wherein each of the first and second layers comprises zinc oxide.

23. The process according to claim 21, wherein each of the first and second layers comprises aluminum-doped zinc oxide.

24. The process according to claim 21, comprising forming the first layer directly on the silicon oxide layer.

25. The process according to claim 1, comprising thermally diffusing the hydrogen atoms of the hydrogen-containing plasma to the interface between the substrate and the layer of silicon oxide.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Other features and advantages will become apparent from the detailed description of various embodiments of the invention, the description containing examples and references to the appended drawings.

(2) FIG. 1 is a schematic cross-sectional view illustrating a first embodiment of a stack subjected to a process according to the invention.

(3) FIG. 2 is a schematic cross-sectional view illustrating a second embodiment of a stack subjected to a process according to the invention.

(4) FIG. 3 is a schematic cross-sectional view illustrating a third embodiment of a stack subjected to a process according to the invention.

(5) FIG. 4 is a schematic cross-sectional view illustrating a fourth embodiment of a stack subjected to a process according to the invention.

(6) The figures are not to scale to simplify comprehension thereof.

DETAILED DESCRIPTION OF EMBODIMENTS

(7) For the sake of simplicity, elements that are identical or that perform the same function have been designated with the same references in the various embodiments.

(8) One subject of the invention is a passivation process comprising the successive steps of: a) providing a stack I comprising, in succession, a substrate 2 based on crystalline silicon, a layer of silicon oxide 3, and at least one layer of transparent conductive oxide; and b) applying a hydrogen-containing plasma to the stack 1, step b) being executed at a suitable temperature so that hydrogen atoms of the hydrogen-containing plasma diffuse to the interface I between the substrate 2 and the layer of silicon oxide 3.
Stack

(9) The substrate 2 preferably has a thickness strictly smaller than 250 μm. The silicon on which the substrate 2 is based may be single-crystal silicon or polysilicon. The substrate 2 may be doped n-type or p-type. The stack 1 may incorporate, on its front side and/or its back side, a homojunction photovoltaic cell, for example a PERC photovoltaic cell (PERC being the acronym of “Passivated Emitter and Rear Cell”).

(10) The layer of silicon oxide 3 of the stack 1 provided in step a) advantageously has a thickness smaller than or equal to 4 nm, and preferably smaller than or equal to 2 nm. Generally, the layer of silicon oxide 3 is sufficiently thin to not significantly affect the electrical conductivity of the stack 1, with respect to movement of charge carriers. Step a) is executed so that the layer of silicon oxide 3 is introduced between the substrate 2 and the one or more layers of transparent conductive oxide 4. The stack 1 is devoid of a layer of amorphous silicon.

(11) The one or more layers of transparent conductive oxide 4 are advantageously formed on the layer of silicon oxide using a deposition technique chosen from atomic layer deposition (ALD), physical vapour deposition (PVD), and plasma-enhanced chemical vapour deposition (PECVD). The one or more layers of transparent conductive oxide 4 advantageously have a total thickness comprised between 10 nm and 200 nm. The transparent conductive oxide is advantageously selected from an indium oxide and a zinc oxide. The indium oxide is preferably chosen from indium-tin oxide, a fluorine-doped indium oxide, a hydrogen-containing indium oxide and a tungsten-doped indium oxide. The zinc oxide is preferably chosen from an aluminium-doped zinc oxide and a boron-doped zinc oxide. The transparent conductive oxide is advantageously selected from a zinc oxide, an aluminium-doped zinc oxide, and a boron-doped zinc oxide.

(12) A single layer of transparent conductive oxide 4 is illustrated in the appended figures, but it is entirely envisageable to provide a stack of a plurality of layers of transparent conductive oxide 4, which layers may for example be made from different transparent conductive oxides.

(13) As illustrated in FIGS. 2 and 4, step a) advantageously comprises a step a.sub.1) consisting in forming a layer of alumina 5 on the one or more layers of transparent conductive oxide 4. Step a.sub.1) is advantageously executed so that the layer of alumina 5 has a thickness smaller than or equal to 20 nm, and preferably comprised between 2 nm and 10 nm. Step a.sub.1) is advantageously executed using a deposition technique chosen from atomic layer deposition (ALD), physical vapour deposition (PVD), and chemical vapour deposition. The chemical vapour deposition may be plasma-enhanced chemical vapour deposition (PECVD).

(14) In the absence of a layer of alumina 5, the one or more layers of transparent conductive oxide 4 advantageously have a total thickness comprised between 10 nm and 80 nm. Such a thickness range allows the best results to be obtained in terms of implied open-circuit voltage (iVoc) when the one or more layers of transparent conductive oxide 4 are deposited by PVD or ALD.

(15) In the presence of a layer of alumina 5, the one or more layers of transparent conductive oxide 4 advantageously have a total thickness comprised between 40 nm and 200 nm. Such a thickness range allows the best results to be obtained in terms of iVoc when the one or more layers of transparent conductive oxide 4 are deposited by ALD. It has been observed that the presence of a layer of alumina 5 has little influence on the iVoc when the one or more layers of transparent conductive oxide 4 are deposited by PVD.

(16) As illustrated in FIGS. 3 and 4, step a) may be executed so that a layer of polysilicon 6 is inserted between the layer of silicon oxide 3 and the one or more layers of transparent conductive oxide 4.

(17) Hydrogen-Containing Plasma

(18) The hydrogen-containing plasma applied in step b) advantageously contains at least one gas selected from NH.sub.3 and H.sub.2. Step b) may be executed under an atmosphere containing an inert gas selected from Ar and N.sub.2.

(19) The temperature at which step b) is executed is advantageously comprised between 340° C. and 600° C., preferably comprised between 400° C. and 550° C., and more preferably comprised between 400° C. and 500° C.

(20) The hydrogen-containing plasma is advantageously applied, in step b), with a power density comprised between 1×10.sup.−3 W.Math.cm.sup.−2 and 2×10.sup.−2 W.Math.cm.sup.−2, and preferably comprised between 5×10.sup.−3 W.Math.cm.sup.−2 and 1×10.sup.−2 W.Math.cm.sup.−2. The hydrogen-containing plasma is advantageously applied, in step b), with a pressure comprised between 1.5 torr and 2.5 torr (i.e. comprised between 200 Pa and 333 Pa), and preferably comprised between 1.7 torr and 2.2 torr (i.e. comprised between 226 Pa and 293 Pa). Step b) is advantageously executed for a time comprised between 5 minutes and 90 minutes, and preferably comprised between 10 minutes and 30 minutes.

(21) Fabrication of a Photovoltaic Cell

(22) For application to fabrication of photovoltaic cells, the process may comprise a step c) consisting in forming an electrical contact on the stack 1.

(23) Step c) is executed after step b).

(24) By way of example, the electrical contact may be obtained using an electrically conductive screen-printing paste formed on the one or more layers of transparent conductive oxide 4. The screen-printing paste advantageously possesses a baking temperature lower than or equal to 600° C.

Example of an Embodiment

(25) The stack 1 provided in step a) comprised, in succession, a substrate 2 based on single-crystal silicon, a layer of silicon oxide 3, a layer of transparent conductive oxide 4 made of aluminium-doped zinc oxide (AZO), and a layer of alumina 5. The layer of silicon oxide 3 had a thickness of about 4 nm. The layer of transparent conductive oxide (TCO below) had a thickness of 40 nm and was deposited by ALD. The layer of alumina 5 had a thickness of 10 nm. Step b) was executed by applying an NH.sub.3 plasma, with a power density of about 9.2×10.sup.−3 W/cm.sup.2. The temperature at which step b) was executed was about 500° C. It was possible to observe an implied open-circuit voltage (iVoc) of about 716 mV after step b), indicating an excellent passivation of the interface I between the substrate 2 and the layer of silicon oxide 3. By way of comparison, the implied open-circuit voltage of the stack 1 was lower than 580 mV before step b).

Other Examples of Embodiments

(26) The stack 1 provided in step a) comprised, in succession, a substrate 2 based on single-crystal silicon, a layer of silicon oxide 3, a layer of transparent conductive oxide 4 made of aluminium-doped zinc oxide (AZO), and where appropriate a layer of alumina 5. The layer of transparent conductive oxide (TCO below) had a variable thickness and was deposited by PVD or ALD. Step b) was executed by applying an NH.sub.3 plasma, with a power density of about 9.2×10.sup.−3 W/cm.sup.2. The temperature at which step b) was executed was comprised between 450° C. and 500° C. The results of the experiments in terms of implied open-circuit voltage (iVoc) are collated in the table below.

(27) TABLE-US-00001 Deposition Thickness (nm) of Total thickness technique for the the layer of iVoc (nm) of TCO(s) one or more TCOs alumina (mV) 20 PVD 0 632 40 PVD 0 595 80 PVD 0 570 20 PVD 10 575 40 PVD 10 585 80 PVD 10 602 20 ALD 10 670 40 ALD 10 630 120 ALD 10 705

(28) An increase in the value of iVoc (of between 14 mV and 32 mV) with respect to a stack 1 simply subjected to a thermal anneal at between 450° C. and 500° C., i.e. in the absence of a treatment in a hydrogen-containing plasma in step b), was observed. Thus, such a process according to the invention allowed the passivation of the surface of the substrate to be improved, despite the presence of the one or more TCOs 4, and by virtue of step b).

(29) In addition, it may be seen that the presence of the layer of alumina 5 had little influence when the one or more TCOs 4 are deposited by PVD. In contrast, the layer of alumina 5 allowed the passivation properties to be improved when the one or more TCOs 4 were deposited by ALD.

(30) In another example of an embodiment, the stack 1 provided in step a) comprised, in succession, a substrate 2 based on single-crystal silicon, a layer of silicon oxide 3, and a monolayer of transparent conductive oxide 4 made of aluminium-doped zinc oxide (AZO). The monolayer made of AZO was deposited by PVD and possessed a thickness of 40 nm. Step b) was executed by applying an NH.sub.3 plasma, with a power density of about 9.2×10.sup.−3 W/cm.sup.2. The temperature at which step b) was executed was about 500° C. It was possible to observe an implied open-circuit voltage of about 597 mV after step b). The same experiment was carried out with a bilayer of transparent conductive oxide 4 made of AZO, comprising a first layer of AZO of 20 nm deposited by ALD and a second layer of AZO of 40 nm deposited by PVD. It was possible to observe an implied open-circuit voltage of about 630 mV after step b). It may be concluded that the addition of the first layer of AZO of 20 nm deposited by ALD allowed the implied open-circuit voltage to be increased, and thus improved the passivation of the interface between the substrate and the layer of silicon oxide.

(31) The invention is not limited to the described embodiments. Those skilled in the art will be able to consider technically operable combinations thereof, and to substitute equivalents therefor.