OPTOELECTRONIC SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD

Abstract

In at least on embodiment, the optoelectronic semiconductor device comprises a semiconductor layer sequence which has an n-side stack, a p-side stack and an active region between the n-side stack and the p-side stack of a pn-junction, wherein the n-side stack comprises a second layer being doped with two different n-type dopants, a first one of the n-type dopants has an atomic number of at most 14 and a second one of the n-type dopants is S, Se or Te, the n-side stack further comprises a first layer being doped with the second one of the n-type dopants, and the second layer is located between the active region and the first layer.

Claims

1. An optoelectronic semiconductor device comprising a semiconductor layer sequence which has an n-side stack, a p-side stack and an active region between the n-side stack and the p-side stack of a single or multi pn-junction, wherein the n-side stack comprises a second layer containing two different n-type dopants, a first one of the n-type dopants has an atomic number of at most 14 and a second one of the n-type dopants is S, Se or Te, the n-side stack further comprises a first layer being doped with the second one of the n-type dopants only or predominantly, and the second layer is located between the active region and the first layer.

2. The optoelectronic semiconductor device according to claim 1, AlInGaAsP material system, region starts at a beginning of a first quantum structure that produces radiation in an intended use of the optoelectronic semiconductor device and at an intended emission wavelength of the optoelectronic semiconductor device, and Te, and .

3. The optoelectronic semiconductor device according to claim 1, the first layer is doped with the second one of the n-type dopants only so that a cumulative doping concentration of all other dopants together is at most 110.sup.17 cm.sup.3 and/or the doping concentration of the second one of the n-type dopants exceeds said cumulative doping concentration by at least a factor of 10.

4. The optoelectronic semiconductor device according to claim 1, n average or peak doping concentration of the first one of the n-type dopants in second layer is at least 10.sup.16 cm.sup.3 and is at most 610.sup.18 cm.sup.3.

5. The optoelectronic semiconductor device according to claim 4, local doping concentration of the first one of the n-type dopants in the second layer is at least 0.7 times the peak doping concentration of the first one of the n-type dopants in the second layer.

6. The optoelectronic semiconductor device according to claim 1, second layer is applied with an interval doping and/or a ramped doping.

7. The optoelectronic semiconductor device according to claim 1, wherein a thickness of the second layer is at least 20 nm and is at most 1 m.

8. The optoelectronic semiconductor device according to claim 1, wherein a doping concentration of the second one of the n-type dopants decays by at least a factor of three over the second layer and towards the active region so that at the active region the doping concentration of the second one of the n-type dopants is at most 110.sup.18 cm.sup.3.

9. The optoelectronic semiconductor device according to claim 1, a peak doping concentration of the second one of the n-type dopants in the first layer is at least 110.sup.17 cm.sup.3 and is at most 510.sup.19 cm.sup.3.

10. The optoelectronic semiconductor device according to claim 1, a thickness of the first layer is at least 25 nm and is at most 4 m.

11. The optoelectronic semiconductor device according to claim 1, first layer is at least 0.7 times the peak doping concentration of the first one of the n-type dopants in the first layer.

12. The optoelectronic semiconductor device according to claim 1, wherein the n-side stack further comprises a segregation layer directly between the active region and the second layer, wherein an average or maximum n-doping concentration in the segregation layer is at most 310.sup.17 cm.sup.3.

13. The optoelectronic semiconductor device according to claim 12, wherein an average or maximum doping concentration of the first one of the n-dopants is at most 110.sup.17 cm.sup.3 and a maximum doping concentration of the second one of the n-type dopants is at least 310.sup.16 cm.sup.3 and at most 110.sup.18 cm.sup.3 in the segregation layer.

14. The optoelectronic semiconductor device according to claim 12, wherein the segregation layer includes at least one of a ramp layer in which an Al content decreases towards the active region or a non-radiative pre-quantum well structure.

15. The optoelectronic semiconductor device according to claim 12, 5 nm and is at most 400 nm.

16. The optoelectronic semiconductor device according to claim 1, compared with the first layer, the second layer has an increased Al proportion.

17. The optoelectronic semiconductor device according to claim 1, first layer remote from the active region, at least one of the first one or the second one of the n-type dopants only.

18. The optoelectronic semiconductor device according to claim 1, which is a light-emitting diode for emitting incoherent radiation,

19. The optoelectronic semiconductor device according to claim 1,

20. A manufacturing method for producing an optoelectronic semiconductor device according to claim 1, wherein producing the n-side stack of the semiconductor layer sequence includes the following steps: growing the first layer and providing only or predominantly the second one of the n-type dopants during growth of the first layer, and growing the second layer directly on the first layer and providing only or predominantly the first one of the n-type dopants during growth of the second layer.

Description

[0079] In the figures:

[0080] FIGS. 1 to 3 are schematic sectional views of exemplary embodiments of optoelectronic semiconductor devices described herein,

[0081] FIG. 4 is a schematic representation of a secondary-ion mass spectrometry measurement of an exemplary embodiment of an optoelectronic semiconductor device described herein,

[0082] FIGS. 5 and 6 are schematic representations of doping profiles in first layers of exemplary embodiments of optoelectronic semiconductor devices described herein,

[0083] FIG. 7 is a schematic block diagram of an exemplary embodiment of a manufacturing method for optoelectronic semiconductor devices described herein,

[0084] FIG. 8 is a schematic representation of a secondary-ion mass spectrometry measurement of a modified optoelectronic semiconductor device, and

[0085] FIGS. 9 to 20 are schematic representations of secondary-ion mass spectrometry measurements of exemplary embodiments of optoelectronic semiconductor devices described herein.

[0086] FIG. 1 illustrates an exemplary embodiment of an optoelectronic semiconductor device 1. The optoelectronic semiconductor device 1 comprises a semiconductor layer sequence 2 based on GaAlInP or also on InAlGaAs depending on the desired emission wavelength. The semiconductor layer sequence 2 comprises an n-side stack 21, a p-side stack 23 and an active region 22 between the n-side stack 21 and the p-side stack 23. The active region 22 is grown on the n-side stack 21 so that a growth direction G of the semiconductor layer sequence 2 runs from the n-side stack 21 towards the p-side stack 23. The active region 22 is a MQW structure, for example, and may be configured to produce red light.

[0087] The n-side stack 21 includes a first layer 33, like a current spreading layer which is followed along the growth direction G directly by a second layer 32, which is, for example, an n-junction layer. The second layer 32 may be next to the active region 22. Moreover, the n-side stack 21 is doped with two different n-type dopants.

[0088] The first-grown first layer 33 is doped with a second one of the n-type dopants only. The second dopant is, for example, Te, Se or S. The second dopant extends into the second-grown second layer 32, however, the second layer 32 is predominantly doped with a first one of the n-type dopants. The first dopant is Si, for example.

[0089] As mentioned above, the semiconductor layer sequence is based on the AlGaInP material system. For example, the In proportion is adjusted such that the crystal lattice is close to lattice matching with GaAs, while the Al/Ga ratio may be tuned freely.

[0090] In FIG. 2, another example of the optoelectronic semiconductor device 1 is shown. In this example, the semiconductor layer sequence 2 is placed on a carrier 4 which is different from a growth substrate of the semiconductor layer sequence 2. Thus, the p-side stack 23 is next to the carrier 4. The semiconductor layer sequence 2 may be attached to the carrier 4 by means of soldering, for example. It is possible that the semiconductor layer sequence 2 narrows in a direction away from the carrier 4. Thus, it is possible that the semiconductor layer sequence 2 has the shape of a truncated pyramid.

[0091] The semiconductor layer sequence 2 as shown in FIG. 2 may constitute a pixel of the optoelectronic semiconductor device 1. Optionally, there is a plurality of such pixels so that the optoelectronic semiconductor device 1 could include an array of light-emitting units which are, for example, produced from the semiconductor layer sequence 2 by etching.

[0092] Optionally, the p-side stack 23 includes a p-contact layer 39 next to the carrier 4 and a p-junction layer 38 next to the active region 22. For example, the p-contact layer 39 is heavily p-doped and the thicker p-junction layer 38 is only moderately p-doped.

[0093] Further optionally, the n-side stack 21 may include a segregation layer 31 which can be located directly between the active region 22 and the second layer 32. The segregation layer 31 may nominally be undoped, that is, during growth of the segregation layer 31 no dopant may be provided. However, as the segregation layer 31 may still be n-conductive because of being grown after the first layer 33, for example, the segregation layer 31 may be n-conductive and may thus be regarded as being part of the n-side stack 21.

[0094] In addition, the semiconductor layer sequence 2 could include a roughening layer 34 at a side of the first layer 33 remote from the active region 22. The roughening layer 34 can be provided with a roughening for improved coupling out of light produced in the active region 22 during operation of the optoelectronic semiconductor device 1.

[0095] Along the growth direction G, the roughening layer 34, if present, or the first layer 33 may optionally be preceded by an n-contact layer 35. If there is the roughening, it is possible that the n-contact layer 35 is present only at one or a plurality of relatively small portions on a side of the semiconductor layer sequence 2 remote from the carrier 4.

[0096] The semiconductor layer sequence 2 and the corresponding pixel can electrically be contacted by means of the carrier 4 which can thus include an electric p-contact 41. At the n-contact layer 35, an electric n-contact 42 can be applied. The electric contacts 41, 42 may be metallic contacts. Further, there can be metallic, dielectric and/or totally reflecting mirror elements for improved efficiency, not shown.

[0097] Other than shown in FIG. 2, it is possible that the n-contact layer 35 is a continuous, hole-free layer directly between the second layer 33 and the roughening layer 34. In this case, the contact layer 33 is locally exposed from the roughening layer 34 where the electric n-contact 42 layer is placed. This variant as well as the variant shown in FIG. 2 is possible in all examples of the optoelectronic semiconductor device 1.

[0098] Side faces of the semiconductor layer sequence 2 may be provided with at least one passivation layer, not shown.

[0099] For further details on the semiconductor layer sequence 2 and on the electric contacting, see also documents US 2019/0386175 A1 and US 2022/0384680 A1, the disclosure content of which is hereby incorporated by reference.

[0100] Otherwise, the same as to FIG. 1 may also apply to FIG. 2, and vice versa.

[0101] In FIG. 3, a further electric contact scheme is illustrated that could also apply to all examples of the optoelectronic semiconductor device 1. In this case, the semiconductor layer sequence 2 is electrically contacted from one single side via the carrier 4. The electric contacts 41, 42 include through-contacts 411, 421 which run though a mirror 6 between the semiconductor layer sequence 2 and the carrier 4. The electric p-contact 41 is arranged on the carrier 4 but is electrically insulated from remaining portions of the carrier 4. Further, the electric n-through-contact 421 runs through the active region 22 into the first layer 33 which is in this case at the same time the n-contact layer 35. In a lateral direction, the through-contact 421 is electrically insulated from the semiconductor layer sequence so that the through-contact 421 is in direct electric contact only with the first layer 33 and the carrier 4 that itself serves as the electric n-contact 42. A further layer 330 serves in this configuration as the current spreading layer. Hence, the second layer 32 configured as, for example, the n-junction layer is directly followed by the first layer 33 which is the n-contact layer being directly followed by the current spreading layer 330.

[0102] Otherwise, the same as to FIGS. 1 and 2 may also apply to FIG. 3, and vice versa.

[0103] In FIG. 4, a secondary-ion mass spectrometry, SIMS, measurement of an exemplary embodiment of the optoelectronic semiconductor device 1 is shown. The measurement may be done along a depth D direction, hence along the direction D which is anti-parallel to the growth direction G there may occur some fading-out. Illustrated are the concentrations of Al, Si and Te as measured. The optoelectronic semiconductor device 1 is based on GaAlInP and is configured to emit visible light.

[0104] The semiconductor layer sequence 2 may be grown on a growth substrate which is, for example, of GaAs, not shown. Directly at the growth substrate, there can optionally be a buffer layer on which the contact layer 35 is grown; in FIG. 4 the buffer layer is not shown. The contact layer 35 is followed by the roughening layer 34. The buffer layer and the growth substrate may not be present in the finished optoelectronic semiconductor device 1. The layers 37, 35, 34 are part of the n-side stack 21 and can all be doped with Te with different doping concentrations. In the respective layers, the doping concentrations may approximately and/or nominally be constant.

[0105] Next, there is the first layer 33 configured as, for example, the current spreading layer. This first layer 33 has in this example a thickness of around 500 nm and is nominally of AlInP doped with Te only with a concentration of about 410.sup.18 cm.sup.3. The presence of Si in the first layer 33 may be considered as being an artifact along the depth D direction stemming from the SIMS measurement.

[0106] Then, the second layer 32 which is, for example, the n-junction layer, follows and is nominally doped only with Si.

[0107] As segregation of Te occurs on top of the first layer 33, the Te continues to be present in the second layer 32 but the Te concentration decays towards the active region 22. In the second layer 32, the concentration of Si may be higher than the concentration of Te, however, the Si concentration in the second layer 32 is lower than the Te concentration in the first layer 33. The Te concentration in the first layer 33 and the Si concentration in the second layer 32 are constant throughout these layers 32, 33 within manufacturing tolerances.

[0108] In the example shown, the second layer 32 is of AlInP and has a thickness of about 200 nm and a Si concentration of nominally 210.sup.18 cm.sup.3. The Te decays from around 110.sup.18 cm.sup.3 to around 710.sup.16 cm.sup.3 across the second layer 32.

[0109] Optionally, there is the segregation layer 31 directly between the active region 22 and the second layer 32. The segregation layer 31 is nominally undoped or lowly doped. There are only minor traces of Si present in the segregation layer 31. The Te further decays from about 710.sup.16 cm.sup.3 to around 510.sup.16 cm.sup.3 across the segregation layer 31 so that at the beginning of the active region 22 there is only a quite minor Te concentration not disturbing the electroluminescence occurring in the active region 22. A thickness of the segregation layer 31 is in this example about 50 nm and includes a thin layer of AlInP, a thin composition ramp and a thin cladding of quantum barrier material, which are not distinguished due to scan resolution limitations.

[0110] Directly on the segregation layer 31, there is the active region 22 comprising the MQW structure and followed along the growth direction G by the p-side stack 21 which is made of AlInP, too.

[0111] Otherwise, the same as to FIGS. 1 to 3 may also apply to FIG. 4, and vice versa.

[0112] According to FIG. 4, the nominal doping concentrations of Si in the second layer 32 and of Te especially in the layers 33, 34, 37 are constant throughout the respective layer. In FIG. 5 it is shown that rampage doping can also be used for the second dopant, like Te. Thus, for example in the first layer 33 there can be an increase of the doping concentration C2 of the second dopant to a peak doping concentration C2p which may optionally be followed by a decay. According to FIG. 6, there is an interval doping of the second dopant. Interval and rampage doping may be combined with each other.

[0113] The concentration C2 in FIGS. 5 and 6 may be shown logarithmically or linearly.

[0114] The same applies analogously for the second layer 32 and the Si doping. Hence, the first dopant, like Si, can also be provided by using rampage doping or interval doping or any mixture thereof.

[0115] Otherwise, the same as to FIGS. 1 to 4 may also apply to FIGS. 5 and 6, and vice versa.

[0116] In FIG. 7, schematically a manufacturing method of the optoelectronic semiconductor device 1 is shown. In method step S1, the growth substrate 5 is provided and the layers 37, 35 and 34 may be grown. During this growth, the second one of the n-type dopants may be provided, like Te, especially only the second one of the n-type dopants.

[0117] In method step S2, the first layer 33 is grown. During growing the first layer 33, only the second one of the n-type dopants is provided, like Te. Hence, nominally there is no Si doping of the first layer 33.

[0118] Afterwards, in method step S3 the second layer 32 is grown directly on the first layer 33. During growth of the second layer 32, only the first one of the n-type dopants, like Si, is provided.

[0119] Then, in method step S4, the optional segregation layer 31 is grown without providing any n-type dopant, followed by growing the active region 22 and the p-side stack 23. Further optionally, method step S4 may include providing the carrier 4 and removing the growth substrate 5, and forming the at least one pixel as well as providing the roughening. Moreover, at least one passivation layer can be applied in this method step and electrical contacts may be applied, for example.

[0120] Otherwise, the same as to FIGS. 1 to 6 may also apply to FIG. 7, and vice versa.

[0121] In FIG. 8, a SIMS measurement of a modified semiconductor device 9 is illustrated. In this modified semiconductor device 9, there is no doping with the first one of the n-type dopants. Especially there is only Te doping in the n-side stack 21. Therefore, the segregation layer 31 needs to be much thicker and has in this example a thickness of around 300 nm to achieve the same low Te concentration of about 510.sup.16 cm.sup.3 at the beginning of the active region 22.

[0122] Thus, compared with the embodiment of FIG. 4, in the modified semiconductor device 9 the segregation layer 31 needs to be significantly thicker.

[0123] In FIG. 9, a further example of the optoelectronic semiconductor device 1 is shown which is also configured for emitting visible light. In this case, the second layer 32 may directly adjoin the active region 22 or there may be a thin intermediate layer with a thickness of at most 20 nm or of at most 10 nm or of at most 5 nm or of at most 2 nm, for example. Further, the n-contact layer 35 is located between the first layer 33 configured as a current spreading layer and the roughening layer 34. In FIG. 9 it is further shown that the n-contact layer 35 can be of multi-layer fashion; this is also possible in all other examples of the optoelectronic semiconductor device 1.

[0124] Similar to FIG. 4, such a semiconductor layer sequence 2 may be used for devices with the general configuration of FIG. 2, for example.

[0125] Otherwise, the same as to FIGS. 1 to 8 may also apply to FIG. 9, and vice versa.

[0126] In the example of the optoelectronic semiconductor device 1 of FIG. 10 the n-contact layer 35 is the first layer directly between the first layer 33 and the further layer 330 which is the current spreading layer. The optoelectronic semiconductor device 1 of FIG. 10 is for emission of visible light, too.

[0127] Otherwise, the same as to FIGS. 1 to 9 may also apply to FIG. 10, and vice versa.

[0128] In FIG. 11, an optoelectronic semiconductor device 1 is shown which is configured for emitting near-IR radiation. Thus, the semiconductor layer sequence 2 is based on InAlGaAs. As in the InAlGaAs material system the Te concentration decays comparably fast, the second layer 32 being, for example, the n-junction layer, can be comparably thin. For example, a thickness of the second layer 32 is at least 50 nm and/or is at most 300 nm. In FIG. 11, the second layer 32 has a thickness of about 150 nm. Moreover, the second layer 32 can directly be at the active region 22 or there may be a thin intermediate layer with a thickness of at most 20 nm or of at most 10 nm or of at most 5 nm or of at most 2 nm, for example.

[0129] The first layer 33 can be the current spreading layer and may be comparably thick. For example, the thickness of the first layer 33 is at least 500 nm and/or is at most 2 m. In FIG. 11, said thickness is about 1000 nm. Next to the first layer 33 there is the roughening layer 34. It is possible that there is no need for a dedicated n-contact layer. However, an n-contact layer and/or a segregation layer could also be present in IR devices analogous to visible light emitting optoelectronic semiconductor devices 1.

[0130] For example, a doping concentration of Si and Te, respectively, in the second layer 32 and in the first layer 33 is about the same and is constant within the manufacturing tolerances across the respective layer. For example, said doping concentration is 210.sup.18 cm.sup.3.

[0131] Other than in visible light-emitting devices 1, at the second layer 32 the Al proportion may be increased.

[0132] Otherwise, the same as to FIGS. 1 to 10 may also apply to FIG. 11, and vice versa.

[0133] The optoelectronic semiconductor device 1 of FIG. 12 is also based on InAlGaAs for IR emission and is based on the example of FIG. 11. Other than in FIG. 11, according to FIG. 12 the roughening layer 34 is also doped with Si. Especially, the roughening layer 34 could be doped with both Si and Te. It is possible that the Si doping concentration exceeds the Te doping concentration, for example, by at least a factor of 10 and/or by at most a factor of 1000. In the example of FIG. 12, the Si doping concentration in the roughening layer 34 is 1.510.sup.18 cm.sup.3 and the Te doping concentration is quite low at 210.sup.16 cm.sup.3. The first layer 33 is only lowly doped with Te or free of Te which may mean that the Te concentration in the first layer is below 110.sup.16 cm.sup.3 or below 510.sup.15 cm.sup.3.

[0134] Otherwise, the same as to FIG. 11 may also apply to FIG. 12, and vice versa.

[0135] Finally, in FIG. 13 the IR-emitting optoelectronic semiconductor device 1 comprises a plurality of the active regions 22, for example, two of them. Between the active regions 22, there is a tunnel junction 5 and also one of the second layers 32. The second layer 32 between the active regions 22 may be thinner than the second layer 32 next to the first layer 33. In both second layers 32 the Te content may decay along the direction of growth so that both second layers 32 are intentionally doped during growth only with Si.

[0136] The tunnel junction 5 can also be doped with Te, especially only with Te; the Si in the tunnel junction 5 seen in FIG. 13 can be regarded an artifact of the SIMS measurement. For example, a peak doping concentration of Te in the tunnel junction 5 is at least 210.sup.19 cm.sup.3 and/or at most 210.sup.20 cm.sup.3. For example, compare FIG. 13, said Te concentration is 110.sup.20 cm.sup.3.

[0137] If there are more than two of the active regions 22, between each pair of the active regions 22 there can be one of the thinner second layers 32 and one of the tunnel junctions 5.

[0138] Otherwise, the same as to FIGS. 11 and 12 may also apply to FIG. 13, and vice versa.

[0139] FIG. 14 essentially corresponds to the example of FIG. 14. However, the segregation layer 31 is indeed a layer stack and further includes a ramp concerning the Al content and an n setback layer between the active region 22 and said ramp. The n setback layer and the ramp are shown exaggerated in FIG. 14. For example, the ramp and the n setback layer have a thickness of at most 100 nm and of at least 10 nm or a thickness of at most 70 nm and of at least 20 nm and might therefore difficult to be distinguishable in a SIMS scan but might be visible with better depth resolution or in TEM rather than in SIMS.

[0140] Analogously, FIG. 15 is based on FIG. 8, and the segregation layer 31 in this case also includes the ramp and/or the n setback layer. As in all other examples, optionally the n setback layer may be of a material the barrier layers between the quantum wells of the active region 22 are made of. For example, the n setback layer is a thicker barrier layer.

[0141] In the same manner, FIGS. 16 to 20 corresponds to FIGS. 9 to 13, respectively, but including in each case the segregation layer 31 as of, for example, FIG. 14 or FIG. 15. In case of FIG. 20, the segregation layer 31 can be present for each one of the active areas 22.

[0142] Otherwise, the same as to FIGS. 1 to 13 may also apply to FIGS. 14 to 20, and vice versa.

[0143] Thus, in the optoelectronic semiconductor devices 1 described herein there is a group VI doped first layer 33, doped with S, Se or Te, in the n-side layer stack which is typically either a contact layer or a current spreading layer stack. It is highly doped with >>510.sup.16 cm.sup.3 but the doping concentration of this layer is at most 510.sup.19 cm.sup.3 and it is not part of a tunnel junction 5 that one would use in LEDS with stacked active regions 22.

[0144] There could be other layers inside the n-side stack not explicitly listed above, like etch-stop layers, defect-blocking layers, metal-diffusion-suppression layers and/or cladding/spacer/buffer layers, like the Te-segregation layer 31. The same applies analogously for the p-side stack.

[0145] The n-junction layer, that is, the second layer 32, is mostly Si-doped in order to increase the distance of highly Te doped layers from the active region 22. In visible LEDs this is done in order to decrease the Te surface accumulation concentration before the active region 22. A background Te concentration can remain during to the dopant segregation decay; typically, the Te supply is shut off, but possibly one could even supply Te precursor with a very low concentration of at most 510.sup.16 cm.sup.3 in order to prevent crystal ordering phenomena. In infrared LEDs this is done in order to separate diffusively mobile Te-induced crystal defects from the active region. Te doping with concentrations>>510.sup.16 cm.sup.3 would typically only be used where it is really needed, namely in an n-current spreading layer and/or in an n-contact layer. Very small concentrations of Te of at most 510.sup.16 cm.sup.3 could possibly be used to exploit surfactant properties during crystal growth.

[0146] The components shown in the figures follow, unless indicated otherwise, exemplarily in the specified sequence directly one on top of the other. Components which are not in contact in the figures are exemplarily spaced apart from one another. If lines are drawn parallel to one another, the corresponding surfaces may be oriented in parallel with one another. Likewise, unless indicated otherwise, the positions of the drawn components relative to one another are correctly reproduced in the figures.

[0147] The invention described here is not restricted by the description on the basis of the exemplary embodiments. Rather, the invention encompasses any new feature and also any combination of features, which includes in particular any combination of features in the patent claims, even if this feature or this combination itself is not explicitly specified in the patent claims or exemplary embodiments.

LIST OF REFERENCE SIGNS

[0148] 1 optoelectronic semiconductor device [0149] 2 semiconductor layer sequence [0150] 21 n-side stack [0151] 22 active region [0152] 23 p-side stack [0153] 31 segregation layer [0154] 32 second layer [0155] 33 first layer [0156] 330 further layer [0157] 34 roughening layer [0158] 35 n-contact layer [0159] 38 p-junction layer [0160] 39 p-contact layer [0161] 4 carrier [0162] 41 electric p-contact [0163] 411 electric p-through-contact [0164] 42 electric n-contact [0165] 421 electric n-through-contact [0166] 5 tunnel junction [0167] 6 mirror [0168] 9 modified semiconductor device [0169] C concentration [0170] C2 local concentration of the second one of the n-type dopants [0171] C2p peak concentration of the second one of the n-type dopants [0172] D depth [0173] G growth direction [0174] S method step