Lighting circuit of automotive lamp
11653434 · 2023-05-16
Assignee
Inventors
- Tomoyuki Ichikawa (Shizuoka, JP)
- Ryosuke Matsuhana (Shizuoka, JP)
- Satoshi Kikuchi (Shizuoka, JP)
- Naoki Kawabata (Shizuoka, JP)
- Norito Takahashi (Shizuoka, JP)
Cpc classification
H05B47/17
ELECTRICITY
International classification
Abstract
A lighting circuit turns on a plurality of semiconductor light sources. Multiple current sources are each coupled to a corresponding semiconductor light source. A switching converter supplies a driving voltage V.sub.OUT across each of multiple series connection circuits each formed of the semiconductor light source and the current source. A converter controller employing a ripple control method turns on a switching transistor of the switching converter in response to a voltage across any one of the multiple current sources decreasing to a bottom limit voltage.
Claims
1. A current driver circuit structured to drive a plurality of semiconductor light sources, the current driver circuit comprising: a plurality of current sources each structured to allow an on/off state thereof to be controlled independently according to a PWM signal, and to each be coupled to a corresponding semiconductor light source in series; an interface circuit structured to receive, from an external processor at a first time interval T1, a plurality of control data that indicates an on/off duty cycle for the plurality of current sources; and a dimming pulse generator structured to generate a plurality of PWM signals for the plurality of current sources, and to gradually change, at a second time interval T2 that is shorter than the first time interval T1, a duty cycle of each of the plurality of PWM signals from a value indicated by the corresponding control data before updating to a value indicated by the corresponding control data after updating, wherein, the dimming pulse generator is switchable between a first mode and a second mode according to setting data, and wherein, with T1/T2=a, and with the difference in the value between the control data after updating and the control data before updating as ΔX, (i) in the first mode, the dimming pulse generator changes the duty cycle at the second time interval T2 in a stepwise manner in steps of ΔY=ΔX/a, and (ii) in the second mode, the dimming pulse generator immediately changes the duty cycle from a value indicated by the corresponding control data before updating to a value indicated by the corresponding control data after updating.
2. The current driver circuit according to claim 1, wherein each of the plurality of current sources comprises: a series transistor and a sensing resistor arranged in series with a corresponding semiconductor light source; an error amplifier structured to adjust a voltage of a control electrode of the series transistor based on a voltage drop that occurs across the sensing resistor; and a PWM switch arranged between a gate and a source of the series transistor.
3. The current driver circuit according to claim 1, wherein the first mode and the second mode are switchable for each of the plurality of current sources independently.
4. The current driver circuit according to claim 1, wherein the setting data is appended to the control data.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) Embodiments will now be described, by way of example only, with reference to the accompanying drawings which are meant to be exemplary, not limiting, and wherein like elements are numbered alike in several Figures, in which:
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DETAILED DESCRIPTION OF THE INVENTION
(47) Description will be made below regarding the present invention based on preferred embodiments with reference to the drawings. The same or similar components, members, and processes are denoted by the same reference numerals, and redundant description thereof will be omitted as appropriate. The embodiments have been described for exemplary purposes only, and are by no means intended to restrict the present invention. Also, it is not necessarily essential for the present invention that all the features or a combination thereof be provided as described in the embodiments.
(48) In the present specification, the state represented by the phrase “the member A is coupled to the member B” includes a state in which the member A is indirectly coupled to the member B via another member that does not substantially affect the electric connection between them, or that does not damage the functions or effects of the connection between them, in addition to a state in which they are physically and directly coupled.
(49) Similarly, the state represented by the phrase “the member C is provided between the member A and the member B” includes a state in which the member A is indirectly coupled to the member C, or the member B is indirectly coupled to the member C via another member that does not substantially affect the electric connection between them, or that does not damage the functions or effects of the connection between them, in addition to a state in which they are directly coupled.
(50) In the present specification, the reference symbols denoting electric signals such as a voltage signal, current signal, or the like, and the reference symbols denoting circuit elements such as a resistor, capacitor, or the like, also represent the corresponding voltage value, current value, resistance value, or capacitance value as necessary.
Overview of the Embodiments 1 Through 5
(51) An embodiment of the present invention disclosed in the present specification relates to a lighting circuit structured to be capable of turning on multiple semiconductor light sources. The lighting circuit includes: multiple current sources each of which is to be coupled to a corresponding semiconductor light source; a switching converter structured to supply a driving voltage across each of multiple series connection circuits each formed of the semiconductor light source and the current source; and a converter controller employing a ripple control method. The converter controller turns on the switching transistor of the switching converter in response to a voltage across any one of the multiple current sources decreasing to a bottom limit voltage.
(52) The bottom limit voltage is maintained at the minimum level that ensures that each current source is able to generate a predetermined driving current. This arrangement allows power loss to be reduced for each current source.
(53) Also, the converter controller may turn off the switching transistor after the on time elapses after the switching transistor is turned on.
(54) Also, the on time may be feedback controlled such that the switching frequency of the switching transistor approaches a target frequency.
(55) Also, the converter controller may turn off the switching transistor in response to the driving voltage reaching an upper limit voltage.
(56) Also, the upper limit voltage may be feedback controlled such that the switching frequency of the switching transistor approaches a target frequency.
(57) Also, the multiple current sources may each be structured to allow the on/off state thereof to be controlled independently. Also, the bottom limit voltage may be raised according to a reduction in the number of on-state current sources from among the multiple current sources. This arrangement is capable of preventing the switching frequency from becoming excessively low in a light load state. In a case in which the bottom limit voltage is raised, this involves an increase in heat generation in each current source. However, there is only a small number of on-state current sources. Accordingly, the increase in the sum total of the heat generation does not become a problem.
(58) Also, the multiple current sources may each be structured to allow the on/off state thereof to be controlled independently. Also, the target frequency may be changed according to the number of on-state current sources from among the multiple current sources.
(59) Also, the multiple current sources may each be structured to allow the on/off state thereof to be controlled independently. Also, the lighting circuit may further include a dummy load coupled to an output of the switching converter, and structured to be set to an enable state according to the number of on-state current sources from among the multiple current sources. By operating the dummy load in the light load state, this arrangement is capable of suppressing a reduction in the switching frequency.
(60) Also, after a predetermined period of time elapses after the switching transistor is turned off, the dummy load may reduce the driving voltage. This arrangement allows the switching frequency to be determined according to the predetermined period of time.
(61) Also, when the driving voltage exceeds a predetermined threshold value, the switching transistor may be forcibly turned off.
(62) Also, the multiple semiconductor light sources and the multiple current sources may be arranged in the form of a module.
(63) With an embodiment, the lighting circuit may be provided to an automotive lamp.
Embodiments 1 Through 5
Embodiment 1
(64)
(65) The automotive lamp 100 includes multiple (N 2) semiconductor light sources 102_1 through 102_N, a lamp ECU 110, and a lighting circuit 200. Each semiconductor light source 102 may preferably be configured using an LED. Also, various kinds of light-emitting elements such as an LD, organic EL, or the like, may be employed. Each semiconductor light source 102 may include multiple light-emitting elements coupled in series and/or coupled in parallel. It should be noted that the number of channels, i.e., N, is not restricted in particular. Also, N may be 1.
(66) The lamp ECU 110 includes a switch 112 and a microcontroller 114. The microcontroller (processor) 114 is coupled to the in-vehicle ECU 4 via a bus such as a CAN (Controller Area Network) or LIN (Local Interconnect Network) or the like. This allows the microcontroller 114 to receive various kinds of information such as a turn-on/turn-off instruction, etc. The microcontroller 114 turns on the switch 112 according to a turn-on instruction received from the in-vehicle ECU 4. In this state, a power supply voltage (battery voltage V.sub.BAT) is supplied from the battery 2 to the lighting circuit 200.
(67) Furthermore, the microcontroller 114 receives a control signal for indicating the light distribution pattern from the in-vehicle ECU 4, and controls the lighting circuit 200. Also, the microcontroller 114 may receive information that indicates the situation ahead of the vehicle from the in-vehicle ECU 4, and may autonomously generate the light distribution pattern based on the information thus received.
(68) The lighting circuit 200 supplies the driving currents I.sub.LED1 through I.sub.LEDN to the multiple semiconductor light sources 102_1 through 102_N so as to provide a desired light distribution pattern.
(69) The lighting circuit 200 includes multiple current sources 210_1 through 210_N, a switching converter 220, and a converter controller 230. Each current source 210_i (i=1, 2, . . . , N) is coupled to the corresponding semiconductor light source 102_i in series. The current source 210_i functions as a constant current driver that stabilizes the driving current I.sub.LEDi that flows through the semiconductor light source 102_i to a predetermined current amount.
(70) The multiple current sources 210_1 through 210_N are each configured to be capable of controlling their on/off states independently according to PWM signals S.sub.PWM1 through S.sub.PWMN generated by the light distribution controller 116. When the PWM signal S.sub.PWMi is set to the on level (e.g., high level), the driving current I.sub.LEDi flows, thereby turning on the semiconductor light source 102_i. Conversely, when the PWM signal S.sub.PWMi is set to the off level (e.g., low level), the driving current I.sub.LEDi is set to zero, thereby turning off the semiconductor light source 102_i. By changing the duty cycle of the PWM signal S.sub.PWM1, such an arrangement allows the effective luminance of the semiconductor light source 102_i to be changed (PWM dimming).
(71) The switching converter 220 supplies a driving voltage V.sub.OUT across a series connection circuit of the semiconductor light source 102 and the current source 210. The switching converter 220 is configured as a step-down converter (Buck converter) including a switching transistor M.sub.1, a rectification diode D.sub.1, an inductor L.sub.1, and an output capacitor C.sub.1.
(72) The converter controller 230 controls the switching converter 220 using a ripple control method. More specifically, the converter controller 230 turns on the switching transistor M.sub.1 of the switching converter 220 when the voltage across any one of the multiple current sources 210, i.e., the voltage V.sub.LED at connection nodes that couple any one from among the current sources 210 and the corresponding semiconductor light source 102, decreases to a predetermined bottom limit voltage V.sub.BOTTOM.
(73) Furthermore, when a predetermined turn-off condition is satisfied, the converter controller 230 switches a control pulse S.sub.1 to the off level (high level), thereby turning off the switching transistor M.sub.1. The turn-off condition may be that the output voltage V.sub.OUT of the switching converter 220 has reached a predetermined upper limit voltage V.sub.UPPER.
(74) The above is the configuration of the automotive lamp 100. Next, description will be made regarding the operation thereof.
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(76) In the off period (low-level period in the drawing) of the switching transistor M.sub.1, the output capacitor C.sub.1 of the switching converter 220 is discharged due to a load current I.sub.OUT which is the sum total of the driving currents I.sub.LED1 through I.sub.LED3, which lowers the output voltage V.sub.OUT with time. In actuality, the output capacitor C.sub.1 is charged or discharged by the difference between the coil current I.sub.L that flows through the inductor L.sub.1 and the load current. Accordingly, the increase/decrease of the output voltage V.sub.OUT does not necessarily match the on/off state of the switching transistor M.sub.1 on the time axis.
(77) The voltages that each occur across each current source 210, i.e., the voltages (cathode voltages) V.sub.LED1 through V.sub.LED3 at the connection nodes that each connect the corresponding current source 210 and the corresponding semiconductor light source 102, are represented by the following Expressions.
V.sub.LED1=V.sub.OUT−V.sub.F1
V.sub.LED2=V.sub.OUT−V.sub.E2
V.sub.LED3=V.sub.OUT−V.sub.F3
(78) Accordingly, the voltages V.sub.LED1 through V.sub.LED3 each change while maintaining a constant voltage difference with respect to the output voltage V.sub.OUT. In this example, the forward voltage V.sub.F1 at the first channel is the largest value. Accordingly, the cathode voltage V.sub.LED1 at the first channel is the smallest value.
(79) When the cathode voltage V.sub.LED1 at the first channel decreases to the bottom limit voltage V.sub.BOTTOM, the switching transistor M.sub.1 is turned on.
(80) When the switching transistor M.sub.1 is turned on, this raises the coil current I.sub.L that flows through the inductor L.sub.1, which switches the output voltage V.sub.OUT to an increasing phase. Subsequently, when the output voltage V.sub.OUT reaches the upper limit voltage V.sub.UPPER, the switching transistor M.sub.1 is turned off. The lighting circuit 200 repeats this operation.
(81) The above is the operation of the lighting circuit 200. The lighting circuit 200 is capable of maintaining the voltage across each current source 210 at a level in the vicinity of the minimum level that ensures that each lighting circuit 200 is able to generate predetermined driving currents I.sub.LED. This arrangement provides reduced power consumption.
(82) As another approach (comparison technique), an arrangement is conceivable in which the cathode voltages V.sub.LED1 through V.sub.LEDN are feedback controlled using an error amplifier such that the minimum voltage thereof approaches a predetermined target value V.sub.REF.
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(84) With the comparison technique, the average of the minimum voltage V.sub.MIN from among the cathode voltages V.sub.LED1 through V.sub.LEDN approaches the target voltage V.sub.REF by means of the response characteristics of a phase compensation filter provided to a feedback loop. That is to say, the bottom level V.sub.MIN_BOTTOM of the minimum voltage V.sub.MIN is lower than the target voltage V.sub.REF. In this case, the difference between the bottom level V.sub.MIN_BOTTOM and the target voltage V.sub.REF changes in an unstable manner depending on the situation. In order to provide stable circuit operation, as indicated by the solid line in
(85) The present invention encompasses various kinds of apparatuses, circuits, and methods that can be regarded as a block configuration or a circuit configuration shown in
Example 1.1
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(87) An off signal generating circuit 260F generates an off signal S.sub.OFF which determines the timing at which the switching transistor M.sub.1 is to be turned off. A voltage dividing circuit 261 divides the output voltage V.sub.OUT such that it is scaled to an appropriate voltage level. A comparator 262 compares the output voltage V.sub.OUT′ thus divided with a threshold value V.sub.UPPER′ obtained by scaling the upper limit voltage V.sub.UPPER. When the relation V.sub.OUT>V.sub.UPPER is detected, the comparator 262 asserts the off signal S.sub.OFF (e.g., set to the high level).
(88) The logic circuit 234 is configured as an SR flip-flop, for example. The logic circuit 234 switches its output Q to the on level (e.g., high level) in response to the assertion of the on signal S.sub.ON. Furthermore, the logic circuit 234 switches its output Q to the off level (e.g., low level) in response to the assertion of the off signal S.sub.OFF. It should be noted that the logic circuit 234 is preferably configured as a reset-priority flip-flop in order to set the switching converter to a safer state (i.e., off state of the switching transistor M.sub.1) when the assertion of the on signal S.sub.ON and the assertion of the off signal S.sub.OFF occur at the same time.
(89) A driver 232 drives the switching transistor M.sub.1 according to the output Q of the logic circuit 234. As shown in
Example 1.2
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(91) With the example 1.1, in a case in which there are a large number of channels, the circuit area required by the comparator group is large and the chip size becomes large. In contrast, with the example 1.2, such an arrangement requires only a single comparator, thereby allowing the circuit area to be reduced.
Example 1.3
(92) In-vehicle devices are configured to avoid electromagnetic noise bands, i.e., the LW band of 150 kHz to 280 kHz, the AM band of 510 kHz to 1710 kHz, and the SW band of 2.8 MHz to 23 MHz. Accordingly, the switching frequency of the switching transistor M.sub.1 is preferably stabilized to a value on the order of 300 kHz to 450 kHz between the LW band and the AM band.
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(94) An off signal generating circuit 260H includes a frequency detection circuit 264 and an error amplifier 266 in addition to the comparator 262. The frequency detection circuit 264 monitors the output Q of the logic circuit 234 or the control pulse S.sub.1, and generates a frequency detection signal V.sub.FREQ that indicates the switching frequency. The error amplifier 266 amplifies the difference between the frequency detection signal V.sub.FREQ and the reference voltage V.sub.FREQ(REF) that defines a target value of the switching frequency (target frequency), and generates the upper limit voltage V.sub.UPPER that corresponds to the difference thus amplified.
(95) With the example 1.3, this arrangement is capable of stabilizing the switching frequency to a target value. This allows the noise countermeasures to be provided in a simple manner.
Example 1.4
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(97) An off signal generating circuit 260I includes a timer circuit 268. The timer circuit 268 starts the measurement of the predetermined on time T.sub.ON in response to the on signal S.sub.ON. After the on time T.sub.ON elapses, the timer circuit 268 asserts (e.g., sets to the high level) the off signal S.sub.OFF. The timer circuit 268 may be configured as a monostable multivibrator (one-shot pulse generator), for example. Also, the timer circuit 268 may be configured as a digital counter or an analog timer. In order to detect the timing at which the switching transistor M.sub.1 is turned on, the timer circuit 268 may receive the output Q of the logic circuit 234 or the control pulse S.sub.1 as its input signal instead of the on signal S.sub.ON.
Example 1.5
(98)
Example 1.6
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(100) For example, the variable timer circuit 270 may include a capacitor, a current source that charges the capacitor, and a comparator that compares the voltage across the capacitor with a threshold value. The variable timer circuit 270 is configured such that at least one from among the current amount generated by the current source and the threshold value can be changed according to the control voltage V.sub.CTRL.
(101) The frequency detection circuit 272 monitors the output Q of the logic circuit 234 or the control pulse S.sub.1, and generates a frequency detection signal V.sub.FREQ that indicates the switching frequency. An error amplifier 274 amplifiers the difference between the frequency detection signal V.sub.FREQ and the reference voltage V.sub.FREQ(REF) that defines a target value of the switching frequency (target frequency), and generates the control voltage V.sub.CTRL that corresponds to the difference thus amplified.
(102) With the example 1.6, this arrangement is capable of stabilizing the switching frequency to the target value, thereby allowing the noise countermeasures to be provided in a simple manner.
(103)
(104) A combination of the transistors Tr.sub.12 and Tr.sub.13, the resistors R.sub.13 and R.sub.14, and a capacitor C.sub.13 is configured as a peak hold circuit. The peak hold circuit holds the peak value of the voltage V.sub.C12 across the capacitor C.sub.12. The output V.sub.FREQ of the peak hold circuit has a correlation with the period of the pulse signal S.sub.P′, i.e., the frequency thereof.
(105) A comparator COMP1 compares the frequency detection signal V.sub.FREQ with the reference signal V.sub.FREQ(REF) that indicates the target frequency. A combination of a resistor R.sub.15 and a capacitor C.sub.14 is configured as a low-pass filter. The low-pass filter smooths the output of the comparator COMP1 so as to generate the control voltage V.sub.CTRL. The control signal V.sub.CTRL is output via a buffer BUF1.
(106) Description will be made regarding the variable timer circuit 270. The on signal S.sub.ON is inverted by an inverter 273. When the inverted on signal #S.sub.ON becomes lower than a threshold value V.sub.TH1, i.e., when the on signal S.sub.ON is set to the high level, the output of a comparator COMP2 is set to the high level. This sets a flip-flop SREF, thereby setting the pulse signal S.sub.P to the high level.
(107) During the high-level period of the pulse signal S.sub.P, the transistor M.sub.21 is turned off. During the off period of the transistor M.sub.21, a current source 271 generates a variable current I.sub.VAR that corresponds to the control voltage V.sub.CTRL so as to charge a capacitor C.sub.15. When the voltage V.sub.C15 across the capacitor C.sub.15 reaches a threshold value V.sub.TH2, the output of the comparator COMP3 is set to the high level. This resets the flip-flop SREF, thereby switching the pulse signal S.sub.P to the low level. As a result, the transistor M.sub.21 is turned on, thereby initializing the voltage V.sub.C15 of the capacitor C.sub.15.
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(111) The current source 210 further includes a switch (dimming switch) 214 for PWM dimming. The dimming switch 214 is controlled according to a PWM signal S.sub.PWM generated by the dimming controller 116. When the dimming switch 214 is turned off, the driving current I.sub.LED flows through the current source 210. When the dimming switch 214 is turned on, the series transistor M.sub.2 is turned off, which disconnects the driving current I.sub.LED. The dimming switch 214 is switched at a high speed at a PWM frequency of 60 Hz or more (preferably, on the order of 200 to 300 Hz). Furthermore, by adjusting the duty cycle of the PWM frequency, the semiconductor light source 102 is subjected to PWM dimming control.
(112) In the current source 210 shown in
(113) In a case of employing the current source 210 shown in
V.sub.BOTTOM=R.sub.S×I.sub.LED+V.sub.SAT+ΔV
(114) The current source 210 shown in
V.sub.BOTTOM=V.sub.SAT+ΔV
(115) Here, V.sub.SAT represents the saturation voltage of the current mirror circuit, and ΔV represents an appropriate margin.
Embodiment 2
(116) Description has been made in the embodiment 1 regarding an arrangement in which the bottom limit voltage is fixed. In this case, in some cases, such an arrangement has a problem of a reduction in the switching frequency in a light load state in which the number of the turned-on light sources 102 becomes small.
(117)
(118) However, in a case in which the pulse width of the control pulse S.sub.1 is excessively narrowed, such an arrangement is not able to turn on the switching transistor M.sub.1. Accordingly, such an arrangement is not capable of shortening the pulse width of the control pulse S.sub.1 such that it is smaller than a particular minimum pulse width. In other words, in the light load state, the pulse width of the control pulse S.sub.1 is fixed to the minimum pulse width (
(119) In order to solve such a problem, with the embodiment 2, the bottom limit voltage V.sub.BOTTOM is dynamically controlled according to the load state so as to suppress the reduction in the switching frequency.
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(121) For example, the bottom limit voltage setting circuit 280 may judge the number of the turned-on light sources based on the PWM signals S.sub.PWM1 through S.sub.PWMN generated by the light distribution controller 116. Also, the bottom limit voltage setting circuit 280 receives, from the microcontroller 114, a signal that indicates the number of the turned-on light sources or an instruction value that indicates the bottom limit voltage V.sub.BOTTOM determined based on the number of the turned-on light sources. Also, with an arrangement described later with reference to
(122) The configuration of the converter controller 230 is not restricted in particular. That is to say, the converter controller 230 may have any one from among the configurations described above.
(123)
(124) In the light load state, this arrangement is capable of preventing the switching frequency from becoming excessively low. It should be noted that, in a case in which the bottom limit voltage V.sub.BOTTOM is raised, this involves an increase in heat generation in the current source 210. However, the number of the on-state current sources 210 becomes smaller. Accordingly, the increase in the sum total of the heat generation does not become a problem. Description has been made with reference to
Embodiment 3
(125)
(126) The frequency setting circuit 290 changes the target frequency according to the number of the on-state current sources (the number of turned-on light sources) from among the multiple current sources 210. More specifically, when the number of the on-state current sources becomes smaller than a predetermined threshold value, judgment is made that the light load state has been detected. In this state, the frequency setting circuit 290 sets the target frequency to a different frequency value that is lower than the original target frequency and does not belong to a particular band defined as an electromagnetic noise band. In a case in which, in the normal state, the target frequency is set to a frequency value of 300 kHz to 450 kHz between the LW band and AM band, when the operating state becomes the light load state, the target frequency may preferably be set to a band (e.g., 100 kHz) that is lower than the LW band and that is higher than the audible band.
(127) With an arrangement shown in
(128) With the embodiment 3, when the frequency is lowered in the light load state, such an arrangement is capable of maintaining the frequency such that it is outside the frequency range that causes an electromagnetic noise problem that is to be avoided.
Embodiment 4
(129)
(130) The dummy load 292 is coupled to the output of the switching converter 220. In the enable state, the dummy load 292 discharges the capacitor C.sub.1 of the switching converter 220 so as to lower the output voltage V.sub.OUT. The dummy load control circuit 294 controls the enable/disable state of the dummy load 292 based on the number of the on-state current sources from among the multiple current sources.
(131) The dummy load 292 includes a switch configured as a transistor arranged between the output of the switching converter 220 and the ground. After a predetermined time τ elapses from the turning-off of the switching transistor M.sub.1, the dummy load control circuit 294 asserts (sets to the high level, for example) the enable signal EN, so as to turn on the switch of the dummy load 292.
(132)
(133) The dummy load 292 may be configured as a constant current source that is capable of switching its state between the on state and the off state. Also, the dummy load 292 may be configured as a combination of switches and resistors.
Embodiment 5
(134) Description will be made with reference to
(135)
(136) The converter controller 230P includes a pulse modulator 235, a logic gate 233, and a driver 232. The pulse modulator 235 has the same configuration as those of the converter controllers 230F through 230K respectively shown in
(137) With the present embodiment, the current source 210 is configured using a transistor having a low on resistance, thereby allowing power consumption to be reduced. As a tradeoff, such an arrangement involves such a transistor having a low breakdown voltage. However, when an overshoot occurs in the output voltage V.sub.OUT of the switching converter, the switching transistor M.sub.1 is immediately suspended. Such an arrangement is capable of preventing an overvoltage from being applied to the transistor of the current source (e.g., the transistor M.sub.2 shown in
Integrated-Driver Light Source
(138) Next, description will be made regarding a light source with an integrated driver. The multiple current sources 210 may be integrated on a single semiconductor chip, which will be referred as a “current driver IC (Integrated Circuit)” hereafter.
(139) The multiple current sources 310_1 through 310_N are configured to switch independently between the on state and the off state according to PWM signals S.sub.PWM1 through S.sub.PWMN, respectively. The current sources 310_1 through 310_N are respectively coupled to the corresponding semiconductor light sources 102_1 through 102_N in series via cathode pins LED1 through LEDN.
(140) The interface circuit 320 receives multiple control data D.sub.1 through D.sub.N from an external microcontroller (processor 114). The kind of the interface is not restricted in particular. For example, an SPI (Serial Peripheral Interface) or I.sup.2C interface may be employed. The multiple control data D.sub.1 through D.sub.N respectively indicate the on/off duty cycles of the multiple current sources 310_1 through 310_N, which are updated at a first time interval T.sub.1. The first time interval T.sub.1 is set to on the order of 20 ms to 200 ms. For example, the first time interval T.sub.1 is set to 100 ms.
(141) The dimming pulse generator 330 generates the multiple PWM signals S.sub.PWM1 through S.sub.PWMN for the multiple current sources 310_1 through 310_N based on the multiple control data D.sub.1 through D.sub.N. In the embodiment described with reference to
(142) The duty cycle of the i-th PWM signal S.sub.PWMi is gradually changed at a second time interval T.sub.2 that is shorter than the first time interval T.sub.1 from the corresponding control data D.sub.i value before updating to the updated value thereof (which will be referred to as the “gradual-change mode”). The second time interval T.sub.2 is set to a value on the order of 1 ms to 10 ms. For example, the second time interval T.sub.2 is set to 5 ms.
(143) The dimming pulse generator 330 is capable of supporting a non-gradual-change mode in addition to the gradual-change mode. In the non-gradual-change mode, the duty cycle of the i-th PWM signal S.sub.PWMi is allowed to be immediately changed from the corresponding control data D.sub.i value before updating to the updated value thereof.
(144) The dimming pulse generator 330 may preferably be configured to dynamically switch its mode between the non-gradual-change mode and the gradual-change mode according to the settings received from the microcontroller 114. Preferably, the dimming pulse generator 330 is configured to dynamically switch its mode between the non-gradual-change mode and the gradual-change mode for each channel (for each dimming pulse). The setting data that indicates the mode may be appended to the control data D.sub.i.
(145) A part of or the whole of the on signal generating circuit 240 may be integrated on the current driver IC 300. The part of the on signal generating circuit 240 to be integrated may preferably be determined according to the circuit configuration of the on signal generating circuit 240, and specifically, may preferably be determined so as to reduce the number of lines that couple the converter controller 230 and the current driver IC 300. As shown in
(146) Next, description will be made regarding the operation of the current driver IC 300.
(147) The above is the operation of the current driver IC 300. The advantages of the current driver IC 300 can be clearly understood in comparison with a comparison technique. If the current driver IC 300 does not have the function of gradually changing the duty cycle, the microcontroller 114 must update the control data D.sub.1 through D.sub.N that each indicate the duty cycle at the second time interval T.sub.2. In a case in which the number of channels N of the semiconductor light sources 102 exceeds several dozen to 100, such an arrangement requires a high-performance microcontroller, i.e., a high-cost microcontroller, configured as the microcontroller 114. Furthermore, such an arrangement requires high-speed communication between the microcontroller 114 and the current driver IC 300, thereby leading to the occurrence of a noise problem.
(148) In contrast, with the current driver IC 300 according to the embodiment, this arrangement allows the rate at which the microcontroller 114 updates the control data D.sub.1 through D.sub.N to be reduced. This allows the performance required for the microcontroller 114 to be reduced. Furthermore, this allows the communication speed between the microcontroller 114 and the current driver IC 300 to be reduced, thereby solving the noise problem.
(149) The first time interval T.sub.1 may preferably be configured to be variable. In a situation in which there is only a small change in the duty cycle, the first time interval T.sub.1 is increased so as to reduce the data communication amount, thereby allowing power consumption and noise to be reduced.
(150)
(151) As shown in
(152)
(153) The semiconductor chip 402 and the current driver IC 300 are mechanically joined and electrically coupled. The front face of the current driver IC 300 is provided with front-face electrodes 410 (LED1 through LEDN in
(154) The kind of the package of the integrated-driver light source 400 is not restricted in particular. As the package of the integrated-driver light source 400, a BAG (Ball Grid Array), PGA (Pin Grid Array), LGA (Land Grid Array), QFP (Quad Flat Package), or the like, may be employed.
(155) In a case in which the semiconductor light sources 102 and the current driver IC 300 are each configured as a separate module, a countermeasure may preferably be provided in which a heat dissipation structure or the like is attached to each module. In contrast, with the integrated-driver light source 400 as shown in
MODIFICATIONS
(156) Description will be made regarding modifications relating to the embodiments 1 through 5.
Modification 1
(157) Description has been made in the embodiments regarding an arrangement in which the current source 210 is configured as a sink circuit, and is coupled to the cathode of the corresponding semiconductor light source 102. However, the present invention is not restricted to such an arrangement.
Modification 2
(158) Any transistor such as the series transistor M.sub.2 or the like may be configured as a bipolar transistor. In this case, the gate, source, and drain correspond to the base, emitter, and collector, respectively.
Modification 3
(159) Description has been made in the embodiments regarding an arrangement in which the switching transistor M.sub.1 is configured as a P-channel MOSFET. Also, the switching transistor M.sub.1 may be configured as an N-channel MOSFET. In this case, a bootstrap circuit may be provided as an additional circuit. Instead of such a MOSFET, an IGBT (Insulated Gate Bipolar Transistor) or a bipolar transistor may be employed.
Overview of the Embodiments 1 Through 5
(160) An embodiment disclosed in the present specification relates to a lighting circuit structured to be capable of turning on multiple semiconductor light sources. The lighting circuit includes: multiple current sources each of which is to be coupled to a corresponding semiconductor light source, and each of which includes a series transistor and a sensing resistor arranged in series with the corresponding semiconductor light source, and an error amplifier structured to adjust the voltage at a control electrode of the series transistor based on a voltage drop that occurs across the sensing resistor; a switching converter structured to supply a driving voltage across each of multiple series connection circuits each formed of a semiconductor light source and a current source; and a converter controller structured to operate using a ripple control method. The converter controller turns on a switching transistor of the switching converter in response to the output voltage of the error amplifier included in any one of the multiple current sources satisfying a predetermined turn-on condition.
(161) When the driving current generated by the current source deviates from its target value, a sudden change occurs in the output voltage of the error amplifier. The switching converter employs a hysteresis control method. Upon detecting such a sudden change, the switching converter immediately turns on the switching transistor. This allows the voltage across each current source to be maintained in the vicinity of the saturation voltage state, and allows the power consumption to be reduced.
(162) Also, the series transistor may be configured as an N-type transistor. When an output voltage of the error amplifier included in any one of the multiple current sources reaches a predetermined threshold value, the converter controller may turn on the switching transistor.
(163) Also, the series transistor may be configured as an N-type transistor. Also, the converter controller may turn on the switching transistor in response to a maximum value from among output voltages of the plurality of error amplifiers included in the plurality of semiconductor light sources satisfying a predetermined turn-on condition.
(164) Also, the series transistor may be configured as a P-type transistor. Also, when an output voltage of the error amplifier included in any one of the multiple current sources becomes lower than a predetermined threshold value, the converter controller may turn on the switching transistor.
(165) Also, the converter controller may turn off the switching transistor in response to the driving voltage reaching an upper limit voltage. Also, the upper limit voltage may be feedback controlled such that the switching frequency of the switching transistor approaches a target frequency.
(166) Also, the converter controller may turn off the switching transistor after the on time elapses after the switching transistor is turned on. Also, the on time may be feedback controlled such that the switching frequency of the switching transistor approaches a target frequency.
(167) The multiple semiconductor light sources and the multiple current sources may be arranged in the form of a module. In a case in which the semiconductor light sources and the current sources are arranged in the form of a module, this further increases a need to reduce the heat generation. In a case of employing the hysteresis control method based on the output voltage of the error amplifier, such an arrangement operates particularly effectively for such a module.
(168) With an embodiment, the lighting circuit may be provided to an automotive lamp.
(169) Another embodiment of the present invention disclosed in the present specification relates to a current driver circuit structured to drive multiple semiconductor light sources. The current driver circuit includes: multiple current sources each structured to allow the on/off state thereof to be controlled independently according to a PWM signal, and each coupled to a corresponding semiconductor light source in series; an interface circuit structured to receive, at a first time interval, multiple control data that indicate an on/off duty cycle for the multiple current sources; and a dimming pulse generator structured to generate multiple PWM signals for the multiple current sources, and to gradually change, at a second time interval that is smaller than the first time interval, a duty cycle of each of the multiple PWM signals from a value indicated by the corresponding control data before updating to a value indicated by the corresponding control data after updating.
(170) In a case in which the current driver circuit is provided with an automatic duty cycle gradual-change function, i.e., an automatic luminance gradual-change function, the processor is not required to update the setting value for the duty cycle with a high frequency. This allows the data communication amount to be reduced.
(171) With an embodiment, the duty cycle of each of the multiple PWM signals may be immediately changed according to settings from a value indicated by the corresponding control data before updating to a value indicated by the corresponding control data after updating. For example, in a case in which the current driver circuit is employed in a variable light distribution lamp, in some situations, in order to prevent the occurrence of glare, there is a need to turn off or reduce a particular illumination provided by a particular semiconductor light source. This function has an advantage in such a situation.
(172) Also, each of the multiple current sources may include: a series transistor and a sensing resistor arranged in series with a corresponding semiconductor light source; an error amplifier structured to adjust a voltage of a control electrode of the series transistor based on a voltage drop that occurs across the sensing resistor; and a PWM switch arranged between a gate and a source of the series transistor.
Embodiments 6 Through 10
Embodiment 6
(173)
(174) The automotive lamp 100 includes multiple (N≥2) semiconductor light sources 102_1 through 102_N, a lamp ECU 110, and a lighting circuit 200. Each semiconductor light source 102 may preferably be configured using an LED. Also, various kinds of light-emitting elements such as an LD, organic EL, or the like, may be employed. Each semiconductor light source 102 may include multiple light-emitting elements coupled in series and/or coupled in parallel. It should be noted that the number of channels, i.e., N, is not restricted in particular. Also, N may be 1.
(175) The lamp ECU 110 includes a switch 112 and a microcontroller 114. The microcontroller (processor) 114 is coupled to the in-vehicle ECU 4 via a bus such as a CAN (Controller Area Network) or LIN (Local Interconnect Network) or the like. This allows the microcontroller 114 to receive various kinds of information such as a turn-on/turn-off instruction, etc. The microcontroller 114 turns on the switch 112 according to a turn-on instruction received from the in-vehicle ECU 4. In this state, a power supply voltage (battery voltage V.sub.BAT) is supplied from the battery 2 to the lighting circuit 200.
(176) Furthermore, the microcontroller 114 receives a control signal for indicating the light distribution pattern from the in-vehicle ECU 4, and controls the lighting circuit 200. Also, the microcontroller 114 may receive information that indicates the situation ahead of the vehicle from the in-vehicle ECU 4, and may autonomously generate the light distribution pattern based on the information thus received.
(177) The lighting circuit 200 supplies the driving currents I.sub.LED1 through I.sub.LEDN to the multiple semiconductor light sources 102_1 through 102_N so as to provide a desired light distribution pattern.
(178) The lighting circuit 200 includes multiple current sources 210_1 through 210_N, a switching converter 220, and a converter controller 230. Each current source 210_i (i=1, 2, . . . , N) is coupled to the corresponding semiconductor light source 102_i in series. The current source 210_i functions as a constant current driver that stabilizes the driving current I.sub.LEDi that flows through the semiconductor light source 102_i to a predetermined current amount.
(179) The multiple current sources 210_1 through 210_N have the same configuration. Accordingly, as a representative example, only the configuration of the current source 210_1 is shown. Each current source 210 includes a series transistor M.sub.2, a sensing resistor R.sub.S, and an error amplifier 212. The series transistor M.sub.2 and the sensing resistor R.sub.S are arranged in series on a path of the driving current I.sub.LEDi. The error amplifier 212 adjusts the voltage V.sub.G at a control electrode (gate in this example) of the series transistor M.sub.2 such that the voltage drop V.sub.CS that occurs across the sensing resistor R.sub.S approaches the target voltage V.sub.ADIM. In this example, the series transistor M.sub.2 is configured as an N-type (N-channel) MOSFET. The error amplifier 212 is arranged such that the reference voltage V.sub.ADIM is input to one input (non-inverting input terminal) thereof and such that the voltage V.sub.CS (voltage drop that occurs across the sensing resistor R.sub.S) at a connection node that couples the series transistor M.sub.2 and the sensing resistor R.sub.S is input to the other input (inverting input terminal) thereof. The error amplifier 212 feedback controls V.sub.CS such that it approaches V.sub.ADIM. This stabilizes the driving current I.sub.LED with I.sub.LED(REF)=V.sub.ADIM/R.sub.S as its target value.
(180) Each current source 210 further includes a switch (dimming switch) 214 for PWM dimming. The dimming switch 214 is controlled according to the PWM signal S.sub.PWM generated by the light distribution controller 116. When the dimming switch 214 is turned off, the driving current I.sub.LED flows through the current source 210. Conversely, when the dimming switch 214 is turned on, the series transistor M.sub.2 is turned off, which disconnects the driving current I.sub.LED. The dimming switch 214 is switched at a high speed at a PWM frequency of 60 Hz or more (preferably, on the order of 200 to 300 Hz). By adjusting the duty cycle thereof, the semiconductor light source 102 is subjected to PWM dimming control.
(181) The switching converter 220 supplies a driving voltage V.sub.OUT across a series connection circuit of the semiconductor light source 102 and the current source 210. The switching converter 220 is configured as a step-down converter (Buck converter) including a switching transistor M.sub.1, a rectification diode D.sub.1, an inductor L.sub.1, and an output capacitor C.sub.1.
(182) The converter controller 230 controls the switching converter 220 using a ripple control method. More specifically, the converter controller 230 generates a turn-on timing at which the switching transistor M.sub.1 is to be turned on, based on the output voltage V.sub.G of the error amplifier 212 (i.e., gate voltage of the series transistor M.sub.2). Specifically, in response to the output voltage V.sub.G of the error amplifier 212 satisfying a predetermined turn-on condition, the converter controller 230 switches the control pulse S.sub.1 to the on level (low level), thereby turning on the switching transistor M.sub.1.
(183) More specifically, when the output voltage V.sub.G1 of the error amplifier 212 exceeds a predetermined threshold value V.sub.TH, the converter controller 230 turns on the switching transistor M.sub.1. In the present embodiment, the automotive lamp 100 is configured as a multi-channel device. The gate voltages V.sub.G1 through V.sub.GN are monitored for all the channels. When any one of the multiple current sources 210 satisfies the turn-on condition described above, the converter controller 230 turns on the switching transistor M.sub.1. Specifically, when the gate voltage V.sub.Gj at any channel, i.e., the j-th channel, exceeds the threshold value V.sub.TH in the off period of the switching transistor M.sub.1, the converter controller 230 turns on the switching transistor M.sub.1.
(184) Furthermore, when a predetermined turn-off condition is satisfied, the converter controller 230 switches a control pulse S.sub.1 to the off level (high level), thereby turning off the switching transistor M.sub.1. The turn-off condition may be that the output voltage V.sub.OUT of the switching converter 220 has reached a predetermined upper limit voltage V.sub.UPPER.
(185) The above is the configuration of the automotive lamp 100. Next, description will be made regarding the operation thereof.
(186) Referring to
(187) The voltages that each occur across each current source 210, i.e., the voltages (cathode voltages) V.sub.LED1 through V.sub.LED3 at the connection nodes that each connect the corresponding current source 210 and the corresponding semiconductor light source 102, are represented by the following Expressions.
V.sub.LED1=V.sub.OUT−V.sub.F2
V.sub.LED2=V.sub.OUT−V.sub.F2
V.sub.LED3=V.sub.OUT−V.sub.F3
(188) Accordingly, the voltages V.sub.LED1 through V.sub.LED3 each change while maintaining a constant voltage difference with respect to the output voltage V.sub.OUT. In this example, the forward voltage V.sub.F1 at the first channel is the largest value. Accordingly, the cathode voltage V.sub.LED1 at the first channel is the smallest value.
(189) The drain-source voltage V.sub.DS of the series transistor M.sub.2 at each channel is equal to a voltage obtained by subtracting the voltage drop V.sub.CS that occurs across the sensing resistor R.sub.S from the cathode voltage V.sub.LED.
V.sub.DS1=V.sub.LED1−V.sub.CS1
V.sub.DS2=V.sub.LED2−V.sub.CS2
V.sub.DS3=V.sub.LED3−V.sub.CS3
(190) In a case in which the target values I.sub.LED(REF) of the driving currents I.sub.LED are equal for all the channels, and in a case in which the sensing resistors R.sub.S have the same resistance value for all the channels, the voltage drops V.sub.CS1 through V.sub.CS3 are the same for all the channels. In this case, the first channel exhibits the smallest drain-source voltage V.sub.DS1.
(191) The series transistor M.sub.2 may be designed to have an element size so as to operate mainly in its saturation range. In the saturation range, the series transistor M.sub.2 allows the target current I.sub.LED(REF) to flow at a predetermined gate voltage level V.sub.0 without depending on the drain-source voltage V.sub.DS. That is to say, in the saturation range, the error amplifier 212 feedback controls the gate voltage V.sub.G1 such that it is set to V.sub.0. As the output voltage V.sub.OUT becomes lower, the operation point moves along the line indicated by the arrow (i) in
(192) In a case in which the gate-source voltage V.sub.GS is maintained at a constant value, when the drain-source voltage V.sub.DS1 at the first channel becomes lower than a pinch-off voltage V.sub.P (=V.sub.GS−V.sub.GS(th)), this leads to reduction in the drain current I.sub.D (i.e., driving current I.sub.LED) (as indicated by the arrow (ii) in
(193) When the switching transistor M.sub.1 is turned on, the coil current I.sub.L that flows through the inductor L.sub.1 rises, which leads to an increase in the output voltage V.sub.OUT. When the output voltage V.sub.OUT rises, this raises the drain-source voltage V.sub.DS of the series transistor M.sub.2. In a case in which the gate voltage V.sub.GS is maintained at a constant level, when the drain-source voltage V.sub.DS rises in the saturation range, this raises the drain current I.sub.D (as indicated by the arrow (iv) in
(194) Subsequently, when the output voltage V.sub.OUT reaches the upper limit voltage V.sub.UPPER, the switching transistor M.sub.1 is turned off. The lighting circuit 200 repeats this operation.
(195) The above is the operation of the lighting circuit 200. With the lighting circuit 200, the series transistor M.sub.2 is allowed to have its operating point in the vicinity of the boundary between the linear range and the saturation range. This allows the source-drain voltage V.sub.DS of the series transistor M.sub.2 to be reduced, thereby allowing unnecessary power consumption in the series transistor M.sub.2 to be reduced.
(196) Description will be made regarding a case in which the PWM dimming control is performed. When the turned-off period of the PWM dimming occurs, and accordingly, when the dimming switch 214 is turned on, the gate voltage V.sub.G changes such that it becomes lower. Accordingly, at this channel in the turned-off state, the gate voltage V.sub.G does not cross the threshold voltage V.sub.TH. Accordingly, in this state, there is no effect on the turn-on operation of the switching transistor M.sub.1. That is to say, such an arrangement does not require special processing to eliminate the turned-off channels from the judgment whether or not the turn-on condition has been satisfied.
(197) The present invention encompasses various kinds of apparatuses, circuits, and methods that can be regarded as a block configuration or a circuit configuration shown in
Example 6.1
(198)
(199) An on-signal generating circuit 240A generates the on signal S.sub.ON that indicates the timing at which the switching transistor M.sub.1 is to be turned on, based on the multiple gate voltages V.sub.G1 through V.sub.GN. The on signal generating circuit 240A includes a maximum value circuit 242 and a comparator 244. The maximum value circuit 242 generates a voltage that corresponds to the maximum value from among the multiple gate voltages V.sub.G1 through V.sub.GN. For example, the maximum value circuit 242 may be configured as a diode OR circuit. The output voltage V.sub.G′ of the diode OR circuit is Vf lower than the maximum one from among the multiple gate voltages V.sub.G1 through V.sub.GN. Here, Vf represents the forward voltage of the diode.
(200) The comparator 244 compares the output voltage of the maximum value circuit 242 with a threshold value V.sub.TH′. The threshold value V.sub.TH′ may preferably be determined to be Vf lower than the threshold voltage V.sub.TH described above. When V.sub.G′ exceeds V.sub.TH′, i.e., when the maximum gate voltage V.sub.G exceeds the threshold voltage V.sub.TH, the on signal S.sub.ON, which is the output of the comparator 244, is asserted (set to the high level, for example).
(201) An off signal generating circuit 260A generates an off signal S.sub.OFF which determines the timing at which the switching transistor M.sub.1 is to be turned off. A voltage dividing circuit 261 divides the output voltage V.sub.OUT such that it is scaled to an appropriate voltage level. A comparator 262 compares the output voltage V.sub.OUT′ thus divided with a threshold value V.sub.UPPER′ obtained by scaling the upper limit voltage V.sub.UPPER. When the relation V.sub.OUT>V.sub.UPPER is detected, the comparator 262 asserts the off signal S.sub.OFF (e.g., set to the high level).
(202) The logic circuit 234 is configured as an SR flip-flop, for example. The logic circuit 234 switches its output Q to the on level (e.g., high level) in response to the assertion of the on signal S.sub.ON. Furthermore, the logic circuit 234 switches its output Q to the off level (e.g., low level) in response to the assertion of the off signal S.sub.OFF. It should be noted that the logic circuit 234 is preferably configured as a reset-priority flip-flop in order to set the switching converter to a safer state (i.e., off state of the switching transistor M.sub.1) when the assertion of the on signal S.sub.ON and the assertion of the off signal S.sub.OFF occur at the same time.
(203) A driver 232 drives the switching transistor M.sub.1 according to the output Q of the logic circuit 234. As shown in
(204) With the example 6.1, such an arrangement requires only a single comparator 244. This allows the circuit area to be reduced as compared with the example 6.2.
Example 6.2
(205)
Example 6.3
(206) In-vehicle devices are configured to avoid electromagnetic noise bands, i.e., the LW band of 150 kHz to 280 kHz, the AM band of 510 kHz to 1710 kHz, and the SW band of 2.8 MHz to 23 MHz. Accordingly, the switching frequency of the switching transistor M.sub.1 is preferably stabilized to a value on the order of 300 kHz to 450 kHz between the LW band and the AM band.
(207)
(208) An off signal generating circuit 260C includes a frequency detection circuit 264 and an error amplifier 266 in addition to the comparator 262. The frequency detection circuit 264 monitors the output Q of the logic circuit 234 or the control pulse S.sub.1, and generates a frequency detection signal V.sub.FREQ that indicates the switching frequency. The error amplifier 266 amplifies the difference between the frequency detection signal V.sub.FREQ and the reference voltage V.sub.FREQ(REF) that defines a target value of the switching frequency, and generates the upper limit voltage V.sub.UPPER that corresponds to the difference thus amplified.
(209) With the example 6.3, this arrangement is capable of stabilizing the switching frequency to a target value. This allows the noise countermeasures to be provided in a simple manner.
Example 6.4
(210)
(211) An off signal generating circuit 260D includes a timer circuit 268. The timer circuit 268 starts the measurement of the predetermined on time T.sub.ON in response to the on signal S.sub.ON. After the on time T.sub.ON elapses, the timer circuit 268 asserts (e.g., sets to the high level) the off signal S.sub.OFF. The timer circuit 268 may be configured as a monostable multivibrator (one-shot pulse generator), for example. Also, the timer circuit 268 may be configured as a digital counter or an analog timer. In order to detect the timing at which the switching transistor M.sub.1 is turned on, the timer circuit 268 may receive the output Q of the logic circuit 234 or the control pulse S.sub.1 as its input signal instead of the on signal S.sub.ON.
Example 6.5
(212)
Example 6.6
(213)
(214) For example, the variable timer circuit 270 may include a capacitor, a current source that charges the capacitor, and a comparator that compares the voltage across the capacitor with a threshold value. The variable timer circuit 270 is configured such that at least one from among the current amount generated by the current source and the threshold value can be changed according to the control voltage V.sub.CTRL.
(215) The frequency detection circuit 272 monitors the output Q of the logic circuit 234 or the control pulse S.sub.1, and generates a frequency detection signal V.sub.FREQ that indicates the switching frequency. An error amplifier 274 amplifiers the difference between the frequency detection signal V.sub.FREQ and the reference voltage V.sub.FREQ(REF) that defines a target value of the switching frequency, and generates the control voltage V.sub.CTRL that corresponds to the difference thus amplified.
(216) With the example 6.6, this arrangement is capable of stabilizing the switching frequency to the target value, thereby allowing the noise countermeasures to be provided in a simple manner.
(217)
(218) A combination of the transistors Tr.sub.12 and Tr.sub.13, the resistors R.sub.13 and R.sub.14, and a capacitor C.sub.13 is configured as a peak hold circuit. The peak hold circuit holds the peak value of the voltage V.sub.C12 across the capacitor C.sub.12. The output V.sub.FREQ of the peak hold circuit has a correlation with the period of the pulse signal S.sub.P′, i.e., the frequency thereof.
(219) A comparator COMP1 compares the frequency detection signal V.sub.FREQ with the reference signal V.sub.FREQ(REF) that indicates the target frequency. A combination of a resistor R.sub.15 and a capacitor C.sub.14 is configured as a low-pass filter. The low-pass filter smooths the output of the comparator COMP1 so as to generate the control voltage V.sub.CTRL. The control signal V.sub.CTRL is output via a buffer BUF1.
(220) Description will be made regarding the variable timer circuit 270. The on signal S.sub.ON is inverted by an inverter 273. When the inverted on signal #S.sub.ON becomes lower than a threshold value V.sub.TH1, i.e., when the on signal S.sub.ON is set to the high level, the output of a comparator COMP2 is set to the high level. This sets a flip-flop SREF, thereby setting the pulse signal S.sub.P to the high level.
(221) During the high-level period of the pulse signal S.sub.P, the transistor M.sub.21 is turned off. During the off period of the transistor M.sub.21, a current source 271 generates a variable current I.sub.VAR that corresponds to the control voltage V.sub.CTRL so as to charge a capacitor C.sub.15. When the voltage V.sub.C15 across the capacitor C.sub.15 reaches a threshold value V.sub.TH2, the output of the comparator COMP3 is set to the high level. This resets the flip-flop SREF, thereby switching the pulse signal S.sub.P to the low level. As a result, the transistor M.sub.21 is turned on, thereby initializing the voltage V.sub.C15 of the capacitor C.sub.15.
(222) Next, description will be made regarding modifications relating to the embodiment 6.
Modification 6.1
(223) Also, as the turn-off condition, the converter controller 230 may employ the drain voltage (cathode voltage of the semiconductor light source 102) of the series transistor M.sub.2 for each channel. For example, as the turn-off condition, a condition may be employed in which the maximum (or minimum) from among the cathode voltages of the multiple channels of the semiconductor light sources 102 reaches an upper limit voltage.
Modification 6.2
(224) Description has been made in the embodiment 6 in which an N-type transistor is employed as the series transistor M.sub.2 of the current source 210. Also, a P-type transistor (P-channel MOSFET) may be employed.
Modification 6.3
(225) Any transistor such as the series transistor M.sub.2 or the like may be configured as a bipolar transistor. In this case, the gate, source, and drain correspond to the base, emitter, and collector, respectively.
Modification 6.4
(226) Description has been made in the embodiment 6 regarding an arrangement in which the switching transistor M.sub.1 is configured as a P-channel MOSFET. Also, the switching transistor M.sub.1 may be configured as an N-channel MOSFET. In this case, a bootstrap circuit may be provided as an additional circuit. Instead of such a MOSFET, an IGBT (Insulated Gate Bipolar Transistor) or a bipolar transistor may be employed.
Modification 6.5
(227) Description has been made in the embodiment 6 regarding an arrangement in which the output voltage of the error amplifier 212 (gate voltage V.sub.G of the series transistor M.sub.2) is directly monitored, and judgment is made regarding whether or not the output voltage of the error amplifier 212 thus monitored satisfies the turn-on condition. However, the present invention is not restricted to such an arrangement. For example, an internal node of the error amplifier 212 that generates a voltage having a correlation with the output voltage may be monitored. That is to say, the output voltage of the error amplifier 212 may be indirectly monitored.
Modification 6.6
(228) Description has been made in the embodiment 6 regarding an arrangement in which the comparator 244 is used to detect a sudden change in the output voltage (gate voltage V.sub.G) of the error amplifier 212. However, the present invention is not restricted to such an arrangement.
(229)
Embodiment 7
(230) An embodiment 7 relates to a current driver. The multiple current sources 210 may be integrated on a single semiconductor chip, which will be referred to as a “current driver IC (Integrated Circuit).”
(231) As shown in the embodiment 6, the multiple current sources 310_1 through 310_N are configured to switch independently between the on state and the off state according to PWM signals S.sub.PWM1 through S.sub.PWMN, respectively. The current sources 310_1 through 310_N are respectively coupled to the corresponding semiconductor light sources 102_1 through 102_N in series via cathode pins LED1 through LEDN.
(232) The interface circuit 320 receives multiple control data D.sub.1 through D.sub.N from an external microcontroller (processor 114). The kind of the interface is not restricted in particular. For example, an SPI (Serial Peripheral Interface) or I.sup.2C interface may be employed. The multiple control data D.sub.1 through D.sub.N respectively indicate the on/off duty cycles of the multiple current sources 310_1 through 310_N, which are updated at a first time interval T.sub.1. The first time interval T.sub.1 is set to on the order of 20 ms to 200 ms. For example, the first time interval T.sub.1 is set to 100 ms.
(233) The dimming pulse generator 330 generates the multiple PWM signals S.sub.PWM1 through S.sub.PWMN for the multiple current sources 310_1 through 310_N based on the multiple control data D.sub.1 through D.sub.N. In the embodiment 6 (
(234) The duty cycle of the i-th PWM signal S.sub.PWMi is gradually changed at a second time interval T.sub.2 that is shorter than the first time interval T.sub.1 from the corresponding control data D.sub.i value before updating to the updated value thereof (which will be referred to as the “gradual-change mode”). The second time interval T.sub.2 is set to a value on the order of 1 ms to 10 ms. For example, the second time interval T.sub.2 is set to 5 ms.
(235) The dimming pulse generator 330 is capable of supporting a non-gradual-change mode in addition to the gradual-change mode. In the non-gradual-change mode, the duty cycle of the i-th PWM signal S.sub.PWMi is allowed to be immediately changed from the corresponding control data D.sub.i value before updating to the updated value thereof.
(236) The dimming pulse generator 330 may preferably be configured to dynamically switch its mode between the non-gradual-change mode and the gradual-change mode according to the settings received from the microcontroller 114. Preferably, the dimming pulse generator 330 is configured to dynamically switch its mode between the non-gradual-change mode and the gradual-change mode for each channel (for each dimming pulse). The setting data that indicates the mode may be appended to the control data D.sub.i.
(237) In a case in which the switching transistor M.sub.1 is controlled in the manner described in the embodiment 6, a part of or the whole of the on signal generating circuit 240 may be integrated on the current driver IC 300. The part of the on signal generating circuit 240 to be integrated may preferably be determined according to the circuit configuration of the on signal generating circuit 240. Specifically, the part of the on signal generating circuit 240 to be integrated may preferably determined so as to reduce the number of lines that couple the converter controller 230 and the current driver IC 300. As shown in
(238) Next, description will be made regarding the operation of the current driver IC 300.
(239) The above is the operation of the current driver IC 300. The advantages of the current driver IC 300 can be clearly understood in comparison with a comparison technique. If the current driver IC 300 does not have the function of gradually changing the duty cycle, the microcontroller 114 must update the control data D.sub.1 through D.sub.N that each indicate the duty cycle at the second time interval T.sub.2. In a case in which the number of channels N of the semiconductor light sources 102 exceeds several dozen to 100, such an arrangement requires a high-performance microcontroller, i.e., a high-cost microcontroller, configured as the microcontroller 114. Furthermore, such an arrangement requires high-speed communication between the microcontroller 114 and the current driver IC 300, thereby leading to the occurrence of a noise problem.
(240) In contrast, with the current driver IC 300 according to the embodiment, this arrangement allows the rate at which the microcontroller 114 updates the control data D.sub.1 through D.sub.N to be reduced. This allows the performance required for the microcontroller 114 to be reduced. Furthermore, this allows the communication speed between the microcontroller 114 and the current driver IC 300 to be reduced, thereby solving the noise problem.
(241) The first time interval T.sub.1 may preferably be configured to be variable. In a situation in which there is only a small change in the duty cycle, the first time interval T.sub.1 is increased so as to reduce the data communication amount, thereby allowing power consumption and noise to be reduced.
(242)
(243) As shown in
(244)
(245) The semiconductor chip 402 and the current driver IC 300 are mechanically joined and electrically coupled. The front face of the current driver IC 300 is provided with front-face electrodes 410 (LED1 through LEDN in
(246) The kind of the package of the integrated-driver light source 400 is not restricted in particular. As the package of the integrated-driver light source 400, a BAG (Ball Grid Array), PGA (Pin Grid Array), LGA (Land Grid Array), QFP (Quad Flat Package), or the like, may be employed.
(247) In a case in which the semiconductor light sources 102 and the current driver IC 300 are each configured as a separate module, a countermeasure may preferably be provided in which a heat dissipation structure or the like is attached to each module. In contrast, with the integrated-driver light source 400 as shown in
Embodiment 8
(248) With the automotive lamp 100 according to the embodiment 6, in some cases, such an arrangement has a problem of a reduction in the switching frequency in a light load state in which the number of the turned-on light sources 102 becomes small.
(249)
(250) However, in a case in which the pulse width of the control pulse S.sub.1 is excessively narrowed, such an arrangement is not able to turn on the switching transistor M.sub.1. Accordingly, such an arrangement is not capable of shortening the pulse width of the control pulse S.sub.1 such that it is smaller than a particular minimum pulse width. In other words, in the light load state, the pulse width of the control pulse S.sub.1 is fixed to the minimum pulse width (
(251)
(252) The frequency setting circuit 290 changes the target frequency according to the number of the on-state current sources (the number of turned-on light sources) from among the multiple current sources 210. More specifically, when the number of the on-state current sources becomes smaller than a predetermined threshold value, judgment is made that the light load state has been detected. In this state, the frequency setting circuit 290 sets the target frequency to a different frequency value that is lower than the original target frequency and does not belong to a particular band defined as an electromagnetic noise band. In a case in which, in the normal state, the target frequency is set to a frequency value of 300 kHz to 450 kHz between the LW band and AM band, when the operating state becomes the light load state, the target frequency may preferably be set to a band (e.g., 100 kHz) that is lower than the LW band and that is higher than the audible band.
(253) With an arrangement shown in
(254) With the embodiment 8, when the frequency is lowered in the light load state, such an arrangement is capable of maintaining the frequency such that it is outside the frequency range that causes an electromagnetic noise problem that is to be avoided.
Embodiment 9
(255)
(256) The dummy load 292 is coupled to the output of the switching converter 220. In the enable state, the dummy load 292 discharges the capacitor C.sub.1 of the switching converter 220 so as to lower the output voltage V.sub.OUT. The dummy load control circuit 294 controls the enable/disable state of the dummy load 292 based on the number of the on-state current sources from among the multiple current sources.
(257) The dummy load 292 includes a switch configured as a transistor arranged between the output of the switching converter 220 and the ground. After a predetermined time τ elapses from the turning-off of the switching transistor M.sub.1, the dummy load control circuit 294 asserts (sets to the high level, for example) the enable signal EN, so as to turn on the switch of the dummy load 292.
(258)
(259) The dummy load 292 may be configured as a constant current source that is capable of switching its state between the on state and the off state. Also, the dummy load 292 may be configured as a combination of switches and resistors.
Embodiment 10
(260) Description will be made with reference to
(261)
(262) The converter controller 230P includes a pulse modulator 235, a logic gate 233, and a driver 232. The pulse modulator 235 has the same configuration as those of the converter controllers 230A through 230E shown in
(263) With the present embodiment, the current source 210 is configured using a transistor having a low on resistance, thereby allowing power consumption to be reduced. As a tradeoff, such an arrangement involves such a transistor having a low breakdown voltage. However, when an overshoot occurs in the output voltage V.sub.OUT of the switching converter, the switching transistor M.sub.1 is immediately suspended. Such an arrangement is capable of preventing an overvoltage from being applied to the transistor of the current source (e.g., the transistor M.sub.2 shown in
(264) Description has been made in the embodiments regarding an arrangement in which the current source 210 is configured as a sink circuit, and is coupled to the cathode of the corresponding semiconductor light source 102. However, the present invention is not restricted to such an arrangement.
(265) Description has been made regarding the present invention with reference to the embodiments using specific terms. However, the above-described embodiments show only the mechanisms and applications of the present invention for exemplary purposes only, and are by no means intended to be interpreted restrictively. Rather, various modifications and various changes in the layout can be made without departing from the spirit and scope of the present invention defined in appended claims.