Position sensorless control method in low-speed region of fault-tolerant permanent magnet motor system based on envelope detection and non-orthogonal phase-locked loop

Abstract

In the position sensorless control method in low-speed region of the fault-tolerant permanent magnet motor system based on the envelope detection and the non-orthogonal phase-locked loop of the present disclosure, the position sensorless control of the motor is implemented by injecting the high-frequency voltage signals into any two non-faulty phase windings of the motor, extracting the high-frequency response currents of the high-frequency injected phases by the digital bandpass filter, calculating the differential mode inductances of the two phase windings through the envelope detecting and signal processing, and extracting the rotor position and rotational speed signals from the estimated two phase inductances through the non-orthogonal phase-locked loop. In addition, the controller of the present disclosure is small in size, high in accuracy, and high in reliability, which can effectively meet the performance requirements of the onboard electric actuators.

Claims

1. A position sensorless control method in low-speed region of a fault-tolerant permanent magnet motor system based on envelope detection and a non-orthogonal phase-locked loop, wherein the fault-tolerant permanent magnet motor system comprises a fault-tolerant permanent magnet motor, a signal detection circuit, an isolation drive circuit, a fault-tolerant power drive circuit, a DSP system and an FPGA system; the DSP system comprises a speed loop controller, a fault-tolerant controller and a sensorless resolving module, and the DSP system is configured for speed loop control, the calculation of a fault-tolerant current given instruction, the conditioning of an estimated inductance signal, and the resolving of a rotor position and a speed based on differential mode inductance of two phase windings of the system; wherein the FPGA system comprises a current A/D sampling control module, a current loop controller, a PWM generator module, a high-frequency signal generator, a digital bandpass filter, a digital notch filter, an envelope detection algorithm module, a data transmission module and a fault diagnosis module, and the FPGA system is configured for the A/D sampling control, the current loop control, the high-frequency voltage signal injection and the corresponding signal processing for sensorless control, PWM signal generation and system fault diagnosis; the sensorless control method in low-speed region comprises the following steps: step 1: injecting the high-frequency sinusoidal voltage signals; the high-frequency sinusoidal voltages are injected into any two non-faulty phase windings of the motor by superimposing digital high-frequency sinusoidal signals onto given voltages of two corresponding phases acquired by a current loop, wherein the high-frequency voltages applied on the two phase windings are expressed as follows: $\begin{array}{cc}\{\begin{array}{c}{U}_{Ah}=V_h\sin \left({\omega }_{h}t+{\phi }_A\right)\\ U_{Bh}=V_h\sin \left({\omega }_{h}t+{\phi }_B\right)\end{array},& \left(1\right)\end{array}$ where U.sub.Ah, U.sub.Bh respectively represent the high-frequency voltages applied on terminals of non-faulty phase windings A and B of the motor, V.sub.h is the amplitude of the injected high-frequency voltage, ω.sub.h is the frequency of the injected high-frequency voltage, and φ.sub.A, φ.sub.B represent the initial phase of the injected high-frequency voltage; according to the high-frequency approximate voltage model of the fault-tolerant permanent magnet motor, the high-frequency voltages are expressed as follows: $\begin{array}{cc}\{\begin{array}{c}{U}_{\mathrm{Ah}}=L_A\left({\theta }_r\right)\frac{{\mathrm{di}}_{\mathrm{Ah}}}{\mathrm{dt}}\\ U_{\mathrm{Bh}}=L_B\left({\theta }_r\right)\frac{{\mathrm{di}}_{\mathrm{Bh}}}{\mathrm{dt}}\end{array},& \left(2\right)\end{array}$ where L.sub.A(θ.sub.r), L.sub.B(θ.sub.r) respectively represent the self-inductances of the winding A and the winding B, θ.sub.r represents the electrical angle of the rotor, and i.sub.Ah, i.sub.Bh represent the high-frequency response currents of the winding A and the winding B, respectively; from equations (1) and (2), the high-frequency response currents are solved and expressed as follows: $\begin{array}{cc}\{\begin{array}{c}{i}_{Ah}=F_A\left(2{\omega }_{r}t\right)\sin \left({\omega }_{h}t+{\phi }_1\left({\omega }_r\right)\right)\\ i_{Bh}=F_B\left(2{\omega }_{r}t\right)\sin \left({\omega }_{h}t+{\phi }_2\left({\omega }_r\right)\right)\end{array},& \left(3\right)\end{array}$ where F.sub.A (2ω.sub.rt) and F.sub.B(2ω.sub.rt) respectively represent the amplitudes of the high-frequency response currents of phase A and phase B, ω.sub.r is the electrical angular velocity of the rotor, and these parameters have the following approximate relationship with the self-inductances of the winding A and the winding B: $\begin{array}{cc}\{\begin{array}{c}\frac{1}{F_A\left(2{\omega }_{r}t\right)}=\frac{{\omega }_h}{V_h}{L}_A\left(2{\omega }_{r}t\right)\\ \frac{1}{F_B\left(2{\omega }_{r}t\right)}=\frac{{\omega }_h}{V_h}{L}_B\left(2{\omega }_{r}t\right)\end{array};& \left(4\right)\end{array}$ step 2: designing the digital notch filter and the digital bandpass filter in the FPGA system according to the frequency of the injected high-frequency voltage signal; the designed digital notch filter is configured to filter out the high-frequency current response components in the current loop control signal and is designed according to the frequency of the injected high-frequency voltage signal; and the digital notch filter has a stop band in a very small frequency band near ω.sub.h and the amplitude attenuation greater than 50 dB at ω.sub.h, and has almost no amplitude attenuation in other frequency bands and no phase lag; the designed digital bandpass filter is configured to extract the high-frequency response currents, and has a pass-band in the frequency band near ω.sub.h and a sufficiently high order for ensuring sufficient attenuation of the stop band; both the digital notch filter and the digital bandpass filter have the sufficient bandwidth and have the sampling frequency f.sub.s meeting the following condition:
f.sub.s>2f.sub.PWM  (5), where f.sub.PWM is the PWM chopping frequency; step 3: detecting the actual currents of the winding A and the winding B by the signal detection circuit, and acquiring the high-frequency response currents i.sub.Ah and i.sub.Bh of the winding A and the winding B by the digital bandpass filter; step 4: extracting the amplitude signals F.sub.A (2ω.sub.rt) and F.sub.B (2ω.sub.r t) of the high-frequency response current signals i.sub.Ah and i.sub.Bh by performing the envelope detection thereon respectively, specifically as follows: in a digital system, the high-frequency response current signal input in the envelope detection is expressed as follows:
f(nT.sub.s)=F(nT.sub.s)cos(ω.sub.hnT.sub.s+φ(nT.sub.s)=F.sub.I(nT.sub.s)cos(ω.sub.hnT.sub.s)−F.sub.Q(nT.sub.s)sin(ω.sub.hnT.sub.s)  (6) where F(nT.sub.s) represents the amplitude signal of the high-frequency response current, F.sub.I(nT.sub.s) is the in-phase component, F.sub.Q (nT.sub.s) is the quadrature component, n represents the nth sampling point, and T.sub.s represents the sampling period; a mixing process is performed, in which the sine and cosine signals with amplitude 2 and frequency ω.sub.h generated by a digitally controlled oscillator are respectively multiplied with the input high-frequency response current signal, and a low-pass filtering process is performed, in which a product signal resulted in the mixing process is processed by a low-pass filter; after the mixing process and the low-pass filtering process, the following results are acquired: $\begin{array}{cc}\{\begin{array}{c}I=\mathrm{LP}F\left(f\left(n{T}_s\right).Math.2\cos \left({\omega }_{h}n{T}_s\right)\right)=F_I\left(n{T}_s\right)\\ Q=LPF\left(f\left(n{T}_s\right).Math.2\sin \left({\omega }_{h}n{T}_s\right)\right)=F_Q\left(n{T}_s\right)\end{array},& \left(7\right)\end{array}$ where I represents the in-phase component of the amplitude signal F(nT.sub.s), Q represents the quadrature component of the amplitude signal F(nT.sub.s), and LPF ( ) represents the process by a low-pass filter; the processed signal is then subjected to square sum and square root operations and the following result is acquired:
√{square root over (I.sup.2+Q.sup.2)}=√{square root over (F.sub.I(nT.sub.s).sup.2+F.sub.Q(nT.sub.s).sup.2)}=F(nT.sub.s)  (8); consequently, the amplitude information of the input signal is extracted after the process with the envelope detection algorithm; step 5: acquiring the estimated differential mode inductances and of the winding A and the winding B by conditioning the amplitude signals F.sub.A(2ω.sub.r t) and F.sub.B(2ω.sub.rt) of the high-frequency response current signals; by the equation (4), estimated the self-inductances of the winding A and the winding B are acquired by taking the inverse of F.sub.A(2ω.sub.rt) and F.sub.B(2ω.sub.rt) and multiplying the inverse by an appropriate gain, wherein the self-inductance comprises a common mode component and a differential mode component; then the estimated differential mode inductances are acquired by measuring the common mode component of the self-inductance and subtracting the common mode component from the self-inductance; and finally the estimated differential mode inductances are properly filtered to filter out the interference signals; step 6: resolving the estimated rotor electrical angular frequency and the double estimated electrical angle 2 by inputting the estimated differential mode inductances and of the non-fault phase windings A and B into the non-orthogonal phase-locked loop, which is composed of a phase detector, a loop filter and a voltage-controlled oscillator; wherein the estimated differential mode inductance signals and change at the double rotor angular frequency in one sine cycle, including the speed and position information of the fault-tolerant permanent magnet motor; and are non-orthogonal with a phase difference of 120°; the error related signal between the estimated phase of the input signal and the actual phase of the input signal, i.e., the rotor position estimation error related signal, is acquired by processing two input estimated inductance signals with the phase detector of the non-orthogonal phase-locked loop; and the following equation is satisfied for the phase detector output PLL.sub.err and the rotor position estimation error signal θ.sub.err: $\begin{array}{cc}PL{L}_{\mathrm{err}}=.Math.\cos \left(2\hat{\theta }-\frac{2\pi }{3}\right)-.Math.\cos \left(2\right)=\frac{\sqrt{3}}{2}L\sin \left(2{\theta }_{\mathrm{err}}\right)\approx \frac{\sqrt{3}}{2}L.Math.2{\theta }_{\mathrm{err}},& \left(9\right)\end{array}$ where θ.sub.err represents the error between the estimated rotor position and the actual rotor position, L is a constant characterizing the amplitude of inductance signal; the loop filter of the non-orthogonal phase-locked loop uses a PI controller, the rotor position estimation error-related signal PLL.sub.err input into the loop filter is PI-modulated, and the double estimated rotor electrical angular frequency 2 and thus are acquired after the modulating becomes stable; the double estimated electrical angle 2 is acquired by processing the 2 by an integrator of the voltage-controlled oscillator of the non-orthogonal phase-locked loop; and the PI parameters of the PI controller of the loop filter are the design parameters of the non-orthogonal phase-locked loop, and the PI parameters need the reasonable design and tuning for ensuring the stability and rapidity of the non-orthogonal phase-locked loop; step 7: discriminating the polarity of the rotor permanent magnet of the fault-tolerant permanent magnet motor based on the acceleration, resolving the estimated electrical angle of the rotor, and performing the fixed compensation for the estimated rotor position; it is necessary to discriminate the polarity of the rotor permanent magnet for determining , due to the possible presence of a deviation of 180° between the value acquired by dividing the double estimated electrical angle 2 resolved by the non-orthogonal phase-locked loop by 2 and the actual rotor position; the discrimination of the polarity of the rotor permanent magnet is performed only when the motor is started; the fixed compensation is performed on the estimated rotor inductance acquired from the phase-locked loop for ensuring control accuracy, since the phase of the estimated differential mode inductance signal lags behind the actual value due to the use of the filter.

2. The control method according to claim 1, wherein the fault-tolerant permanent magnet motor system can be operated in the fault mode of an open circuit fault and/or a short circuit fault for a phase winding.

3. The control method according to claim 1, wherein discriminating the polarity of the rotor permanent magnet in step 7 is performed specifically as follows: before the motor is started, causing the motor to operate on a trial basis according to the currently initially rotor position estimated by the non-orthogonal phase-locked loop for a short time, such as milliseconds; discriminating the polarity of the permanent magnet by determining the acceleration direction of the rotor during the short time, then determining that the estimated rotor electrical angle is 2/2 if the acceleration direction coincides with an excitation current, while determining that the estimated rotor electrical angle is $\frac{2}{2}+\pi$ if the acceleration direction does not coincide with the excitation current.

4. The control method according to claim 1, wherein the isolation drive circuit is composed of a gate isolation drive chip and peripheral circuits of the gate isolation drive chip, which is configured to implement isolation between the strong electrical signal of the power driver and the weak electrical signal of the digital controller for PWM control on the one hand, and to amplify the power of the PWM control signal generated by the FPGA system for driving and controlling the turn-on and turn-off of power MOSFETs on the other hand.

5. The control method according to claim 1, wherein the fault-tolerant power drive circuit is implemented by an H-bridge power drive circuit based on the power MOSFETs, and each phase winding of the fault-tolerant permanent magnet motor is driven and powered by a single H-bridge power drive circuit separately.

6. The control method according to claim 1, wherein the signal detection circuit comprises a current sensor, a signal conditioning circuit and an A/D conversion circuit; the current sensor detects the phase current of each phase winding of the fault-tolerant permanent magnet motor and provides an output in the form of a voltage signal; the signal conditioning circuit performs the low-pass filtering process and the signal level conversion process on the output from the current sensor, and output an analog signal to the A/D conversion circuit; and the A/D conversion circuit converts the analog signal into a digital signal and send the digital signal to the FPGA system; and the differential mode inductance signals of the two non-faulty phase windings are resolved in the DSP system finally by injecting the high-frequency voltage signals in the two non-faulty phase windings and processing the phase current signals of the corresponding windings through the FPGA system and the DSP system, the high precision sensorless resolving for the motor is completed thereby, and the rotor position and speed in the low-speed region of the fault-tolerant permanent magnet motor system in a fault state or in a non-fault state are estimated in real time; the given value of the motor electromagnetic torque instruction is acquired by the DSP system through the calculation of the speed loop controller in the DSP system according to the estimated motor speed and the control instruction signal from the host computer; the given value of the current instruction of the non-faulty phase winding of the motor is calculated by the fault-tolerant controller in the DSP system according to the given value of the motor electromagnetic torque instruction and the current fault state of the motor system, and is sent to the FPGA system; and the FPGA system performs the current loop control and PWM generation.

7. The control method according to claim 1, wherein the DSP system is implemented by a floating-point high-speed DSP with a type number of TMS320F28335, a main frequency of 150 MHz, and a single-precision floating-point processing unit.

8. The control method according to claim 1, wherein the FPGA system is composed of an FPGA chip and its peripheral circuits, and the FPGA chip has a type number of EP2C35F484 with a main frequency of 100 MHz, 33216 logics units, 105 M4K memory blocks, 35 multipliers, and 322 configurable I/O pins; the functions of the FPGA system include: controlling the current sampling by the A/D sampling control module; performing the fault diagnosis for the fault-tolerant permanent magnet motor system; filtering the sampled current; acquiring the amplitude information of the high-frequency currents by detecting the envelopes of high-frequency response currents; acquiring the given voltage instruction by the calculation of the current loop controller according to the given current instruction input from the DSP and the current feedback value measured by the A/D sampling control module; acquiring the new given voltages of the corresponding phase windings by superimposing the high-frequency voltage signals generated by the high-frequency signal generator onto the given voltages of the corresponding phase windings; and calculating the PWM control signals of the power switch transistors of respective phase windings by the PWM generator module according to the input given voltage signals of respective phases.

9. The control method according to claim 1, wherein the power MOSFET devices in the fault-tolerant power drive circuit have a type number of IXTP90N075T2, which has small conduction loss, small volume and weight, and high power density.

10. The control method according to claim 1, wherein the sensorless control method in low-speed region can be applied for the fault-tolerant permanent magnet motor system of the electric actuators.

11. The control method according to claim 2 wherein discriminating the polarity of the rotor permanent magnet in step 7 is performed specifically as follows: before the motor is started, causing the motor to operate on a trial basis according to the currently initially rotor position estimated by the non-orthogonal phase-locked loop for a short time, such as milliseconds; discriminating the polarity of the permanent magnet by determining the acceleration direction of the rotor during the short time, then determining that the estimated rotor electrical angle is 2/2 if the acceleration direction coincides with an excitation current, while determining that the estimated rotor electrical angle is $\frac{2}{2}+\pi$ it the acceleration direction does not coincide with the excitation current.

12. The control method according to claim 2, wherein the isolation drive circuit is composed of a gate isolation drive chip and peripheral circuits of the gate isolation drive chip, which is configured to implement isolation between the strong electrical signal of the power driver and the weak electrical signal of the digital controller for PWM control on the one hand, and to amplify the power of the PWM control signal generated by the FPGA system for driving and controlling the turn-on and turn-off of power MOSFETs on the other hand.

13. The control method according to claim 3, wherein the isolation drive circuit is composed of a gate isolation drive chip and peripheral circuits of the gate isolation drive chip, which is configured to implement isolation between the strong electrical signal of the power driver and the weak electrical signal of the digital controller for PWM control on the one hand, and to amplify the power of the PWM control signal generated by the FPGA system for driving and controlling the turn-on and turn-off of power MOSFETs on the other hand.

14. The control method according to claim 2, wherein the fault-tolerant power drive circuit is implemented by an H-bridge power drive circuit based on the power MOSFETs, and each phase winding of the fault-tolerant permanent magnet motor is driven and powered by a single H-bridge power drive circuit separately.

15. The control method according to claim 3, wherein the fault-tolerant power drive circuit is implemented by an H-bridge power drive circuit based on the power MOSFETs, and each phase winding of the fault-tolerant permanent magnet motor is driven and powered by a single H-bridge power drive circuit separately.

16. The control method according to claim 4, wherein the fault-tolerant power drive circuit is implemented by an H-bridge power drive circuit based on the power MOSFETs, and each phase winding of the fault-tolerant permanent magnet motor is driven and powered by a single H-bridge power drive circuit separately.

17. The control method according to claim 2, wherein the signal detection circuit comprises a current sensor, a signal conditioning circuit and an A/D conversion circuit; the current sensor detects the phase current of each phase winding of the fault-tolerant permanent magnet motor and provides an output in the form of a voltage signal; the signal conditioning circuit performs the low-pass filtering process and the signal level conversion process on the output from the current sensor, and output an analog signal to the A/D conversion circuit; and the A/D conversion circuit converts the analog signal into a digital signal and send the digital signal to the FPGA system; and the differential mode inductance signals of the two non-faulty phase windings are resolved in the DSP system finally by injecting the high-frequency voltage signals in the two non-faulty phase windings and processing the phase current signals of the corresponding windings through the FPGA system and the DSP system, the high precision sensorless resolving for the motor is completed thereby, and the rotor position and speed in the low-speed region of the fault-tolerant permanent magnet motor system in a fault state or in a non-fault state are estimated in real time; the given value of the motor electromagnetic torque instruction is acquired by the DSP system through the calculation of the speed loop controller in the DSP system according to the estimated motor speed and the control instruction signal from the host computer; the given value of the current instruction of the non-faulty phase winding of the motor is calculated by the fault-tolerant controller in the DSP system according to the given value of the motor electromagnetic torque instruction and the current fault state of the motor system, and is sent to the FPGA system; and the FPGA system performs the current loop control and PWM generation.

18. The control method according to claim 3, wherein the signal detection circuit comprises a current sensor, a signal conditioning circuit and an A/D conversion circuit; the current sensor detects the phase current of each phase winding of the fault-tolerant permanent magnet motor and provides an output in the form of a voltage signal; the signal conditioning circuit performs the low-pass filtering process and the signal level conversion process on the output from the current sensor, and output an analog signal to the A/D conversion circuit; and the A/D conversion circuit converts the analog signal into a digital signal and send the digital signal to the FPGA system; and the differential mode inductance signals of the two non-faulty phase windings are resolved in the DSP system finally by injecting the high-frequency voltage signals in the two non-faulty phase windings and processing the phase current signals of the corresponding windings through the FPGA system and the DSP system, the high precision sensorless resolving for the motor is completed thereby, and the rotor position and speed in the low-speed region of the fault-tolerant permanent magnet motor system in a fault state or in a non-fault state are estimated in real time; the given value of the motor electromagnetic torque instruction is acquired by the DSP system through the calculation of the speed loop controller in the DSP system according to the estimated motor speed and the control instruction signal from the host computer; the given value of the current instruction of the non-faulty phase winding of the motor is calculated by the fault-tolerant controller in the DSP system according to the given value of the motor electromagnetic torque instruction and the current fault state of the motor system, and is sent to the FPGA system; and the FPGA system performs the current loop control and PWM generation.

19. The control method according to claim 4, wherein the signal detection circuit comprises a current sensor, a signal conditioning circuit and an A/D conversion circuit; the current sensor detects the phase current of each phase winding of the fault-tolerant permanent magnet motor and provides an output in the form of a voltage signal; the signal conditioning circuit performs the low-pass filtering process and the signal level conversion process on the output from the current sensor, and output an analog signal to the A/D conversion circuit; and the A/D conversion circuit converts the analog signal into a digital signal and send the digital signal to the FPGA system; and the differential mode inductance signals of the two non-faulty phase windings are resolved in the DSP system finally by injecting the high-frequency voltage signals in the two non-faulty phase windings and processing the phase current signals of the corresponding windings through the FPGA system and the DSP system, the high precision sensorless resolving for the motor is completed thereby, and the rotor position and speed in the low-speed region of the fault-tolerant permanent magnet motor system in a fault state or in a non-fault state are estimated in real time; the given value of the motor electromagnetic torque instruction is acquired by the DSP system through the calculation of the speed loop controller in the DSP system according to the estimated motor speed and the control instruction signal from the host computer; the given value of the current instruction of the non-faulty phase winding of the motor is calculated by the fault-tolerant controller in the DSP system according to the given value of the motor electromagnetic torque instruction and the current fault state of the motor system, and is sent to the FPGA system; and the FPGA system performs the current loop control and PWM generation.

20. The control method according to claim 5, wherein the signal detection circuit comprises a current sensor, a signal conditioning circuit and an A/D conversion circuit; the current sensor detects the phase current of each phase winding of the fault-tolerant permanent magnet motor and provides an output in the form of a voltage signal; the signal conditioning circuit performs the low-pass filtering process and the signal level conversion process on the output from the current sensor, and output an analog signal to the A/D conversion circuit; and the A/D conversion circuit converts the analog signal into a digital signal and send the digital signal to the FPGA system; and the differential mode inductance signals of the two non-faulty phase windings are resolved in the DSP system finally by injecting the high-frequency voltage signals in the two non-faulty phase windings and processing the phase current signals of the corresponding windings through the FPGA system and the DSP system, the high precision sensorless resolving for the motor is completed thereby, and the rotor position and speed in the low-speed region of the fault-tolerant permanent magnet motor system in a fault state or in a non-fault state are estimated in real time; the given value of the motor electromagnetic torque instruction is acquired by the DSP system through the calculation of the speed loop controller in the DSP system according to the estimated motor speed and the control instruction signal from the host computer; the given value of the current instruction of the non-faulty phase winding of the motor is calculated by the fault-tolerant controller in the DSP system according to the given value of the motor electromagnetic torque instruction and the current fault state of the motor system, and is sent to the FPGA system; and the FPGA system performs the current loop control and PWM generation.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic diagram of the overall structure of the fault-tolerant permanent magnet motor system for an onboard electric actuator according to the present disclosure;

(2) FIG. 2 is a schematic diagram of component modules and functions of the FPGA system and the DSP system according to the present disclosure;

(3) FIG. 3 is a schematic diagram of the structure of the fault-tolerant power drive circuit according to the present disclosure;

(4) FIG. 4 is a schematic diagram of the structure of the position sensorless high-precision control algorithm based on envelope detection and non-orthogonal phase-locked loop according to the present disclosure;

(5) FIG. 5 is a schematic diagram of the specific algorithm of the envelope detection algorithm according to the present disclosure; and

(6) FIG. 6 is a schematic diagram of the specific algorithm of the non-orthogonal phase-locked loop according to the present disclosure.

DETAILED DESCRIPTION

(7) A specific embodiment of technical solutions of the present disclosure will be described in detail below with reference to FIGS. 1-6.

(8) FIG. 1 shows the block diagram of the high-reliability drive controller of the fault-tolerant permanent magnet motor for the onboard electric actuator according to the present disclosure. The drive controller includes a floating-point high-speed DSP system, a large-scale programmable logic gate array FPGA system, an isolation drive circuit, a fault-tolerant power drive circuit and a signal detection circuit. The DSP system is implemented by a floating-point high-speed DSP with a type number of TMS320F28335 with a main frequency of 150 MHz, and a single-precision floating-point number processing unit. The FPGA system is composed of an FPGA chip and its peripheral circuits, and the FPGA chip has a type number of EP2C35F484 (Cyclone II series, from ALTERA) with a main frequency of 100 MHz, 33216 logics units, 35 multipliers, 322 configurable I/O pins. The MOSFET devices in the fault-tolerant power drive circuit have a type number of IXTP90N075T2, which has small conduction loss, small volume and weight, and high power density.

(9) The high-reliability drive controller of the fault-tolerant permanent magnet motor system for electric actuators is able to estimate the motor rotor position and speed information by: injecting the high-frequency voltage signals into two non-faulty phase windings of the motor, acquiring the corresponding current signals of the phase windings by the signal detection circuit, resolving the current response signals of the high-frequency injection phases in the FPGA and the DSP through the signal detection circuit, and accurately estimating the motor rotor position and speed information through the high-precision sensorless control algorithm. The motor controller performs the following processes: acquiring the given instruction of electromagnetic torque through the calculation of the speed loop controller according to the estimated speed and the speed instruction from a host computer; calculating the given current instruction of the non-faulty phase of the motor by the fault-tolerant controller according to the given instruction of electromagnetic torque, the estimated position and the fault state of the system; calculating the given voltages of the non-fault phases by the current loop resolution according to the given current instruction and the current feedback value detected by the signal detection circuit, wherein the given voltages of the two non-faulty phase windings as high-frequency injection phases are necessarily superimposed with the high-frequency voltage signal generated by the high-frequency signal generator; and finally generating the PWM control instruction by the PWM generator module. The PWM control instruction is amplified in power by the isolation drive circuit and the amplified instruction is transmitted to the fault-tolerant power driver for controlling the turn-on and turn-off of power switch transistors thereof, so as to achieve the sensorless control of the fault-tolerant permanent magnet motor and ensure the smooth operation thereof under fault or non-fault conditions.

(10) As shown in FIG. 2, the main functions of the FPGA system include: controlling the current sampling by the A/D sampling control module; performing the fault diagnosis for the fault-tolerant permanent magnet motor system; filtering the sampled current; acquiring the amplitude information of the high-frequency currents by detecting the envelopes of high-frequency response currents; acquiring the given voltage instruction by the calculation of the current loop controller according to the given current instruction input from the DSP and the current feedback value measured by the A/D sampling control module; acquiring the new given voltages of the corresponding phase windings by superimposing the high-frequency voltage signals generated by the high-frequency signal generator onto the given voltages of the corresponding phase windings; and calculating the PWM control signals of the power switch transistors of respective phase windings by the PWM generator module according to the input given voltage signals of respective phases.

(11) The DSP system is composed of a DSP chip and its peripheral circuits. The DSP chip is implemented by a 32-bit floating-point DSP with a type number of TMS320F28335 (from TI Inc. of US) with a main frequency of 150 MHz, and a 32-bit floating-point processing unit. As shown in FIG. 2, the main functions of the DSP system include: estimating the real time rotor position and speed values of the motor in the low-speed region of the fault-tolerant permanent magnet motor system under fault and non-fault conditions by resolution of the high-precision sensorless controller according to the amplitude signals of the high-frequency response currents resolved by the FPGA system; acquiring the given values of electromagnetic torque by the calculation of the speed loop controller according to the speed control instruction from a host computer and the estimated speed value; and acquiring the given current instruction of the non-faulty windings of the motor by the calculation of the fault-tolerant controller according to the given values of the electromagnetic torque and the estimated rotor position, combined with the failure mode given by the FPGA, and transmitting the given current instruction to the FPGA.

(12) As shown in FIG. 3, the fault-tolerant power driver is composed of the H-bridge drive circuit, and each phase winding of the fault-tolerant permanent magnet motor is driven and powered by one H-bridge drive circuit separately. The power devices of the H-bridge drive circuit are implemented by an N-channel enhancement MOSFET (from IXYS Inc. of US) with a type number of IXTP90N075T2 with the withstand voltage of 75V, the maximum current of 90 A, on-resistance of less than 10 mΩ, which is small in size, low in loss and high in power density, and so on.

(13) The overall sensorless control algorithm for the motor speed/position detection is shown in FIG. 4. The estimated differential mode inductance signals of two non-faulty phase windings are acquired by: injecting the high-frequency voltages into the two non-faulty phase windings; detecting the currents of the two phase windings by the signal detection circuit; extracting the high-frequency response current components in the detected currents by the bandpass filter; acquiring the amplitude signals of the high-frequency response currents by performing the envelope detection on the high-frequency response current components; and conditioning the amplitude signals. The differential mode inductance signal contains the rotor speed/position information of the double frequency, and is input to the non-orthogonal phase-locked loop for resolution by which the estimated values of the double speed/position are acquired. Finally, the estimated rotor speed/position of the motor can be acquired after the discrimination of the polarity of the rotor permanent magnet.

(14) The isolation drive circuit is mainly composed of a gate isolation drive chip and peripheral circuits thereof. The isolation drive circuit has two functions: implementing the electrical isolation between the strong electrical signal of the fault-tolerant power driver and the weak electrical signal of the PWM controller, thereby improving the stability of the system; and performing the power amplification for the PWM signal generated by the FPGA system. The gate isolation drive chip is implemented by an isolation-type high-precision half-bridge driver with a type number of ADuM7234 (from ADI Inc.), which isolates the high voltage side and the low voltage side by the magnetic isolation technologies, and has the good isolation performance, a high operation frequency up to 1 MHz, the strong anti-interference ability, the high temperature resistance, and the small size.

(15) The signal detection circuit includes a current sensor, a signal conditioning circuit and an A/D (analog-to-digital) converter. The current sensor is configured to detect the currents of respective phases of the fault-tolerant permanent magnet motor. The current sensor is implemented by a voltage-type Hall current sensor with a type number of LTS 15-NP (from LEM Inc.), which has the fast response speed, the high precision, the strong anti-interference ability, the good linearity, and the small temperature drift. The signal conditioning circuit is composed of the operational amplifiers, the resistors and the capacitors, and is configured for applying the filtering and the level conversion processing on the signals acquired by the current sensor. The A/D converter is configured to convert the conditioned current analog signal into a digital signal to be sent to the FPGA system. The A/D converter includes an A/D converter chip implemented by an AD7606 chip (from ADI Inc.), which is an 8-channel synchronous sampling data acquisition chip with 14-bit conversion accuracy.

(16) The position sensorless control method in low-speed region includes the following steps:

(17) step 1: injecting the high-frequency sinusoidal voltage signal;

(18) the high-frequency sinusoidal voltages are injected into two non-faulty phase windings by superimposing the digital high-frequency sinusoidal signals onto the given voltages of two corresponding phases acquired by the current loop, wherein the high-frequency voltages applied on the two phase windings are expressed as follows:

(19) $\begin{array}{cc}\{\begin{array}{c}{U}_{Ah}=V_h\sin \left({\omega }_{h}t+{\phi }_A\right)\\ U_{Bh}=V_h\sin \left({\omega }_{h}t+{\phi }_B\right)\end{array},& \left(1\right)\end{array}$

(20) where U.sub.Ah, U.sub.Bh respectively represent the high-frequency voltages applied on the terminals of non-faulty phase windings A and B of the motor, V.sub.h is the amplitude of the injected high-frequency voltage, ω.sub.h is the frequency of the injected high-frequency voltage, and φ.sub.A, φ.sub.B represent the initial phase of the injected high-frequency voltage;

(21) according to the high-frequency approximate voltage model of the fault-tolerant permanent magnet motor, the high-frequency voltages are expressed as follows:

(22) $\begin{array}{cc}\{\begin{array}{c}{U}_{\mathrm{Ah}}=L_A\left({\theta }_r\right)\frac{{\mathrm{di}}_{\mathrm{Ah}}}{\mathrm{dt}}\\ U_{\mathrm{Bh}}=L_B\left({\theta }_r\right)\frac{{\mathrm{di}}_{\mathrm{Bh}}}{\mathrm{dt}}\end{array},& \left(2\right)\end{array}$

(23) where L.sub.A(θ.sub.r), L.sub.B(θ.sub.r) respectively represent the self-inductances of the winding A and the winding B, θ.sub.r represents the electrical angle of the rotor, and i.sub.Ah, i.sub.Bh represents the high-frequency response currents of the winding A and the winding B, respectively;

(24) from equations (1) and (2), the high-frequency response currents are solved and expressed as follows:

(25) 0$\begin{array}{cc}\{\begin{array}{c}{i}_{Ah}=F_A\left(2{\omega }_{r}t\right)\sin \left({\omega }_{h}t+{\phi }_1\left({\omega }_r\right)\right)\\ i_{Bh}=F_B\left(2{\omega }_{r}t\right)\sin \left({\omega }_{h}t+{\phi }_2\left({\omega }_r\right)\right)\end{array},& \left(3\right)\end{array}$

(26) where F.sub.A (2ω.sub.rt) and F.sub.B (2ω.sub.rt) respectively represent the amplitudes of the high-frequency response currents of phase A and phase B, ω.sub.r is the electrical angular velocity of the rotor, and these parameters have the following approximate relationship with the self-inductances of the winding A and the winding B:

(27) $\begin{array}{cc}\{\begin{array}{c}\frac{1}{F_A\left(2{\omega }_{r}t\right)}=\frac{{\omega }_h}{V_h}{L}_A\left(2{\omega }_{r}t\right)\\ \frac{1}{F_B\left(2{\omega }_{r}t\right)}=\frac{{\omega }_h}{V_h}{L}_B\left(2{\omega }_{r}t\right)\end{array};& \left(4\right)\end{array}$

(28) step 2: designing the digital notch filter and the digital bandpass filter in the FPGA system according to the frequency of the injected high-frequency voltage signal;

(29) The designed digital notch filter is configured to filter out the high-frequency current response components in the current loop control signal and is designed according to the frequency of the injected high-frequency voltage signal; and the digital notch filter has a stop band in a very small frequency band near ω.sub.h and the amplitude attenuation greater than 50 dB at ω.sub.h, and has almost no amplitude attenuation in other frequency bands and no phase lag;

(30) the designed digital bandpass filter is configured to extract the high-frequency response currents, and has a pass-band in the frequency band near ω.sub.h and a sufficiently high order for ensuring sufficient attenuation of the stop band;

(31) both the digital notch filter and the digital bandpass filter have the sufficient bandwidth and have the sampling frequency f.sub.s meeting the following condition:
f.sub.s>2f.sub.PWM  (5),

(32) where f.sub.PWM is the PWM chopping frequency;

(33) step 3: detecting the actual currents of the winding A and the winding B by the signal detection circuit, and acquiring the high-frequency response currents i.sub.Ah and i.sub.Bh of the winding A and the winding B by the digital bandpass filter;

(34) step 4: extracting the amplitude signals F.sub.A(2ω.sub.rt) and F.sub.B(2ω.sub.rt) of the high-frequency response current signals i.sub.Ah and i.sub.Bh by performing the envelope detection thereon respectively, specifically as follows:

(35) in the digital system, the high-frequency response current signal input in the envelope detection can be expressed as follows:
f(nT.sub.s)=F(nT.sub.s)cos(ω.sub.hnT.sub.s+φ(nT.sub.s))=F.sub.I(nT.sub.s)cos(ω.sub.hnT.sub.s)−F.sub.Q(nT.sub.s)sin(ω.sub.hnT.sub.s)  (6),

(36) where F(nT.sub.s) represents the amplitude signal of the high-frequency response current, F.sub.I(nT.sub.s) is the in-phase component, F.sub.Q(nT.sub.s) is the quadrature component, n represents the nth sampling point, and T.sub.s represents the sampling period;

(37) a mixing process is performed, in which the sine and cosine signals with amplitude 2 and frequency ω.sub.h generated by a digitally controlled oscillator are respectively multiplied with the input high-frequency response current signal. A low-pass filtering process is then performed, in which a product signal resulted in the mixing process is processed by the low-pass filter. After the mixing process and the low-pass filtering process, the following results are acquired:

(38) $\begin{array}{cc}\{\begin{array}{c}I=\mathrm{LP}F\left(f\left(n{T}_s\right).Math.2\cos \left({\omega }_{h}n{T}_s\right)\right)=F_I\left(n{T}_s\right)\\ Q=LPF\left(f\left(n{T}_s\right).Math.2\sin \left({\omega }_{h}n{T}_s\right)\right)=F_Q\left(n{T}_s\right)\end{array},& \left(7\right)\end{array}$

(39) where I represents the in-phase component of the amplitude signal F(nT.sub.s), Q represents the quadrature component of the amplitude signal F(nT.sub.s), and LPF ( ) represents the process by a low-pass filter;

(40) the processed signal is then subjected to the square sum and square root operations and the following result is acquired:
√{square root over (I.sup.2+Q.sup.2)}=√{square root over (F.sub.I(nT.sub.s).sup.2+F.sub.Q(nT.sub.s).sup.2)}=F(nT.sub.s)  (8);

(41) consequently, the amplitude information of the input signal is extracted after the process with the envelope detection algorithm;

(42) step 5: acquiring the estimated differential mode inductances and of the winding A and the winding B by conditioning the amplitude signals F.sub.A(2ω.sub.rt) and F.sub.B(2ω.sub.rt) of the high-frequency response current signals;

(43) by the equation (4), the estimated self-inductances of the winding A and the winding B are acquired by taking the inverse of F.sub.A(2ω.sub.rt) and F.sub.B(2ω.sub.rt) and multiplying the inverse by an appropriate gain, wherein the self-inductance includes a common mode component and a differential mode component; then the estimated differential mode inductances are acquired by measuring the common mode component of the self-inductance and subtracting the common mode component from the self-inductance; and finally the estimated differential mode inductances are properly filtered to filter out the interference signals;

(44) step 6: resolving the estimated rotor electrical angular frequency and the double estimated electrical angle 2 by inputting the estimated differential mode inductances and of the non-fault phase windings A and B into the non-orthogonal phase-locked loop, which is composed of a phase detector, a loop filter and a voltage-controlled oscillator;

(45) wherein the estimated differential mode inductance signals and change at a double rotor angular frequency in one sine cycle, including the speed and position information of the fault-tolerant permanent magnet motor; and are non-orthogonal with a phase difference of 120°; the error related signal between the estimated phase of the input signal and the actual phase of the input signal, i.e., the rotor position estimation error related signal, can be acquired by processing the two input estimated inductance signals with the phase detector of the non-orthogonal phase-locked loop; and the following equation is satisfied for the phase detector output PLL.sub.err and the rotor position estimation error signal θ.sub.err:

(46) $\begin{array}{cc}PL{L}_{\mathrm{err}}=.Math.\cos \left(2\hat{\theta }-\frac{2\pi }{3}\right)-.Math.\cos \left(2\hat{\theta }\right)=\frac{\sqrt{3}}{2}L\sin \left(2{\theta }_{\mathrm{err}}\right)\approx \frac{\sqrt{3}}{2}L.Math.2{\theta }_{\mathrm{err}},& \left(9\right)\end{array}$

(47) where θ.sub.err represents the error between the estimated rotor position and the actual rotor position, L is a constant characterizing the amplitude of the inductance signal; the loop filter of the non-orthogonal phase-locked loop uses a PI controller, the rotor position estimation error-related signal PLL.sub.err input into the loop filter is PI-modulated, and the double estimated rotor electrical angular frequency 2 and thus are acquired after the modulating becomes stable; the double estimated electrical angle 2 is acquired by processing the 2 by an integrator of the voltage-controlled oscillator of the non-orthogonal phase-locked loop; and the PI parameters of the PI controller of the loop filter are the design parameters of the non-orthogonal phase-locked loop, and the PI parameters need the reasonable design and tuning for ensuring the stability and rapidity of the non-orthogonal phase-locked loop;

(48) step 7: discriminating the polarity of the rotor permanent magnet of the fault-tolerant permanent magnet motor based on the acceleration, resolving the estimated electrical angle of the rotor, and performing the fixed compensation for the estimated rotor position;

(49) it is necessary to discriminate the polarity of the rotor permanent magnet for determining , due to the possible presence of a deviation of 180° between the value acquired by dividing the double estimated electrical angle 2 resolved by the non-orthogonal phase-locked loop by 2 and the actual rotor position;

(50) the discrimination of the polarity of the rotor permanent magnet is performed only when the motor is started; discriminating the polarity of the rotor permanent magnet is performed specifically as follows: before the motor is started, causing the motor to operate on a trial basis according to the currently initially rotor position estimated by the non-orthogonal phase-locked loop for a short time (milliseconds); discriminating the polarity of the permanent magnet by determining the acceleration direction of the rotor during the short time, then determining that the estimated rotor electrical angle is 2/2 if the acceleration direction coincides with an excitation current, while determining that the estimated rotor electrical angle is

(51) $\frac{2r_{}}{2}+\pi$
if the acceleration direction does not coincide with the excitation current.

(52) The fixed compensation is performed on the estimated rotor inductance acquired from the phase-locked loop for ensuring the control accuracy, since the phase of the estimated differential mode inductance signal lags behind the actual value due to the use of the filter.

(53) The fault-tolerant permanent magnet motor can be operated in the fault modes of an open circuit fault and/or a short circuit fault for a phase winding.

(54) In addition, it should be understood that although this specification is described in accordance with embodiments, each embodiment includes more than one independent technical solution. This description manner in the specification is only for clarity, and those skilled in the art should consider the specification as a whole. The technical solutions in the embodiments may also be appropriately combined to form other embodiments that may be understood by those skilled in the art.