OPTIMISED CIRCULAR CONVOLUTIONS STAGE FOR OS/OSB FBMC RECEIVERS
20230140597 · 2023-05-04
Inventors
Cpc classification
H04L27/2654
ELECTRICITY
International classification
Abstract
A device configured to perform a stage of circular convolutions in an Overlap-Save Filtered-Bank Multicarrier Communication (OS-FBMC) or Overlap-Save-Block FBMC (OSB-FBMC) receiver and the corresponding method, the stage of circular convolutions comprising P circular convolutions operated between subsets of input samples and frequency domain responses of a frequency shifted version of a prototype filter associated to an FBMC modulation having C.sub.g coefficients, with P an integer greater than one, the device comprising at least one Finite Impulse Response filter implemented in the form of a transposed direct filter having at least C.sub.g−1 taps numbered p=−Δ+1 to p=Δ with
wherein the multiplier coefficient of each tap p within the set of taps −Δ+1; 0
has an equal absolute value to the multiplier coefficient of tap (1−p) . An FBMC equalization and demodulation unit or an FBMC receiver comprising the device.
Claims
1. A device configured to perform a stage of circular convolutions in an Overlap-Save Filtered-Bank MultiCarrier (OS-FBMC) or Overlap-Save-Block FBMC (OSB-FBMC) receiver, the stage of circular convolutions performing P circular convolutions between subsets of input samples and frequency domain responses of frequency shifted versions of a prototype filter associated to the FBMC modulation having C.sub.g coefficients, said input samples being designated as [X(0) . . . X(KMP−1)] with M a number of subcarriers, K an oversampling factor of a Filtered-Bank MultiCarrier (FBMC) modulation applied to a FBMC signal received by the receiver and P an integer greater than one, wherein the stage of circular convolutions comprises: a first Finite Impulse Response (FIR) filter implemented in the form of a transposed direct filter having C.sub.g taps numbered p=−Δ to p=Δ, the multiplier coefficient of each tap p within the set of taps −Δ;−1
having an equal value to the multiplier coefficient of tap (−p), and taking as input a subset X.sub.0=[X(0), X(P), X(2P), . . . , X((KM−1)P)] of said input samples; at least one Finite Impulse Response (FIR) filter, each of said FIR filter being implemented in the form of a transposed direct filter having at least C.sub.g−1 taps numbered p=−Δ+1 to p=Δ with
−Δ+1;0
having an equal absolute value to the multiplier coefficient of tap (1−p), and taking as input a subset or a combination of subsets of said input samples; the coefficients of the first FIR filter and of the at least one FIR filter being based on said frequency domain responses of frequency shifted versions of a prototype filter associated to the FBMC modulation.
2. The device of claim 1, where P is even, and where the at least one FIR filter comprises a second FIR filter implemented in the form of a transposed direct filter having at least C.sub.g−1 taps numbered p=−Δ+1 to p=Δ, the second FIR filter taking as input the subset of input samples X.sub.P/2=[X(P/2), X(P/2+P), X(P/2+2P), . . . , X(P/2+(KM−1)P)], the multiplier coefficient of each tap p within the set of taps −Δ+1;0
having an opposite value to the multiplier coefficient of tap (1−p).
3. The device of claim 2, wherein the coefficients of the first and second FIR filters are the C.sub.g significant coefficients of:
4. The device according to claim 1, wherein the at least one FIR filter comprises a partial summation unit configured to take as input subsets X.sub.l and X.sub.P−l of said input samples, with X.sub.l=[X(l),X(l+P), X(l+2P), . . . , X(l+(KM−1)P)] and X.sub.P−l=[X(P−l), X(P−l+P), X(P−l+2P), . . . , X(P−l+(KM−1)P)], l∈1,P/2−1
, the partial summation unit comprising: one or more calculation unit configured to calculate a first set of samples equal to X.sub.l−X.sub.P−l and a second set of samples equal to X.sub.l+X.sub.P−l, a first FIR sub-filter implemented in the form of a transposed direct filter having at least C.sub.g−1 taps numbered p=−Δ+1 to p=Δ taking as input the first set of samples, the multiplier coefficient of each tap p within the set of taps
−Δ+1;0
having an equal value to the multiplier coefficient of tap (1−p), a second FIR sub-filter implemented in the form of a transposed direct filter having at least C.sub.g−1 taps numbered p=−Δ+1 to p=Δ taking as input the second set of samples, the multiplier coefficient of each tap p within the set of taps
−Δ+1;0
having an opposite value to the multiplier coefficient of tap (1−p), and a calculation unit configured to sum and divide by a factor two corresponding outputs of the first and second FIR sub-filters.
5. The device of claim 4, wherein the coefficients of the first FIR sub-filter are the C.sub.g significant coefficients of R.sub.l(p)=G.sub.l(p)+G.sub.l(1−p), with:
6. The device of claim 4, comprising
7. The device of claim 1, wherein taps having equal absolute values in a FIR filter among the said first FIR filter, and when relevant second FIR filter, first FIR sub-filter and second FIR sub-filter, are implemented by a single multiplier.
8. The device of claim 7, wherein said taps implemented by a single multiplier and having multipliers coefficients of opposite values comprise means to calculate the opposite of an output of the said single multiplier.
9. The device according to claim 1, wherein multiplier coefficients of the said first FIR filter, and when relevant second FIR filter, first FIR sub-filter and second FIR sub-filter are real and implemented in the form of networks of constant multipliers.
10. An FBMC equalization and demodulation unit configured to process an FBMC signal comprising FBMC symbols, each FBMC symbol comprising data mapped over M subcarriers, oversampled by a factor K, filtered by a prototype filter and transposed in the time-domain, the FBMC equalization and demodulation unit comprising: a frequency domain transposition unit, configured to transpose a block of P*KM samples comprising at least one FBMC symbol into frequency domain samples, where P is an integer greater than one, an equalizer unit configured to output a set of equalized samples X by multiplying said frequency domain samples by coefficients computed from a propagation channel estimate, a device as of claim 1 configured to perform a stage of circular convolutions and taking as input samples the set equalized samples X, and adders, configured to sum outputs of said device.
11. An FBMC receiver comprising an FBMC equalization and demodulation unit as of claim 10.
12. A method to perform P circular convolutions in an Overlap-Save Filtered-Bank MultiCarrier (OS-FBMC) or Overlap-Save-Block FBMC (OSB-FBMC) receiver between subsets of input samples and frequency domain responses of frequency shifted versions of a prototype filter associated to the FBMC modulation having C.sub.g coefficients, said input samples being designated as [X(0) . . . X(KMP−1)] with M a number of subcarriers, K an oversampling factor of a Filtered-Bank MultiCarrier (FBMC) modulation applied to a FBMC signal received by the receiver and P an integer greater than one, the method comprising the steps of: filtering a subset X.sub.0=[X(0), X(P), X(2P), . . . , X((KM−1)P)] of said input samples by a first Finite Impulse Response (FIR) filter implemented in the form of a transposed direct filter having C.sub.g taps numbered p=−Δ to p=Δ, the multiplier coefficient of each tap p within the set of taps −Δ;−1
having an equal value to the multiplier coefficient of tap (−p); filtering a subset or a combination of subsets of said input samples by at least one FIR filter implemented in the form of a transposed direct FIR filter having at least C.sub.g−1 taps numbered p=−Δ+1 to p=Δ with
−Δ+1;0
having an equal absolute value to the multiplier coefficient of taps (1−p), the coefficients of the first FIR filter and of the at least one FIR filter being based on said frequency domain responses of frequency shifted versions of a prototype filter associated to the FBMC modulation.
13. A computer program adapted to implement the method of claim 12.
14. A computer readable medium incorporating the computer program of claim 13.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0052] The invention will be better understood and its various features and advantages will emerge from the following description of a number of exemplary embodiments and its appended figures in which:
[0053]
[0054]
[0055]
[0056]
[0057]
[0058]
[0059]
[0060]
[0061] The examples disclosed in this specification are only illustrative of some embodiments of the invention.
DETAILED DESCRIPTION OF THE INVENTION
[0062] As can be seen in Eq. 4, the P circular convolutions can be implemented through independent FIR filters. A straightforward implementation of Eq. 4 could be done using FIR filter architectures known as “direct-form FIR”, as shown in
[0063]
[0064] Some known improvements may be done to both FIR architectures. For instance, as coefficients G.sub.l are of constant values (they only depend on the impulse response of the prototype filter and the index l of the circular convolution considered), multiplier-less FIR architectures can be designed for fixed-point precision that use adders and shifts in place of multipliers. Such multiplier-less FIR architectures require far less hardware resources (logic gates) than regular multipliers, achieving thus an important hardware complexity reduction. Advantageously, as all the multipliers of the transposed direct structure process the same input sample, they can be implemented through a network of constant multipliers, where an important reuse of the adders and shift registers used to replace the multipliers can be achieved, reducing thus significantly the implementation complexity. Tools are known that automatically and efficiently generate such networked multiplier-less FIR structures. The various embodiments of an OS/OSB-FBMC receiver according to the disclosure may therefore advantageously use FIR filters architectures based on the transposed direct structure presented in
[0065] Some interesting properties of the signal processed by the circular convolutions stage of OS/OSB-FBMC receivers are presented hereafter. These properties are used later on to improve the unit's implementation.
[0066] The first property concerns the value of coefficients G.sub.l. Sequence G.sub.l, used within circular convolution number l, can be expressed as follows:
where G and Z.sub.l are the Fourier transform (of a size L) respectively of the prototype filter impulse response g and of the linear phase rotation z.sub.l.
[0067] Z.sub.l may be expressed as:
[0068] In the summation of Eq. 6, by definition,
and z.sub.l(L/2) are real valued numbers. Therefore, (Z.sub.l(m))=
(Z.sub.l(0)),
(.) being the imaginary part of a complex number. The imaginary part of G.sub.l becomes:
[0069] As g(0) corresponds to the first sample of the ramp up part of the impulse response of the prototype filter, it is necessarily close to zero and g(0)≈0. From Eq. 7, it can then be deduced that (G.sub.l(p)))≈0.
[0070] Implementing the circular convolutions stage in an OS/OSB-FBMC receiver may take this property into consideration by only considering the real part of G.sub.l(p) to perform the circular convolutions, reducing thus the implementation cost by a factor two.
[0071] The second property concerns some symmetry within the sequences G.sub.l.
[0072] Indeed, when l=0, Eq. 1 is:
[0073] Therefore, a FIR filter having a transposed direct structure and implementing the circular convolution indexed l=0 can be constructed using only Δ+1 multipliers, as except for one tap, the taps can be regrouped by pairs having a same input and a same multiplier coefficient. The multiplication can therefore be performed only once for each pair of taps.
[0074] When l>0, G.sub.l(p)=−G.sub.P−l(1−p), with p∈0,Δ
. Indeed, the term −G.sub.P−l(1−p) can be expressed as:
[0075] In addition,
and the above equation becomes:
which corresponds to the result of the Inverse FFT (of a size L) of the term g(k)z.sub.l(k)*. A known relation between an FFT and an IFFT can be exploited: the effects of conjugating both the inputs and the outputs of an IFFT cancel each other: FFT(x)=IFFT(x*)*. Applying this property to the above equation gives:
as (G.sub.l(p)))≈0.
[0076] There is therefore a property of symmetry between the coefficient p of circular convolution G.sub.l and the coefficient (1−p) of circular convolution G.sub.P−l which may be exploited during the design of the filters implementing the circular convolutions to reduce the number of multipliers by a factor 2.
[0077] Considering that the sequences G.sub.l can be implemented using real operators only and exploiting their symmetry properties, the number of processing required by OS/OSB-FBMC receivers may be decreased drastically. Theoretically, considering a number of coefficients C.sub.g=7, the complexity could be divided by at least a factor 4. However, these simplifications are difficult to integrate as such in the receiver, in particular as the simplifications related to the symmetrical property G.sub.l(p)=−G.sub.P−l(1−p) require a “cross-talk” between the various circular convolution units. The various embodiments of OS/OSB-FBMC receivers presented hereafter make possible to take advantage of both the transposed direct FIR filter architecture and of the properties of the sequences G.sub.l.
[0078] To this end, the disclosure consists in a receiver configured to process an FBMC signal, as represented in
[0083] According to one embodiment, the adders are followed by a stage 106 of downsampling the samples by a factor K, when K>1. In that case, the summing stage 105 comprises L=KM adders, each adder having P inputs. The first adder adds together the first value of each of the Y.sub.l, the second adder adds together the second value adds together the second value of each of the Y.sub.l, and so on.
[0084] According to an advantageous embodiment, the summing stage 105 and the downsampling stage 106 may be carried out simultaneously in a common stage. In that case, the adders only sum the samples of Y.sub.l that would not be discarded by a downsampling stage, that is to say M samples out of each set of Y.sub.l. In that case, the stage 106 of downsampling the corresponding outputs of summing stage 105 is no longer required.
[0085] The FIR filters computing the circular convolutions stage in an FBMC receiver according to the disclosure have an architecture that depends on the index l of the set of samples X.sub.l they process.
[0086] First Fir Filter: l=0
[0087] The FIR filter unit 311, used to process the set of samples X.sub.0 (that is to say samples X(0), X(P), X(2P), . . . , X(P(L−1))), may be implemented in any manner, for instance using the direct-form implementation of
[0088] Such a filter has C.sub.g taps, which are symmetrical around the center coefficient. Therefore, multiplier resources may be advantageously shared between pairs of taps.
[0089] 1,Δ
, as for instance for taps 331 and 337, which both implement the multiplier coefficient G.sub.0(Δ), taps 332 and 336 implementing the multiplier coefficient G.sub.0(Δ−1), or taps 333 and 335 implementing the multiplier coefficient G.sub.0(1).
[0090] As in the transposed direct structure the same sample is input to each tap, two taps sharing a same multiplier coefficient may be implemented by a single multiplier resource, saving thus C.sub.g−1/2 multipliers. In addition, using a direct transposed FIR structure makes possible to implement the filter through a network of constant multipliers, as previously described.
[0091] Second Fir Filter: l=P/2
[0092] When P is even, FIR filter 311 processing the set of samples X.sub.P/2 may be implemented through a transposed direct filter having C.sub.g multipliers which coefficients are given by G.sub.P/2, as the FIR filter of
[0093] Indeed, Eq. 11 as demonstrated that G.sub.P/2(p)=−G.sub.P/2(1−p). In particular, with
Since all the coefficients having an index superior to Δ are considered as non-significant, G.sub.P/2(−Δ) can be set to zero, and one multiplier may be removed from the filter. Therefore, the output of the convolution stage numbered P/2 now becomes:
with
[0094] 1,Δ
in Eq. 13, have multiplier coefficients equal to G.sub.P/2(p). The Δ taps 401 to 402, corresponding to p∈
−Δ+1,0
in Eq. 13, have multiplier coefficients equal to −G.sub.P/2(1−p).
[0095] By implementing this equation into a transposed direct FIR structure, it appears that the multiplier resources of taps corresponding to p∈−Δ+1,0
can be shared with the multiplier resources of taps corresponding to p∈
1,Δ
through small adjustments of the filter design, as those sets of coefficients are symmetrical in absolute value around the imaginary axis 405 and have the same input. The number of multipliers of the structure can therefore be reduced by half.
[0096] The FIR structure may further comprise an additional shift register 406 configured to delay the input samples by one clock-cycle in order to guarantee an equal processing time in all the filters of the circular convolutions stage. Indeed, the second FIR filter (processing the circular convolution l=P/2) has one tap less than the first FIR filter (processing the circular convolution l=0). Consequently, there will be a difference of one clock-cycle between the moments where the outputs of the filters are available. If this may have no consequence for a software implementation or for a hardware implementation where the processing is chained, this can have one in a hardware implementation where the processing is performed in parallel. However, other methods exist to guarantee the right timing, as for instance inserting the shift register at the output of the second FIR filter, or supervising the timing between the different FIR filters from a dedicated control unit. Therefore, the shift register 406 is only optional and depends on implementation choices.
[0097] In an advantageous embodiment represented in −Δ+1,0
are equal to the multipliers of taps 403-404 (1−p). The multiplier coefficients are then symmetrical around the imaginary axis 405. The resources used to perform the multiplications into these C.sub.g−1 taps can therefore be shared by pairs of taps. For instance, in the illustration of
[0098] In another advantageous embodiment represented in
[0099] Whereas a straightforward implementation of the circular convolution processing samples X.sub.P/2 with complex multipliers would have required 4C.sub.g multipliers, the FIR structure described in
In addition, as all taps of a transposed direct FIR structure input the same sample, the FIR may be implemented using a network of constant value multipliers where the multipliers are implemented through adders and shift registers only and massively shared.
[0100] Other Fir Filters
[0101] The approach concerning the remaining circular convolutions is different since they are inter-dependent (FIR filter unit processing samples X.sub.l has some symmetry properties with the FIR filter unit processing samples X.sub.P−l). To efficiently reduce their complexity, a relation between the outputs of the circular convolutions must be exploited, which can be found in the summation stage 105 that follows the circular convolutions stage.
[0102] The output of the summation stage 105 Y(m) can be expressed as:
[0103] The first two terms correspond to the output of the first FIR filter (l=0) and the second FIR filter (l=P/2), and have been discussed above. The last term can be rewritten as follows:
and the output of the summation stage becomes:
[0104] In what follows, Y.sub.l(m)+Y.sub.P−l(m) is refered as a “partial sum”. Partial sum V.sub.l=Y.sub.l(m)+Y.sub.P−l(m) sums the outputs of circular convolutions which have some inter-dependent properties, as demonstrated in Eq. 11. V.sub.l can be expressed as follows:
[0105] Since G.sub.l(−Δ)=−G.sub.P−l(Δ+1), G.sub.l(−Δ) may be set to zero as all the coefficients having an index superior to Δ are considered non-significants.
[0106] Exploiting the property of symmetry G.sub.P−l(p)=−G.sub.l(1−p), the output of the partial sum can be rewritten as:
with:
[0107] The above equation can be implemented using two FIR filters, each filter having C.sub.g or C.sub.g−1 taps, but such an implementation would not allow the sharing of multipliers, and would therefore be suboptimal.
[0108] It would be possible to exploit the properties of symmetry by using one direct-form FIR structure, as the one of
[0109] Exploiting the symmetrical properties is however more challenging when considering the transposed direct FIR structure. Indeed, the taps of each FIR process the same input but the two FIRs of the partial sum have different inputs (X.sub.l and X.sub.P−l). Therefore, the networks of constant multipliers only apply to one FIR, and it is not possible to share resources between different FIR filter although they have the same set of coefficients. As there is no symmetrical relation in a given FIR filter, the FIR structure proposed for the convolution stage l=P/2 cannot be applied in this configuration.
[0110] The disclosure proposes a solution to this problem. Indeed, it can be shown that resource sharing is possible in the transposed direct FIR structure if the FIR coefficients uses other coefficients than coefficients G.sub.l. To this end, Eq. 18 is rewritten as:
[0111] With S.sub.l=G.sub.l(p)+G′.sub.l(p) and R.sub.l=G.sub.l(p)−G′.sub.l(p), then:
[0112] The two circular convolutions of Eq. 21 respectively use S.sub.l and R.sub.l as coefficients, and can both be implemented by using a direct-form or transposed direct FIR structure of C.sub.g taps taking respectively X.sub.l−X.sub.P−l and X.sub.l+X.sub.P−l as input samples. However, the symmetrical relation between S.sub.l and R.sub.l no longer exist: S.sub.l(p)≠R.sub.l(p) for any p∈−Δ+1,Δ
. Instead, the symmetrical relation is similar to the one in the convolution stage indexed=P/2. Indeed, S.sub.l(−Δ)≈0 since G.sub.l(−Δ)=G′.sub.l(−Δ)=0, and for p∈
−Δ+1,Δ
:
S.sub.l(p)=G.sub.l(p)+G.sub.l(1−p)=S.sub.l(1−p) Eq. 22
R.sub.l(p)=G.sub.l(p)−G.sub.l(1−p)=−R.sub.l(1−p) Eq. 23
[0113] 1,P/2−1
.
[0114] In this architecture, a first FIR sub-filter unit 501 having coefficients S.sub.l and a second FIR sub-filter unit 502 having coefficients Q.sub.l are arranged in parallel. One or more calculation units, as for instance subtractor 510 and adder 511, respectively calculate the set of samples X.sub.l−X.sub.P−l, which is input to the first FIR sub-filter, and X.sub.l+X.sub.P−l, which is input to the second FIR sub-filter. The output of each FIR sub-filter is connected to an adder, and followed by a factor 2 divider. Such a divider can be efficiently implemented by discarding the least significant bit of the partial sum output, which is a known technique to the skilled engineer.
[0115] In the partial summation unit, the properties of symmetry of the second FIR sub-filter 502, having multiplier coefficients R.sub.l, are exactly the same as those of the FIR filter implementing circular convolution P/2. The transposed direct FIR architecture of the circular convolution stage indexed P/2, presented in
[0116] For the first FIR sub-filter 501, having multiplier coefficients S.sub.l, the difference with the FIR structure presented in
[0119]
[0120] FIR sub-filter of a partial summation unit in an embodiment of an OS/OSB-FBMC receiver according to the disclosure, in order to compute the first part of the circular convolution described in Eq. 21.
[0121] As for the FIR filters of
[0122] The Δ last taps 603 to 604, corresponding to p∈1,Δ
, have multiplier coefficients equal to S.sub.l(p), while the Δ taps 601 to 602, corresponding to p∈
−Δ+1,0
, have multiplier coefficients equal to S.sub.l(1−p), with S.sub.l(1−p)=S.sub.l(p).
[0123] By implementing this equation into a transposed direct FIR structure, it appears that the multiplier resources implemented to compute the taps corresponding to p∈−Δ+1,0
can be shared by pairs with those of taps corresponding to (1−p), as they show some symmetry around the imaginary axis 605. The number of multipliers of the structure can therefore be reduced by a factor two.
[0124] Obviously, this FIR structure is prone to be implemented considering that the multipliers are real operators, and using a network of constant values multipliers, where the multipliers are implemented through adders and shift registers only, and massively reused.
[0125] The partial summation unit according to the invention significantly reduces the implementation complexity of the OS/OSB-FBMC receiver. Indeed, a straightforward implementation of the circular convolutions stage processing the set of samples X.sub.l and X.sub.P−l would need two FIR filters, each of them having C.sub.g complex multipliers, for a total cost of 2*4*C.sub.g multipliers.
[0126] In the partial summation unit according to the disclosure, using the architecture of
multipliers. In addition, as both FIR sub-filters use a transposed direct structure, the multipliers can be implemented by way of networks of constant valued multipliers, where they are replaced by adders and shifters, which is far less expensive to implement.
[0127] In brief, in an OS/OSB-FBMC receiver according to the disclosure, the stage of circular convolutions of the receiver is replaced by a bench of FIR filters disposed in parallel.
multiplier resources, as the multiplier coefficients of the taps are symmetrical around the central tap, as shown in
[0128] When P is even, it also comprises a second FIR filter 702, processing set of samples) X.sub.P/2. This FIR filter is implemented according to any of the embodiments presented in
[0129] When P=2, the circular convolutions stage of the receiver only comprises these first and second FIR filter units.
[0130] When P>2, P being even, the circular convolutions stage of the receiver according to an embodiment of the invention comprises: [0131] a first FIR filter as of the one of
partial summation units as of partial summation units 703, 704 and 705 of 1,P/2−1
, and provides as output a set of samples equal to Y.sub.l+Y.sub.P−l.
[0134] The partial summation units comprise means to calculate the values X.sub.l+X.sub.P−l and X.sub.l−X.sub.P−l, and two FIR sub-filter units, one filtering X.sub.l−X.sub.P−l with a set of coefficients S.sub.l with S.sub.l(p)=G.sub.l(p)+G.sub.l(1−p), and one filtering X.sub.l+X.sub.P−l with a set of coefficients R.sub.l with R(p)=G.sub.l(p)−G.sub.l(1−p). The outputs of the two sub-filters are summed and divided by two. The two sub-filters have C.sub.g multiplier coefficients, but the first tap of each sub-filter can be removed. In addition, the sub-filter having the coefficients R.sub.l may be implemented according to the embodiments of
[0135] When P>2, P being odd, the circular convolutions stage of the receiver according to an embodiment of the invention comprises: [0136] a first FIR filter as of the one of
partial summation units, as or partial summation units 703, 704 and 705 of 1,P/2−1
, and provides as output a set of samples which is equal to Y.sub.l+Y.sub.P−l.
[0138] Corresponding outputs of the first FIR filter, second FIR filter when relevant, and partial summation units, are summed by adders 105. This stage is followed by a downsampling stage, to downsample the signal by a factor K. However, the stage of adding the outputs and the downsampling stage may advantageously be performed jointly by only adding samples that would not be rejected by the downsampler. The downsampled signal is then processed by an OQAM demapper 107.
[0139] The disclosure further concerns a method to perform a stage of circular convolutions in an OS/OSB-FBMC receiver. The stage comprises P circular convolutions operated between subsets of input samples and frequency domain responses of a frequency shifted version of a prototype filter associated to an FBMC modulation, the frequency shifted version of the prototype filter having C.sub.g coefficients. The method comprises at least the filtering of a subset of samples that are input to the circular convolutions stage by a filter having at least C.sub.g−1 taps numbered p=−Δ+1 to p=Δ with
wherein the multiplier coefficient of each tap p within the set of taps −Δ+1;0
has an equal absolute value to the multiplier coefficient of taps (1−p).
[0140] According to an embodiment, the method comprises the filtering of a subset of samples X.sub.0=[X(0),X(0+P), X(2P), . . . , X((KM−1)P)] that are input to the circular convolutions stage by a transposed direct FIR filter having C.sub.g taps numbered p=−Δ to p=Δ, the multiplier coefficient of each tap p within the set of taps −Δ,−1
being equal to the multiplier coefficient of tap (−p). This step corresponds to the computation of circular convolution 701 of
[0141] While in a hardware implementation, the choice of a direct form or a transposed direct form to implement the FIR filters implies specific arrangements of the taps (in the transposed direct structure, shift registers are positioned after the multiplication within the taps), in a software implementation, it as consequences on the way data are memorized. In a direct-form FIR structure, samples that are input to the FIR filters are successively stored in memory, while in the transposed-direct FIR structure, that is the output of the multiplications that are successively stored in memory.
[0142] According to various embodiments of the invention, the method may comprise: [0143] a step of filtering of a subset of samples X.sub.P/2=[X(P/2),X(P/2+P),X(P/2+2P), . . . , X(P/2+(KM−1)P)] that are input to the circular convolutions stage by a transposed direct FIR filter having at least C.sub.g−1 taps numbered p=−Δ+1 to p=Δ, the multiplier coefficient of each tap p within the set of taps −Δ+1;0
having an opposite value to the multiplier coefficient of tap (1−p). This step occurs when an integer P corresponding to a number of circular convolution to operate in the convolution stage, is even. This step corresponds to the computation of circular convolution 702 of
−Δ+1;0
has an equal value to the multiplier coefficient of tap (1−p), [0147] filtering the set of samples X.sub.l+X.sub.P−l with a second FIR sub-filter having at least C.sub.g−1 taps numbered p=−Δ+1 to p=Δ taking as input samples X.sub.l+X.sub.P−l, wherein the multiplier coefficient of each tap p within the set of taps
−Δ+1;0
has an opposite value to the multiplier coefficient of tap (1−p), and [0148] calculating the sum of corresponding outputs of the first and second FIR sub-filters, and dividing the result by a factor two.
This step corresponds to the partial summation 703 to 705 of
[0149] The disclosure also concerns a method to demodulate and equalize an FBMC signal in a receiver, the method comprising at least a step of performing a stage of circular convolutions as described here above.
[0150] The OS/OSB-FBMC receiver according to the disclosure may be embedded in a receiver having an RF chain in charge of receiving an FBMC signal over one or more antennas, and converting the signal to an intermediate frequency or to baseband. The signal is then processed by an OS/OSB-FBMC receiver according to the disclosure, and transmitted to a unit in charge of computing the subsequent algorithms required to receive the data transmitted, as for instance the OQAM demapping, error decoding, and/or the functions of the OSI layers located above the PHY layer. The OS/OSB-FBMC receiver according to the disclosure is compatible with the embodiment of
[0151] The OS/OSB-FBMC receiver according to the disclosure may also be embedded in a standalone device configured to take as input an intermediate frequency or baseband signal, and to provide an equalized and demodulated signal to another reception device, in charge of the subsequent algorithms.
[0152] The disclosure concerns both a unit performing a stage of circular convolutions, an equalization and demodulation unit comprising the stage of circular convolutions, and an OS/OSB-FBMC receiver as a whole.
[0153] The implementation improvements disclosed in the OS/OSB-FBMC receiver according to the disclosure is particularly well adapted for an hardware implementation over a hardware platform like a FPGA, or an ASIC, wherein the multipliers units shared in a FIR filter/sub-filter are dedicated hardware units and parallelized. However, the various improvements described may also be used to generate an efficient software implementation of a method for receiving an FBMC signal over a software reprogrammable calculation machine, like a microprocessor, a microcontroller, a DSP, or a graphic processing unit (GPU), or any other appropriate equipment, wherein the software code takes into account the structure of the FIR filters/sub-filters, in particular the shared multiplier resources, to reduce the number of operations required to compute the software FIR filtering. In that case, the shared multiplication resource corresponds to a single calculation, which output is used two compute two corresponding taps of the FIR filter/sub-filter.
[0154] The OS/OSB-FBMC receiver according to the disclosure may therefore be implemented by means of computer-application programs or services, as an application-programming interface (API), a library, and/or other computer-program product, or any combination of such entities.
[0155] The subject matter of the present disclosure includes all novel and non-obvious combinations and sub-combinations of the various processes, systems and configurations, and other features, functions, acts, and/or properties disclosed herein, as well as any and all equivalents thereof. In particular, it includes all OS/OSB-FBMC receiver mixing FIR filters as described previously with regular FIR filters, as for instance a circular convolutions stage 301 for P=2 comprising a FIR unit as described in
[0156] It would also be obvious for the skilled person based on the current disclosure to add extra taps to the FIR filters implementing the circular convolutions stage, as for instance the stage corresponding to tap p=Δ which, as it was demonstrated above, can be advantageously removed.
[0157] While embodiments of the invention have been illustrated by a description of various examples, and while these embodiments have been described in considerable details, it is not the intent of the applicant to restrict or in any way limit the scope of the appended claims to such details. The invention in its broader aspects is therefore not limited to the specific details, representative methods, and illustrative examples shown and described.