DC-DC CONVERTER
20170373601 · 2017-12-28
Assignee
Inventors
Cpc classification
H02M1/0064
ELECTRICITY
H02M3/1552
ELECTRICITY
H02M3/1584
ELECTRICITY
International classification
Abstract
A DC-DC conversion scheme is described that includes a buck converter including a first switch connected in series with a first inductor, the first switch and first inductor providing a switched connected between an input and an output, a second switch being connected across output, and a DC boost arrangement connected between the first switch and the first inductor, the DC boost arrangement including second and third magnetically linked inductors, the second inductor being connected in series between the first switch and the first inductor, and the third inductor being electrically connected to a point intermediate the first and second inductors, the windings of the second and third inductors being such that a change in current flowing through the second inductor induces a boost current in the third inductor supplementing the current flowing through the second inductor.
Claims
1. A DC-DC conversion scheme comprising: a buck converter including a first switch connected in series with a first inductor, the first switch and first inductor providing a switched connected between an input and an output; a second switch being connected across output; and a DC boost arrangement connected between the first switch and the first inductor, the DC boost arrangement comprising second and third magnetically linked inductors, the second inductor being connected in series between the first switch and the first inductor, and the third inductor being electrically connected to a point intermediate the first and second inductors, the windings of the second and third inductors being such that a change in current flowing through the second inductor induces a boost current in the third inductor supplementing the current flowing through the second inductor.
2. The scheme according to claim 1, wherein the second switch comprises a diode.
3. The scheme according to claim 1, wherein the second switch is connected to a point between the first and second inductors.
4. The scheme according to claim 1, wherein the second switch is connected to a point between the second inductor and the first switch.
5. The scheme according to claim 1, further comprising a further switch connected so as to control the direction of current flow through the third inductor.
6. The scheme according to claim 1, wherein the first switch is switched, in use, at a switching frequency greater than 1 kHz.
7. The scheme according to claim 1, wherein the inductance of the second inductor is greater than that of the third inductor.
8. The scheme according to claim 1, where an additional switch is provided to control the direction of current flow through the second inductor.
9. The scheme according to claim 1, further comprising a DC link circuit located between the buck converter and the output.
10. The scheme according to claim 9, wherein the DC link circuit comprises fourth and fifth magnetically linked inductors, and a switched connection between the fourth inductor and ground, control of the operation of the switched connection controlling the output voltage.
11. A DC-DC conversion method using a DC-DC conversion scheme comprising a buck converter including a first switch connected in series with a first inductor, the first switch and first inductor providing a switched connected between an input and an output, a second switch being connected across output, and a DC boost arrangement connected between the first switch and the first inductor, the DC boost arrangement comprising second and third magnetically linked inductors, the second inductor being connected in series between the first switch and the first inductor, and the third inductor being electrically connected to a point intermediate the first and second inductors, the windings of the second and third inductors being such that a change in current flowing through the second inductor induces a boost current in the third inductor supplementing the current flowing through the second inductor, the method comprising the steps of repeatedly opening and closing the first switch such that, when the first switch is closed, a changing current flowing through the second inductor induces a current in the third inductor supplementing that flowing through the second inductor, thereby boosting the current supplied to the Buck converter.
12. The method according to claim 11, wherein the first switch is switched between its open and closed conditions at a switching frequency greater than 1 kHz.
13. A DC-DC conversion scheme comprising a main inductor, a first circuit leg and a second circuit leg, each circuit leg including a primary switch, a secondary switch and a primary inductor, the primary switch and the primary inductor of each leg being connected in series with the main inductor between an input and an output, the secondary switch of each leg providing a switched ground connection, connected to a point intermediate the associated primary switch and the primary inductor of the associated leg, and wherein the primary inductors of the first and second legs are magnetically linked.
14. The scheme according to claim 13, wherein each leg includes a secondary inductor, the secondary inductors being magnetically linked to the primary inductor of each leg.
15. The scheme according to claim 14, wherein the respective switched ground connections are connected to points intermediate the primary inductor of each leg and the secondary inductor of the associated leg.
16. The scheme according to claim 13 and configured to operate as a boost circuit, the voltage at the output being greater than that at the input.
17. The scheme according to claim 16, wherein each primary switch takes the form of a diode, and each secondary switch takes the form of a controllable switch.
18. The scheme according to claim 17, wherein the operation of each controllable switch is controlled by an associated electronic control unit.
19. The scheme according to claim 17, wherein each controllable switch comprises a transistor or transistor-like device.
20. The scheme according to claim 13 and configured to operate as a buck circuit, the voltage at the output being lower than that at the input.
21. The scheme according to claim 20, where each primary switch takes the form of a controllable switch and each secondary switch takes the form of a diode.
22. The scheme according to claim 21, wherein the operation of each controllable switch is controlled by an associated electronic control unit.
23. The scheme according to claim 21, wherein each controllable switch comprises a transistor or transistor-like device.
24. The scheme according to claim 13, wherein switching is configured to occur when the potential difference across the switch being switched is zero.
25. The scheme according to claim 14, wherein a sensing winding is provided for use in determining when the potential difference across the switch being switched is zero.
26. The method of operation of a circuit of the type comprising a main inductor, a first circuit leg and a second circuit leg, each circuit leg including a primary switch, a secondary switch and a primary inductor, the primary switch and the primary inductor of each leg being connected in series with the main inductor between an input and an output, the secondary switch of each leg providing a switched ground connection, connected to a point intermediate the associated primary switch and the primary inductor of the associated leg, and wherein the primary inductors of the first and second legs are magnetically linked, wherein during at least certain phases of operation both of the primary switches or both of the secondary switches simultaneously occupy closed conditions.
Description
[0024] The invention will further be described, by way of example, with reference to the accompanying drawings, in which:
[0025]
[0026]
[0027]
[0028]
[0029]
[0030]
[0031]
[0032]
[0033] Referring firstly to
[0034] The scheme 10 comprises a first inductor 20 connected in series to a second inductor 22, the first and second inductors 20, 22 connecting an input 24 connected to the output of the energy extraction scheme 12 to an output 26 connected to an input of the H-Bridge circuit 16. A first switch 28 is located between the input 24 and the second inductor 22. The first and second inductors 20, 22 are interconnected at a connection point to which a third inductor 30 is also connected. The second and third inductors 22, 30 are wound around a common core 32 and so are magnetically linked to one another. As a result, a varying current flowing through the second inductor 22 will, in use, generate a magnetic flux which, in turn, will generate an emf in the third inductor 30 that induces a current therein. The directions in which the second and third inductors 22, 30 are wound is such that the current induced in the third inductor 30 supplements that flowing through the second inductor 22 when the first switch 28 is closed.
[0035] As illustrated, a second switch 34 in the form of a diode is connected across the first inductor 20 and output 26. A further switch 36 also in the form of a diode is connected to the third inductor 30 and is operable to control the direction of current flow through the third inductor 30. Whilst switches 34, 36 are illustrated as taking the form of diodes, it will be appreciated that if desired they could be replaced by other devices including appropriately controlled electronic switch devices or the like.
[0036] It will be appreciated that the first inductor 20 and first and second switches 28, 34 together form a Buck converter circuit, the second and third magnetically linked inductors 22, 30 together forming a current boost scheme operable to boost the current supplied to the first inductor 20 of the Buck converter circuit, in use.
[0037] In use, therefore, starting from a condition in which the first switch 28 is open, it will be appreciated that no current is flowing from the input 24 to the output 26. Subsequent closing of the first switch 28 results in a current starting to flow through the second inductor 22 and first inductor 20 to the output 26. The change in current flowing through the second inductor 22 generates a varying magnetic flux. By virtue of the magnetic linking of the second and third inductors 22, 30 to one another, the generated magnetic flux creates an emf across the third inductor 30. The directions of the windings of the second and third inductors 22, 30 are such that the generated emf results in the further switch 36, in this case in the form of a diode, turning on and in a current being induced, supplementing the current supplied through the second inductor 22 such that the current supplied to the first inductor 20 is increased. Depending upon the level of the generated emf, the diode forming the switch 36 may only partially turn on.
[0038] The first inductor 20 forms, as mentioned hereinbefore, part of a Buck converter, the increased current supplied thereto resulting in energy storage therein in the usual manner.
[0039] Subsequent reopening of the first switch 28 interrupts the connection of the second inductor 22 to the input 24, and a current is no longer supplied to the first inductor 20 via the second inductor 22. Initially, upon opening of the first switch 28, the diode forming the further switch 36 will continue to conduct. During this phase in the operation of the scheme, as usual with a Buck converter, the first inductor 20 will discharge.
[0040] As the current supplied to the first inductor 20, in use, is boosted, it will be appreciated that to achieve a particular effect at the output 26 the inductance of the first inductor 20 may be reduced. As a result, the efficiency of the scheme can be enhanced.
[0041] As shown in
[0042] Whilst
[0043]
[0044] In use, when the switch 48 is open, no current flows to ground via the fourth inductor 42. Upon subsequent opening of the switch 48, current starts to flow through the fourth inductor 42. The change in current flowing through the fourth inductor 42 induces a potential difference across the fifth inductor 44. It will be appreciated that by appropriately controlling the opening and closing of the switch 48, the magnitude of the output voltage at the output 26 can be controlled. The relationship between the voltage at the output 26 and at the input 24 can be expressed as:
V_out/V_in=D_1/(1−D_2/2)
Where Vout and Vin are the voltages at the output 26 and input 24 respectively, and D1 and D2 represent the proportion of time over which the switches 28 and 48, respectively, are closed.
[0045] It will be appreciated that the modification shown in
[0046]
[0047] The arrangements described hereinbefore are advantageous in that the circuits are simple and incorporate few components. Manufacture thereof may thus be achieved economically. If desired, the inductors may be of multi-core form.
[0048] It is envisaged that the inductors will be of very small size, for example each comprising only a few windings. By way of example, each inductor may have, say 4-6 windings. It will be appreciated, however, that the invention is not restricted in this regard.
[0049] Referring next to
[0050] The primary and secondary inductors 116a, 116b, 118a, 118b of the first and second legs 112, 114 are all wound upon a common magnetic core (not shown) and so are magnetically linked with one another, the winding directions being as illustrated in
[0051] With the circuit connected between an input 126 and an output 128, when both of the secondary switches 122a, 122b are closed (on), the current flowing through the main inductor 110 rises by an amount Δi, inducing an emf in the main inductor 110 opposing the increase in current. From this condition, when one of the secondary switches 122a, 122b is opened (off) and the other is closed (on), the current flowing through the main inductor 110 falls by the amount Δi, the falling current inducing an emf in the main inductor 110 in the opposite direction.
[0052] By repeatedly opening and closing the secondary switches 122a, 122b, at all times ensuring that one or other of the secondary switches 122a, 122b is closed (on), there being no times at which both secondary switches 122a, 122b are both open (off), and by appropriate selection of the switching frequency, it will be appreciated that the current flowing through the main inductor 110 may be continuously changing.
[0053] The inductances of the primary and secondary inductors 116a, 116b, 118a, 118b are preferably symmetrical in the sense that the inductance of the primary inductors 116a, 116b are equal to one another, and the inductances of the secondary inductors 118a, 118b are equal to one another. As a consequence, the magnitude of the change in current, and the resulting induced emf, will be the same regardless as to which of the secondary switches 122a, 122b is operated at any given time.
[0054] When both secondary switches 122a, 122b are closed, the potential at point Vn as illustrated in
V_in=L_mΔi/t_on
where ton is the duration over which both secondary switches 122a, 122b are closed, and using the terminology shown in
[0055] When one or other of the secondary switches 122a, 122b is opened (and the other is closed), then Vn is equal to Vα, the potential across the primary inductor 116a, 116b of the leg 112, 114 with which the open secondary switch 122a, 122b is associated, and
V_in−V_α=−L
_mΔi/(T−t_on)
where T is the period of the switching cycle, as shown in
[0056] Defining a duty cycle D as
D=t_on/T
the equations set out above can be solved together to produce the transfer function
V_out/V_in=(2+η)1/((1−D))
where
η=√(L_b/L_a)=√(L_d/L_c)
[0057] It will be appreciated from the expressions set out above that the ratio of the output voltage to the input voltage can be controlled by control over the duty cycle, ie varying the proportion of time over which both of the secondary switches 122a, 122b occupies its closed (on) position, and/or by the selection of the inductances of the secondary inductors 118a, 118b relative to the primary inductors 116a, 116b.
[0058] The circuit illustrated in
[0059] Whilst
[0060] Another switching regime that, in some arrangements may be preferred, involves controlling switching such that the secondary switches 122a, 122b are switched at points in the operating cycle at which the potential differences across the switches 122a, 122b being switched is zero. A number of techniques are possible by which such control may be achieved. One possibility is to incorporate an additional sensing winding independent of the primary inductors 116a, 116b, but magnetically associated therewith, such that that the EMF induced in the sensing winding is related to the current flowing within the associated inductors 116a, 116b. By monitoring the EMF induced in the sensing winding, it can be determined when the potential difference across the switches 122a, 122b are zero, and hence when such zero voltage switching should occur.
[0061] The circuit of
[0062] The circuit of
V_out/V_in=D+((1−D))/((2+η))
[0063] It is clear from the transfer function set out above that the circuit of
[0064] Whilst, as with the circuit of
[0065] If both the primary switches 120a, 120b and the secondary switches 122a, 122b are of a controllable form, then it will be appreciated that a single circuit may be produced that is capable of being used either as a boost converter or as a buck converter, depending upon the manner in which it is connected between the input and output and depending upon the manner in which it is controlled.
[0066] As with the arrangement of
[0067]
[0068] In the circuits described hereinbefore the inductances of the inductors of the two legs 112, 114 are symmetrically arranged. It will be appreciated that, whilst this is preferred, arrangements may be possible in which this is not the case.
[0069] The boost and buck converter circuits of
[0070] It will be appreciated that, if desired, the circuits of
[0071] Whilst the accompanying drawings illustrated specific circuits falling within the scope of the invention, it will be understood that a number of modifications or alternations may be made thereto without departing from the scope of the invention as defined by the appended claims.