Control method for a display apparatus and display apparatus

Abstract

A control method includes A) determining intrinsic activation times of individual semiconductor emitters of a display device. The display device includes a plurality of light-emitting semiconductor emitters with different intrinsic activation times. The method also includes B) determining and storing in each case an activation delay and/or a turn-on current change for each individual one of the semiconductor emitters. The method further includes C) energizing the individual semiconductor emitters according to the previously determined activation delay and/or turn-on current change, so that in a display mode of the display device the semiconductor emitters have equally long starting times for a light emission.

Claims

1. A control method for a display device, which comprises a plurality of light-emitting semiconductor emitters with different intrinsic activation times, wherein the method comprises: A) determining the intrinsic activation times of the individual semiconductor emitters, B) determining and storing in each case an activation delay and/or a turn-on current change for each individual one of the semiconductor emitters, and C) energizing the individual semiconductor emitters according to the previously determined activation delay and/or turn-on current change, so that in a display mode of the display device the semiconductor emitters have equally long starting times for a light emission, wherein the display device has at least one group with N semiconductor emitters, the display device is controlled at a clock frequency, the individual activation delays for the N semiconductor emitters are K.sub.i times of a clock time of the clock frequency, and these semiconductor emitters are numbered with i, where i∈[1; N].sub.N and all K.sub.i∈N.sub.0, and for at least one of the semiconductor emitters it applies that K.sub.i≠0.

2. The control method according to claim 1, where for all K.sub.i it applies: 0≤K.sub.i≤12, and wherein for at least some of the K.sub.i it applies: 2≤K.sub.i≤8.

3. The control method according to claim 1, wherein the semiconductor emitters are energized with a target current intensity after a switch-on phase, and during the switch-on phase, the target current intensity for the individual semiconductor emitters is increased or decreased at least temporarily by the associated turn-on current change.

4. The control method according to claim 3, wherein the turn-on current change associated with the individual semiconductor emitters is present per turn-on cycle during the switch-on phase only in at most two cycle times.

5. The control method according to claim 4, wherein the turn-on current change belonging to the individual semiconductor emitters is present per turn-on cycle during the switch-on phase only in exactly one cycle time, and wherein at least some of the semiconductor emitters are operated per turn-on cycle during the switch-on phase with clock times with the turn-on current change and with clock times without the turn-on current change.

6. The control method according to claim 3, wherein the turn-on current changes are each at most 50% of the target current intensity.

7. The control method according to claim 1, wherein the activation delays of at least some of the semiconductor emitters are at least 0.2 μs and at most 2 μs.

8. The control method according to claim 1, wherein in step B) the activation delays and/or the turn-on current changes for the individual semiconductor emitters are determined by a measurement of a time-voltage curve at a power supply of the respective semiconductor emitter.

9. The control method according to claim 8, wherein the activation delays and/or the turn-on current changes in step B) are determined by a rise time or by a decay time of the time-voltage curve.

10. The control method according to claim 8, wherein the semiconductor emitters are operated with a precharge function such that a precharge voltage is present at the power supply before switching on the respective semiconductor emitter, which precharge voltage is greater than a forward voltage of said semiconductor emitter.

11. The control method according to claim 1, wherein at least some of the semiconductor emitters, to which the different activation delays and/or turn-on current changes are assigned, are configured to emit light of the same color.

12. The control method according to claim 1, wherein at least some of the semiconductor emitters, to which the different activation delays and/or turn-on current changes are assigned, are structurally identical within the scope of manufacturing tolerances.

13. A display device which is operated with a control method according to claim 1, comprising: a plurality of semiconductor emitters, which are configured for light emission and which have intrinsic activation times, a control chip, which is configured to determine the intrinsic activation times of the individual semiconductor emitters and to determine and store in each case an activation delay and/or a turn-on current change for each individual one of the semiconductor emitters, and a current source, which is configured to energize the individual semiconductor emitters according to the previously determined activation delay and/or turn-on current change, such that the semiconductor emitters have equally long starting times in the display operation of the display device.

14. The display device according to claim 13, comprising a plurality of the control chips and a plurality of the current sources and further comprising a clock generator, wherein groups of at least four and of at most 64 of the semiconductor emitters of identical construction within the scope of the manufacturing tolerances are each controlled by exactly one of the control chips, the activation delays and/or the turn-on current changes for the semiconductor emitters connected to the respective control chip are stored in the control chips, the current sources are configured to be respectively controlled by the associated control chip for energizing the assigned semiconductor emitter, and the display device is an RGB display such that red, green and blue-emitting semiconductor emitters are present.

15. A control method for a display device, which comprises a plurality of light-emitting semiconductor emitters with different intrinsic activation times, wherein the method comprises: A) determining the intrinsic activation times of the individual semiconductor emitters, B) determining and storing in each case an activation delay and/or a turn-on current change for each individual one of the semiconductor emitters, and C) energizing the individual semiconductor emitters according to the previously determined activation delay and/or turn-on current change, so that in a display mode of the display device the semiconductor emitters have equally long starting times for a light emission, wherein the semiconductor emitters are energized with a target current intensity after a switch-on phase, wherein during the switch-on phase, the target current intensity for the individual semiconductor emitters is increased or decreased at least temporarily by the associated turn-on current change, and wherein the turn-on current changes are each at most 50% of the target current intensity.

16. A control method for a display device, which comprises a plurality of light-emitting semiconductor emitters with different intrinsic activation times, wherein the method comprises: A) determining the intrinsic activation times of the individual semiconductor emitters, B) determining and storing in each case an activation delay and/or a turn-on current change for each individual one of the semiconductor emitters, and C) energizing the individual semiconductor emitters according to the previously determined activation delay and/or turn-on current change, so that in a display mode of the display device the semiconductor emitters have equally long starting times for a light emission, wherein in step B) the activation delays and/or the turn-on current changes for the individual semiconductor emitters are determined by a measurement of a time-voltage curve at a power supply of the respective semiconductor emitter, and wherein the semiconductor emitters are operated with a precharge function such that a precharge voltage is present at the power supply before switching on the respective semiconductor emitter, which precharge voltage is greater than a forward voltage of said semiconductor emitter.

Description

(1) In the figures:

(2) FIG. 1 shows a schematic plan view of an exemplary embodiment of a display device described here,

(3) FIG. 2 shows a schematic circuit diagram for operating semiconductor emitters for methods and display devices described here,

(4) FIGS. 3 to 8 show schematic representations of time profiles of voltages or light emissions or currents for semiconductor emitters for control methods described here and for display devices described here, and

(5) FIG. 9 shows a schematic time-voltage curve for determining a decay time for determining activation delays and/or turn-on current changes for control methods described here and for display devices described here.

(6) FIG. 1 illustrates an exemplary embodiment of a display device 1. The display device 1 comprises a plurality of semiconductor emitters E which are configured for light emission. The semiconductor emitters E are each connected to a control chip 5 in groups of, for example, eight semiconductor emitters E. The control chip 5 is in particular an integrated circuit, IC for short. The semiconductor emitters E can be electrically controlled individually via the respective control chip 5.

(7) The control chips 5 are preferably jointly connected to a control unit 2. The control unit 2 is in particular configured to receive control signals or signals for images to be displayed. This means that the entire image to be displayed by the display device 1 can be detected from an input signal via the control unit 2 and converted into control signals for the individual control chips 5. The control unit 2 preferably comprises a clock generator 6 which outputs a clock frequency. The clock frequency is preferably in the megahertz range.

(8) All semiconductor emitters E, which are connected to a specific control chip 5, are preferably structurally identical within the scope of manufacturing tolerances and are designed to emit light of a specific color. That is to say, pixels 7 for colored emission extend over a plurality of the strings and thus over a plurality of control chips 5.

(9) FIG. 2 shows an example of a circuit around a single control chip 5. A current source 4 is preferably controlled by the control chip 5 via a control signal C. The current source 4 can interact with a switching unit 8, for example, composed of a plurality of transistors. A plurality of the light-emitting semiconductor emitters E can be controlled sequentially via the switching unit 8 and via the current source 4.

(10) The control chip 5 receives, in addition to control signals, not shown, from the control unit 2 preferably a signal from the clock generator 6. Furthermore, preferably a line exists from the control chip 5 for measuring a voltage U at an output of the current source 4.

(11) In contrast to the illustration of FIG. 2, it is also possible for the current source 4 and the control chip 5 to be integrated in a single component, such as a microcontroller. The lines for the voltage U and for the control signal C can thus be lines within a semiconductor chip.

(12) FIG. 3 shows a curve of a luminous flux Φv as a function of time t. The curves for a semiconductor emitter EB for blue light, for a semiconductor emitter EG for green light and for a plurality of semiconductor emitters ER for red light are shown. It can be seen that the various semiconductor emitters EB, EG, ER have different intrinsic activation times AR, AG, AB. That is, a light emission of the various semiconductor emitters begins at different times. Thus, different starting times S are present for the respective light emission.

(13) The differences in the activation times AR, AG, AB between different emission colors are relatively large. However, fluctuations of the intrinsic activation time AR also occur within, for example, the red-emitting semiconductor emitters. In particular, the distribution of the switching times AR between the different semiconductor emitters ER for red light is subject to statistical fluctuations.

(14) FIG. 4 illustrates a correction via different activation delays VB, VG, VR. In this case, control takes place at a clock frequency with cycle times T, wherein the cycle time T is an inverse of the clock frequency. In order to allow light emission of all semiconductor emitters EB, EG, ER at the same time, different numbers of cycle times T are specified as activation delay VB, VG, VR for the different types of semiconductor emitters.

(15) The result of this is shown in FIG. 5. Due to this compensation, a light emission of the semiconductor emitters begins approximately at the same starting time S.

(16) As illustrated in FIG. 3, in particular for the red-emitting semiconductor emitters ER, however, different intrinsic activation times AR are present for the different emitters ER. This is explained in more detail in FIG. 6. It can be seen here that compensation only with regard to the actual starting times S via the activation delays V1, V2, V3 has still a comparatively great inaccuracy. This can be compensated by the fact that a turn-on current change J takes place, indicated schematically in FIG. 6 by a hatching. The turn-on current change J is, for example, a reduction of a current with respect to a target current strength L for a subsequent continuous operation of the relevant semiconductor emitter ER, in particular in the last cycle time T of the associated activation delay V1, V2, V3.

(17) In contrast, FIG. 7 schematically illustrates that the turn-on current change J is an increase in the target current strength intensity L. In this case, a current I is plotted against time t in FIG. 7.

(18) In FIGS. 6 and 7, variants are shown, according to which the turn-on current change J is a reduction or an increase in the target current strength L. Furthermore, it is illustrated that the turn-on current change J can be present over an entire switch-on phase or is limited to certain cycle times within a switch-on phase. These two possibilities, that is to say, turn-on current increase and turn-on current reduction on the one hand, and applying the turn-on current change J during an entire switch-on phase or only during a part of the switch-on phase on the other hand, can be combined with one another as desired, so that the combinations not shown in FIGS. 6 and 7 can also be present.

(19) FIG. 8 shows a curve of a voltage U along time t. The voltage U is measured, in particular, at an output of the current source 4, which is in particular a constant current driver, to the semiconductor emitters E, as illustrated in FIG. 2. A switching-on of the various semiconductor emitters E1, E2, E3 takes place at the time t=0. It can be seen that different time profiles of the voltages for the respective semiconductor emitters E1, E2, E3 are present. The semiconductor emitters E1, E2, E3 correspond, in particular, to the semiconductor emitters ER from FIG. 6 and are therefore nominally identical within the scope of manufacturing tolerances and are designed to generate red light, but nevertheless have different activation times A1, A2, A3.

(20) The different intrinsic activation times A1, A2, A3 can be determined via the different profiles of the voltages of the semiconductor emitters E1, E2, E3. These activation times A1, A2, A3 are in particular accompanied by different capacitances of the associated semiconductor emitters E1, E2, E3.

(21) By this determination and storage of the different activation times A1, A2, A3, the turn-on current changes J and the activation delays V can be determined, which are necessary in order to start the light emission of the relevant semiconductor emitters E1, E2, E3 at the same time. A corresponding control of the semiconductor emitters E1, E2, E3 can then take place via the respectively associated control chip 5.

(22) An exemplary profile of the voltage U at the output of the constant current driver 4 is shown in FIG. 9. For example, the display device 1 is supplied with a supply voltage of 5 V and the driver output is at a voltage of 2 V if the associated semiconductor emitter is connected. Thus, 3 V drops across the semiconductor emitter, and the forward voltage is achieved and current begins to flow. This is shown in the time domain I.

(23) If the driver is to turn off the associated semiconductor emitter, the driver output is pulled to a higher potential and the forward voltage of the semiconductor emitter is thus reduced until no more current can flow. This is shown at the beginning of the time domain II.

(24) A pre-charging function which can suppress interfering effects such as so-called lower ghosting is then optionally activated in the time domain III. After these steps I to III, a cycle is completed with respect to turning off and the next cycle, for example, operating the next line in the display device, can begin. For this purpose, the potential of the output of the driver must fall back to 2 V. This dropping of the voltage U is dependent on a capacitance of the operated semiconductor emitter.

(25) If a semiconductor emitter with a comparatively high capacity is to be operated here, the corresponding charging lasts correspondingly longer with the same current. Thus, different charging times result, which can be determined with a τ10-τ90 measurement, as a result of which conclusions can be drawn about the capacitance of the associated semiconductor emitter. A corresponding measurement of the decay time of the voltage U is illustrated in the time domain IV in FIG. 9. In the time domain V, the associated semiconductor emitter is switched on again and the time domain V then ends, not shown, subsequently with a time domain I. In FIG. 9, an entire cycle is thus illustrated.

(26) In the course of the procedure as illustrated in FIG. 9, a value of the initial voltage is preferably stored in the control chip 5 and the switch-on phase is measured in the time domain IV in the case of sufficiently rapid scanning. The value of τ10-τ90 can be determined by comparing the voltage values determined therefrom. The value τ10-τ90 is, for example, between 0.5 μs and 1.5 μs, in particular averaged over all semiconductor emitters. The higher this value, the longer the activation delay V to be maintained must be and/or the greater the charging current required for this, and thus the turn-on current change J. This charging current does not necessarily correspond to the target current strength L, that is to say, the display operating current, but is preferably individually adapted.

(27) In addition, discretization errors which occur at discrete activation delays V at intervals corresponding to the cycle time T and with the target current strength L can be minimized by the analog signal of the turn-on current change, as illustrated in connection with FIG. 6. In addition, it is possible to react to changing operating modes by a regular measurement, so that an always optimal compensation can be achieved over the entire service life of the display device.

(28) This measurement, as illustrated in connection with FIG. 9, is preferably carried out for each of the semiconductor emitters, and the measurement result is stored for each of the semiconductor emitters, so that an individual energization matched to each individual semiconductor emitter can be carried out.

(29) For example, the capacitances of the semiconductor emitters are, at an edge length of 230 μm, in the case of square thin-film LED chips at 10 pF for emission in the red spectral range, at 30 pF for emission in the green spectral range and at 40 pF for emission in the blue spectral range. This applies in particular to differential capacitances at 0 V. These values can apply, for example, with a tolerance of at most a factor 5 or of at most a factor 2 in all exemplary embodiments.

(30) A fluctuation of the capacitance between different nominally structurally identical semiconductor emitters is, for example, at most +/10% or +/20% and/or at least +/2% or +/5%.

(31) In the case of semiconductor emitters with a sapphire substrate, the fluctuation of the capacitance can also be up to +/−50%.

(32) Typical cycle times T are 30 ns, at a clock frequency of 33 MHz. The cycle time may also be significantly smaller and may be at most 10 ns or 5 ns, for example, at a clock frequency of up to 240 MHz.

(33) Typical values for the activation delay are 1 μs to 1.5 μs, in particular between 0.2 μs and 2 μs.

(34) The semiconductor emitters are addressed, for example, up to 25,000 times during the representation of a frame.

(35) The capacitances C of the semiconductor emitters are preferably completely charged after at most 15 or after at most 10 cycle times.

(36) Based on, for example, an activation delay of a few μs and a clock frequency of up to 240 MHz, corresponding to a cycle time of 3.75 ns, with the method described here, a sufficiently accurate temporal resolution and correction of the activation delay is possible, in particular on the basis of the course of the voltage, as illustrated by way of example in FIG. 9.

(37) The invention described here is not limited by the description on the basis of the exemplary embodiments. Rather, the invention encompasses any novel feature and any combination of features, which in particular includes any combination of features in the claims, even if this feature or this combination itself is not explicitly specified in the patent claims or exemplary embodiments.

LIST OF REFERENCE SIGNS

(38) 1 display device 2 control unit 3 power supply 4 current source 5 control chip 6 clock generator 7 image point 8 switching unit A intrinsic activation time B blue C control signal E light-emitting semiconductor emitter G green I current J turn-on current change L target current strength R red S starting time for light emission t time T cycle time U voltage V activation delay Φv luminous flux I . . . V time domains