THERMOPILE TEST STRUCTURE AND METHODS EMPLOYING SAME

Abstract

A semiconductor product comprising: a semiconductor substrate and a test structure, the test structure comprising: a thermopile and at least one temperature sensitive element, the at least one temperature sensitive element being located in the substrate, or between the substrate and the thermopile.

Claims

1. A semiconductor product comprising: a semiconductor substrate; and a test structure comprising: a thermopile and at least two temperature sensitive elements, the at least two temperature sensitive elements being located in the substrate, or between the substrate and the thermopile, wherein one temperature sensitive element is located proximate a central portion of the thermopile and another temperature sensitive element is located proximate an outer portion of the thermopile.

2. The semiconductor product according to claim 1, wherein the test structure further comprises at least one conductive element, configured to function as a heater when in use.

3. The semiconductor product according to claim 2, wherein the at least one conductive element is disposed above the thermopile.

4. The semiconductor product according to claim 1, wherein the at least one temperature sensitive element comprises a diode.

5. The semiconductor product according to claim 1, wherein the at least one temperature sensitive element comprises a well resistor.

6. The semiconductor product according to claim 1, wherein the thermopile comprises a polycrystalline semiconductor material.

7. The semiconductor product according to claim 1, wherein the semiconductor substrate comprises silicon.

8. (canceled)

9. (canceled)

10. The semiconductor product according to claim 2, wherein one temperature sensitive element is located proximate a portion of the thermopile more susceptible to heating and another temperature sensitive element is located proximate a portion of the thermopile less susceptible to heating.

11. The semiconductor product according to claim 10, wherein the portion of the thermopile more susceptible to heating is a portion of the thermopile more proximate said conductive element relative to the portion of the thermopile less susceptible to heating.

12. A wafer comprising one or more semiconductor products according to claim 1.

13. The wafer according to claim 12, further comprising one or more different semiconductor products, said different semiconductor products being distinct from the one or more semiconductor products according to claim 1.

14. The wafer according to claim 13, wherein the one or more semiconductor products according to claim 1 can be separated from the one or more different semiconductor products substantially without damaging the one or more semiconductor products according to claim 1 and/or the one or more different semiconductor products.

15. The wafer according to claim 13, wherein each of the one or more different semiconductor products comprises a thermopile of substantially the same geometry as that of the one or more semiconductor products according to claim 1.

16. The wafer according to claim 15, wherein each of the one or more different semiconductor products is formed without a said temperature sensitive element.

17. A method of manufacturing a semiconductor product comprising: providing a semiconductor substrate; forming at least one temperature sensitive element at least partially within the substrate; forming a thermopile structure in one or more conductive layers above the substrate; and testing the thermopile prior to or without reducing the thickness of the substrate.

18. (canceled)

19. (canceled)

20. The method according to claim 17, further comprising reducing the thickness of the substrate, wherein at least one of the at least one temperature sensitive elements is at least partially removed.

21. The method according to claim 17, further comprising reducing the thickness of the substrate in a central portion underneath the thermopile to form a membrane portion.

22. The method according to claim 17, wherein the thermopile structure is formed in one or more conductive layers above the at least one temperature sensitive element.

23. The method according to claim 17, wherein said testing comprises: heating a portion of the thermopile; and determining characteristics of the thermopile based on a readout from the at least one temperature sensitive element and a readout from the thermopile.

24. The method according to claim 23, wherein: the thermopile comprises a cold side and a hot side and one of the at least one temperature sensitive elements is situated beneath the cold side or the hot side; and the heating a portion of the thermopile comprises heating the hot side of the thermopile more than the cold side of the thermopile.

25. The method according to claim 24, wherein the at least one temperature sensitive element comprises a diode, and wherein determining characteristics of the thermopile comprises: measuring an output voltage of the thermopile; measuring an output current of the at least one diode, and based on known characteristics of the diodes determining a measure of the temperature difference between the hot side and the cold side of the thermopile; and linking the measure of the temperature difference between the hot side and the cold side of the thermopile with the output voltage of the thermopile to obtain a characterization of the thermopile.

26. (canceled)

27. (canceled)

28. (canceled)

29. (canceled)

30. (canceled)

31. (canceled)

32. (canceled)

33. (canceled)

34. (canceled)

35. A method for use in conjunction with a wafer formed of a semiconductor substrate, the wafer comprising: at least one first structure having a thermopile; and at least one second structure, distinct from the first structure, having a thermopile and a temperature sensitive element disposed at least partially within the substrate, the method comprising: assessing the quality of the first structure by performing a test on the second structure.

36. The method according to claim 35, wherein the test comprises determining the sensitivity of the thermopile of the second structure based on a readout from the at least one temperature sensitive element.

37. The method according to claim 35, further comprising utilizing at least one said first structure in forming at least part of a semiconductor product, conditioned on an outcome of said test.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Some embodiments of the invention will now be described by way of example only and with reference to the accompanying drawings, in which:

[0016] FIG. 1 shows a prior art infrared sensor employing a thermopile;

[0017] FIG. 2 shows the first stage in manufacturing a thermopile test structure according to an embodiment of the present invention;

[0018] FIG. 3 shows the second stage in manufacturing a thermopile test structure according to an embodiment of the present invention;

[0019] FIG. 4 shows the third stage in manufacturing a thermopile test structure according to an embodiment of the present invention;

[0020] FIG. 5 shows the fourth stage in manufacturing a thermopile test structure according to an embodiment of the present invention;

[0021] FIG. 6 shows the fifth, stage in manufacturing a thermopile test structure according to an embodiment of the present invention;

[0022] FIGS. 7a-7b show the sixth stage in manufacturing a thermopile test structure according to an embodiment of the present invention;

[0023] FIG. 8 shows a plan view of a thermopile test structure according to an embodiment of the present invention;

[0024] FIG. 9 shows a wafer comprising thermopile test structures according to an embodiment of the present invention; and

[0025] FIG. 10 shows a lithographic shot layout according to an embodiment of the present invention.

DETAILED DESCRIPTION

[0026] Thermopile structures can be employed in discrete devices or integrated circuits. Integrated thermopile devices may be manufactured using CMOS technology, for example, and many separate devices may be fabricated on a single semiconductor wafer.

[0027] The process steps for manufacturing an integrated thermopile test structure 200 according to an embodiment of the present invention are now described with reference to FIGS. 2-7b. One skilled in the art would have the necessary knowledge as to how to fabricate the structures illustrated in FIGS. 2-7b once presented with the present disclosure, and as such certain routine details are not provided here.

[0028] FIG. 2 illustrates, in cross-section, a semiconductor substrate 201, such as silicon, for example, on and in which the thermopile test structure 200 will be fabricated. The thickness of the substrate is typically 500 μm to 1000 μm, and may be further reduced by approximately a factor of 10 later in the manufacturing process (e.g. prior to back etching). The substrate may form a wafer, which will usually contain a number of thermopile test structures in addition to a number of production thermopile structures, the latter being destined for final, ‘customer’ devices whereas the former may be used only for electrical production testing and not form part of a ‘customer’ device (although it is contemplated that the former could also be used in final devices, and need not necessarily be disposed of after testing).

[0029] FIG. 3 illustrates the thermopile test structure after fabrication of two temperature sensitive elements 202 and 204 within the substrate. As temperature sensitive elements, either diodes or well resistors may be used. The temperature sensitive elements are used as a temperature reference during electrical production testing. In certain embodiments they are positioned below the inner (hot) side of the thermopile (not yet fabricated in FIG. 3), element 202; and below the outer (cold) side of the thermopile, element 204. The invention may also be operated with more than two temperature sensitive elements. The invention may further be operated with only one temperature sensitive element, e.g. below the inner (hot) side of the thermopile. In the latter scenario, e.g. if the outer region of the thermopile is held at a known temperature, it may only be necessary to measure the temperature below the inner (hot) side in order to test the thermopile.

[0030] The temperature sensitive elements 202 and 204 enable independent temperature measurement in the hot and cold parts of the thermopile test structure. Diodes may be a preferred choice for the temperature sensitive elements because in general the thermal behaviour of diodes is very well known and precisely controlled. For example, when in use (e.g. during electrical production testing), a fixed forward bias voltage may be applied to the diodes, and the diode output current monitored as a function of temperature. Over a certain range, the output current is expected to depend exponentially on temperature and furthermore is very sensitive to small temperature changes. Alternatively, well resistors may be used as the temperature sensitive elements, or any combination of diodes and well resistors.

[0031] FIG. 4 illustrates the thermopile test structure after fabrication of an insulator layer 206 (e.g. silicon dioxide) and first thermopile conductors 207 formed in a first conductive layer on top of the insulator layer (e.g. a polycrystalline semiconductor layer such as n- or p-type polysilicon). The first thermopile conductors are oblong in shape and extend parallel to the substrate from a point inward and above the inner-most temperature sensitive element 202 to a point substantially laterally commensurate with and above the outer-most temperature sensitive element 204. According to the embodiment shown in FIG. 4, the thermopile test structure has mirror symmetry in a line perpendicular to the substrate and bisecting the inner temperature sensitive element 202. However, such symmetry is not essential to the functioning of the thermopile test structure.

[0032] FIG. 5 illustrates the thermopile test structure after further growth of the insulator layer 206, which now encapsulates the first thermopile conductors 207, and after fabrication of second thermopile conductors 208 formed in a second conductive layer (e.g. a polycrystalline semiconductor layer such as the other of n- or p-type polysilicon relative to the first thermopile conductor material 207). The first and second conductive layers may have a thickness between 100 nm and 400 nm. The insulator layer between the first and second conductive layers may have a thickness of 20 nm. The insulator layer between the substrate and the first conductive layer may have a thickness of between 200 nm and 500 nm. The second thermopile conductors also extend parallel to the substrate and, according to this embodiment, have a reduced extent in the direction parallel to the substrate compared to the first thermopile conductors, to enable interconnection of the different layers at a later stage in fabrication. Thus the second thermopile conductors are disposed above, parallel to and laterally co-centric with the first thermopile conductors.

[0033] The first and second thermopile conductors could be formed of any two materials having different Seebeck coefficients. Different semiconductor materials such as polycrystalline or amorphous silicon could be used, for example. These materials offer the advantage that the Seebeck coefficient can be tuned by ion implantation. Pairs of different metal materials/alloys are also contemplated. .

[0034] FIG. 6 illustrates the thermopile test structure after further growth of the insulator layer 206 (which now encapsulates both the first and second thermopile conductors), fabrication of a series of vias 209, and fabrication of a series of interconnectors/contacts in a first metal layer 210 for connecting the first and second thermopile elements of each thermocouple in the thermopile together by linking the associated vias in the metal layer 210.

[0035] FIG. 7a illustrates the thermopile test structure after further growth of the insulator layer 206 (which now also encapsulates the vias 209 and interconnectors/contacts in the first metal layer 210) and after fabrication of a series of elements in a second metal layer 211 which may be used as a heater when the thermopile test structure is in use. The heater elements are located substantially above the central (hot) part of the thermopile. Alternatively, the thermopile test structure may itself not include its own heater but may be locally heated from an external heat source, e.g. localized incident infra-red radiation. The heater could alternatively be located in a metal layer located underneath the thermopile, e.g. between the temperature sensitive elements and the thermopile. It is envisaged that the heater could optionally be removed at a later stage by etching an optical window, thereby allowing more incident radiation to directly reach the thermopile. The total thickness of the first and second metal layers (210 and 211 respectively) and the surrounding and inter-disposed insulator 206 above the first and second conductive layers (207 and 208 respectively) is between 0.6 μm and 2 μm.

[0036] The inventors have also appreciated that the thermopile test structure according to certain embodiments of the present invention as described herein may alternatively become a customer device, and may not only serve the purpose of a test structure during the fabrication process. For example, after wafer testing, a membrane portion may be formed by back-etching (hollowing out) some or all of the substrate under the central (hot) part of the thermopile, removing some or all of the temperature sensitive elements in the process, such as substantially all of the inner temperature sensitive element 202. Since the device would already have been tested during the wafer testing stage the temperature sensitive elements are no longer required in the final customer device. This application of the invention still provides the benefit that the wafer can be tested during the wafer testing stage without the need to first hollow-out the substrate by back-etching. FIG. 7b illustrates the thermopile test structure of FIG. 7a, where dashed line 220 represents a possible profile of an optional back-etching procedure (to form a membrane portion) and dashed line 230 represents a possible profile of an optional top-etching procedure (optical window etch) to remove the heater elements 211 above the thermopile. The illustrated profiles are exemplary only and the actual profiles may resemble different geometries deepening on the technique used, e.g. wet/dry, isotropic/anisotropic etching.

[0037] FIG. 8 is a plan view of an exemplary, finalised thermopile test structure according to an embodiment of the present invention. The overall structure has (approximately) 4-fold rotational symmetry. The thermopile geometry resembles two ‘+’ shapes disposed at 45 degrees to each other with a common centre. The heater, formed in second metal layer 211, has the same centre as the thermopile, and resembles a spiral. The thermopile thus comprises 8 separate radially-extending ‘arms’ each comprising, in this embodiment, either 3 or 4 separate thermocouples. Neighbouring arms of the thermopile are electrically connected around the periphery of the device in the first metal layer 210, and in use a voltage is developed across the thermopile readout contacts 212 and 213, which may be connected to a voltmeter for testing. The thermopile shown in FIG. 8 comprises two temperature sensitive elements 202 and 204, each of which has an approximately ring-shaped geometry, centred on the thermopile. Temperature sensitive element 202 is disposed under the hot (inner) part of the thermopile and temperature sensitive element 204 is disposed under the cold (outer) part of the thermopile. Contacts 214 and 215 are connected to temperature sensitive element 204 to enable connection to external monitoring/testing equipment. There are at least two ways of realizing connection of the inner temperature sensitive element 202. For example, via one or more conductive layers above the substrate (metal, polysilicon) or, alternatively, within the substrate via a thin narrow portion of the inner (hot) temperature sensitive element 202 which itself extends into the outer area of the thermopile where it could be connected in a similar way as the outer temperature sensitive element 204.

[0038] It is envisaged that in production, a single semiconductor wafer may comprise two classes of devices namely: [0039] a set of ‘customer’ devices (each comprising a thermopile, in addition to other circuitry such as amplifiers etc.), which will be used in final products, for example; and [0040] a set of thermopile test structures as described herein.

[0041] In production, a single lithographic shot may comprise one or two thermopile test structures and 50-100 customer devices, for example, although other ratios are contemplated. A single wafer may comprise 40 lithographical shots, for example. An example wafer 300 layout is shown in FIG. 9. The wafer is subdivided into a number of lithographic shots 301, each of which contain a number of customer devices and thermopile test structures as detailed above.

[0042] FIG. 10 illustrates an exemplary layout for a lithographic shot 301, wherein elements 302 are customer devices as defined above and elements 303 are thermopile test structures. Depending on requirements, the exact layout and ratio may be unimportant, and it may only be necessary that there be a sufficient number of thermopile test structures distributed across the wafer to be confident that if the thermopile test structures perform as expected then one can be reasonably sure that the customer devices will also be of a satisfactory standard—thereby verifying the production process has performed satisfactorily.

[0043] A method of characterizing the thermopile test structure according to an embodiment of the present invention will now be described. Such characterizing is typically performed as part of the overall manufacturing process. At the wafer testing stage, a current may be applied to the heater 211 to provide a heat source local to the inner side of the thermopile test structure. The output currents of the temperature sensitive elements 202 and 204, which according to this embodiment are diodes, are monitored, in addition to the output voltage of the thermopile itself (formed by elements 207-210 as described above). The diode output currents are used to calculate the temperature difference between the inner (hot) side and the outer (cold) side of the thermopile. This temperature difference is linked with the thermopile output voltage to characterize the sensitivity of the thermopile. The diodes are forward biased with a voltage typically in the range of 0.4 V to 0.9 V, and preferably approximately 0.7 V. The diode output current depends exponentially on temperature in a well-known and stable manner.

[0044] In any or all of the above embodiments the relative positions of the heater and temperature sensitive elements may not be of crucial importance, provided that when in use the heater can give rise to a temperature gradient across the thermopile which can be detected by the temperature sensitive elements. The relative positions of the temperature sensitive elements and the thermopile may be swopped compared to those as illustrated in the drawings and as described hereinabove. For example, the thermopile may be formed substantially within the substrate (by implantation, for example) with the temperature sensitive elements formed above the thermopile, i.e. on the substrate. Alternatively the thermopile may be formed on the substrate (substantially as illustrated and described hereinabove) but with the temperature sensitive elements formed above the thermopile.

[0045] Although the invention has been described in terms of certain embodiments as set forth above, it should be understood that these embodiments are illustrative only and that the claims are not limited to those embodiments. Those skilled in the art will be able to make modifications and alternatives in view of the disclosure which are contemplated as falling within the scope of the appended claims. Each feature disclosed or illustrated in the present specification may be incorporated in the invention, whether alone or in any appropriate combination with any other feature disclosed or illustrated herein.