Method for generation of electrical power within a three-dimensional integrated structure and corresponding link device
09847373 · 2017-12-19
Assignee
Inventors
Cpc classification
H10N19/00
ELECTRICITY
H01L2224/16225
ELECTRICITY
H10N19/101
ELECTRICITY
H10N10/17
ELECTRICITY
International classification
Abstract
Method for generation of electrical power within a three-dimensional integrated structure comprising several elements electrically interconnected by a link device, the method comprising the production of a temperature gradient in at least one region of the link device resulting from the operation of at least one of the said elements, and the production of electrical power using at least one thermo-electric generator comprising at least one assembly of thermocouples electrically connected in series and thermally connected in parallel and contained within the said region subjected to the said temperature gradient.
Claims
1. A device used to interconnect electrical components, the device comprising: a body; an electrical interconnect configured for the interconnection of the electrical components, the electrical components overlying the electrical interconnect; and a thermo-electric generator comprising an assembly of thermocouples electrically connected in series and thermally connected in parallel, the assembly of thermocouples being disposed under the electrical interconnect and being disposed at least in part in a same insulating material as the electrical interconnect, the thermo-electric generator being thermally coupled to an electrical component of the electrical components.
2. The device according to claim 1, wherein the body comprises a semiconductor substrate, wherein the electrical interconnect is disposed on top of the substrate.
3. A device used to interconnect electrical components, the device comprising: a body; an electrical interconnect configured for the interconnection of the electrical components, the electrical components overlying the electrical interconnect; and a thermo-electric generator comprising an assembly of thermocouples electrically connected in series and thermally connected in parallel, the assembly of thermocouples being disposed under the electrical interconnect and covered at least in part in a same insulating material as the electrical interconnect, the thermo-electric generator being thermally coupled to an electrical component of the electrical components; wherein the body comprises a semiconductor substrate and insulating regions disposed at least in part within the substrate and wherein the assembly of thermocouples comprises parallel doped semiconductor regions, the semiconductor regions being electrically connected in series so as to form a chain of regions alternately between a first conductivity type and a second conductivity type opposite the first conductivity type.
4. The device according to claim 3, wherein ones of the semiconductor regions extend within the substrate between parallel insulating regions.
5. The device according to claim 3, wherein ones of the semiconductor regions extend over and above a part of the substrate while being electrically isolated from the part of the substrate and above at least one part of the insulating regions.
6. The device according to claim 3, wherein ones of the semiconductor regions are coated with the insulating material and extend in their entirety above parallel insulating regions.
7. The device according to claim 3, wherein ones of the semiconductor regions are coated with the insulating material and extend in their entirety above regions of the substrate located between the insulating regions.
8. The device according to claim 3, wherein the semiconductor regions comprise polysilicon regions.
9. A device used to interconnect electrical components, the device comprising: a body; an electrical interconnect configured for the interconnection of the electrical components, the electrical components overlying the electrical interconnect; and a thermo-electric generator comprising an assembly of thermocouples electrically connected in series and thermally connected in parallel, the assembly of thermocouples being disposed under the electrical interconnect and covered at least in part in a same insulating material as the electrical interconnect, the thermo-electric generator being thermally coupled to an electrical component of the electrical components; wherein the body comprises a semiconductor substrate and insulating regions disposed at least in part within the substrate and wherein the assembly of thermocouples comprises parallel doped semiconductor regions, the semiconductor regions being electrically connected in series so as to form a chain of regions alternately between a first conductivity type and a second conductivity type opposite the first conductivity type; and wherein the device further comprises an electrically-conducting connection region that provides an electrical link between the semiconductor regions, the connection region being located over the substrate and connecting one end area of a first semiconductor region having the first conductivity type to an end area of a second semiconductor region having the second conductivity type.
10. The device according to claim 9, wherein the connection region is coated with the insulating material and comprises a metal track parallel to the first and second semiconductor regions and connected to the end areas via vertical electrical links.
11. The device according to claim 3, wherein the insulating regions are disposed in parallel and the assembly of thermocouples is located in the substrate and comprises parallel semiconductor regions running in the substrate, two neighboring semiconductor regions having opposite conductivity types and being separated by an insulating region.
12. The device according to claim 3, wherein the insulating regions are disposed in parallel and the assembly of thermocouples comprises first parallel semiconductor regions and second parallel semiconductor regions, the first parallel semiconductor regions all running in the substrate, and each being separated from a neighbor first semiconductor region by an insulating region, and the second parallel semiconductor regions all running respectively within the parallel insulating regions.
13. The device according to claim 3, wherein the insulating regions are disposed in parallel, and wherein the assembly of thermocouples comprises, on top of each insulating region, at least one pair of semiconductor regions coated with the insulating material, each pair of semiconductor regions having a region of the first conductivity type and a region of the second conductivity type.
14. The device according to claim 3, wherein the substrate comprises a part covered by an insulating layer and the assembly of thermocouples comprises a plurality of parallel pairs of parallel semiconductor regions coated with the insulating material, each pair of semiconductor regions having a region of the first conductivity type and a region of the second conductivity type, the pairs running along a top surface of the insulating layer and an insulating region thicker than the insulating layer.
15. The device according to claim 3, wherein the insulating regions are disposed in parallel and the assembly of thermocouples comprises a pair of semiconductor regions coated with the insulating material on top of each insulating region, each pair of semiconductor regions having a region of the first conductivity type and a region of the second conductivity type.
16. The device according to claim 3, wherein the insulating regions are disposed in parallel and the assembly of thermocouples comprises parallel semiconductor regions running in the substrate, the semiconductor regions alternating between regions of the first conductivity type and regions of the second conductivity type and being separated by an insulating region, the device further comprising, on top of each insulating region, a pair of semiconductor regions coated with the insulating material, each pair of semiconductor regions having a region of the first conductivity type and a region of the second conductivity type.
17. The device according to claim 3, wherein the insulating regions are disposed in parallel and the assembly of thermocouples comprises first parallel semiconductor regions running between the insulating regions and all having the first conductivity type, second parallel semiconductor regions running within the insulating regions and all having the second conductivity type, wherein a one pair of semiconductor regions coated with the insulating material is disposed on top of each first region, each pair of semiconductor regions having a region of the first conductivity type and a region of the second conductivity type.
18. The device according to claim 1, further comprising at least one other assembly of thermocouples electrically connected in series and thermally connected in parallel, all the assemblies being mutually electrically and thermally connected in parallel.
19. The device according to claim 18, wherein the body comprises a semiconductor substrate; wherein a first one of the assemblies of thermocouples is located in the substrate and comprises parallel semiconductor regions running in the substrate, two neighboring semiconductor regions having opposite conductivity types and being separated by an insulating region; and wherein a second one of the assemblies comprises a pair of semiconductor regions coated with the insulating material on top of each insulating region, each pair of semiconductor regions having a region of a first conductivity type and a region of a second conductivity type.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) Other advantages and features of the invention will become apparent upon examining the detailed description of non-limiting embodiments and the appended drawings, in which:
(2)
(3)
(4)
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
(5) In
(6) Furthermore, the integrated structure STD also comprises a third element, namely in this case an integrated circuit board or PCB (Printed Circuit Board) onto which is connected the lower face of the interposer INTP also by means of bumps BL.
(7) The interposer INTP comprises a substrate SB, generally made of silicon, together with an interconnection part INTX comprising several metallization levels, within which metal tracks are formed, being connected together for some of them through vias. The whole assembly of metal tracks and of vias is coated with an insulating coating, for example, of silicon dioxide, and, in particular, provides the electrical interconnection between the two integrated circuits CI1 and CI2.
(8) The substrate SB also comprises electrically-conducting vertical links LV, in the form of TSVs (“Through Silicon Vias”) allowing, for example, some of the metal tracks of the interconnection part ITX to be electrically connected with the bumps BL so as to provide a vertical electrical connection between at least one of the integrated circuits CI1 and CI2 and the board CT.
(9) Here, according to one aspect of the invention, the idea is to use the interposer INTP in order to incorporate into it a thermo-electric generator GEN.
(10) Thermo-electric generators conventionally comprise an assembly of thermocouples electrically connected in series and thermally connected in parallel. Thermocouples thermally connected in parallel is understood to mean thermocouples designed to be all subjected to the same temperature gradient, for example when a source of heat is disposed at one of the ends of the thermocouples, and when a cold source is disposed at the other end.
(11) Due to the Seebeck effect, a potential difference is then created across the two terminals of the assembly of thermocouples electrically connected in series.
(12) According to one aspect of the invention, the electrical activity of the various integrated circuits CI1, CI2, connected on the interposer INTP, will generate a temperature gradient GDT to which the generator GEN will be subjected.
(13) Indeed, the integrated circuits do not necessarily exhibit the same activity at the same time. Thus, as illustrated in
(14) It would also be possible, if the structure STD only comprises a single integrated circuit, for example the circuit CI1, to place one end of the generator GEN thermally coupled with this integrated circuit CI1 then forming the hot source SH, whereas the other end of the generator GEN would not be thermally coupled with any integrated circuit, which would then constitute a cold source.
(15) The electrical power delivered across terminals of the generator GEN can then be managed by a power management module PWM which can be a specific component directly fabricated on the interposer, and even better, can be an embedded module, in other words fabricated at the same time as the generator GEN.
(16) This module PWM can directly supply power to a load, or else a battery, or alternatively, storage means such as a capacitor.
(17) Generally speaking, any thermo-electric generator structure is suitable.
(18) The generators described in the following publications may notably be used: the article by Vullers, et al., entitled “Micropower energy harvesting,” Solid-State Electronics 53 (2009) 684-693; the article by Yang, et al., entitled “Design and verification of a thermoelectric energy harvester with stacked polysilicon thermocouples by CMOS process,” Sensors and actuators A157 (2010) 258-266; the article by Pin-Hsu Kao, et al., entitled “Fabrication and Characterization of CMOS-MEMS Thermoelectric Micro Generators,” Sensors 2010, 10, 1315-1325; the article by Joao Paulo Carmo, et al., entitled “A planar thermoelectric power generator for integration in wearable microsystems,” Sensors and Actuators A161 (2010), 199-204; the article by S. M. Yang, et al., entitled “Development of a thermoelectric energy harvester with thermal isolation cavity by standard CMOS process,” Sensors and Actuators A153 (2009), 244-250; the article by Ziyang Wang, et al., entitled “Realization of a wearable miniaturized thermoelectric generator for human body applications,” Sensors and Actuators A156 (2009), 95-102; the article by Hélène Lhermet, et al., entitled “Efficient Power Management Circuit: From Thermal Energy Harvesting to Above-IC Microbattery Energy Storage,” IEEE Journal of Solid-State Circuits, Vol. 43, No 1, January 2008; the article by Till Huesgen, et al., entitled “Design and fabrication of MEMS thermoelectric generators with high temperature efficiency,” Sensors and Actuators A145-146 (2008), 423-429; the article by David Koester, et al., entitled “Embedded thermoelectric coolers for semiconductor hot spot cooling”, 2006 IEEE; the article by Hiromichi Ohta, et al., entitled “Critical thickness for giant thermoelectric Seebeck coefficient of 2DEG confined in SrTiO.sub.3/SrTi.sub.0.8Nb0..sub.2O.sub.3 superlattices,” Thin Solid Films 516 (2008), 5916-5920.
(19) However, it is particularly advantageous to use the generators GEN that will now be described with reference to
(20) In
(21) Each thermocouple TH.sub.i here comprises a semiconductor region in the form of a bar, of N type of conductivity, referenced RSN.sub.i, and a semiconductor region of P type of conductivity, referenced RSP.sub.i, also in the form of a bar.
(22) The two semiconductor regions of the thermocouple TH.sub.i are parallel and electrically connected at one of their ends, and all of the thermocouples TH.sub.i are electrically connected in series so as to form a chain of parallel bars having alternately the N type of conductivity and the P type of conductivity.
(23) To the respective and corresponding ends of the bars RSN.sub.1 and RSP.sub.n respectively belonging to the first thermocouple TH.sub.1 and to the last thermocouple TH.sub.n, electrically-conducting output means MSE are connected, for example metal tracks or an extension of the corresponding bars.
(24) The hot source SH and the cold source SF are respectively disposed in front of the corresponding end areas ZX1 of all the parallel semiconductor regions of the thermocouples and of the corresponding end areas ZX2 of these parallel semiconductor regions.
(25) Owing to the Seebeck effect, the PN pairs subjected to the temperature difference or gradient will generate an electrical current which will be delivered by the output means MSE to then, for example, be stored in means for storing electrical power MSTK, comprising for example a capacitor connected to the terminals of the means MSE so as to form a closed electrical circuit.
(26) As a variant, the means MSE can be connected to another part of the integrated circuit so as to also form a closed circuit and to be able to directly supply electrical power to this other part of the integrated circuit.
(27) The output power of the generator GEN mainly depends on the number of PN pairs, on the surface area of the generator, on the value of the temperature gradient, and on the nature of the materials, in other words on their Seebeck coefficient.
(28) The thermocouples of the assembly ENS1 are thermally connected in parallel, in other words they are connected so as to all be subjected together to the same temperature gradient.
(29) As a variant, it is possible, as illustrated in
(30) Furthermore, the two assemblies ENS1, ENS2 are mutually electrically connected in parallel, and are furthermore also mutually thermally connected in parallel, in other words, in the present case, the hot source SH and the cold source SF allow the temperature difference created by the hot and cold sources SH and SF to be applied to all the thermocouples of all the assemblies.
(31) This allows a higher electrical power to be supplied to the electrically-conducting output means MSE.
(32) Several examples of generator structures GEN will now be described with reference to
(33) In
(34) The assembly of thermocouples ENS1 is situated in the substrate SB and comprises parallel semiconductor regions RSN, RSP running in the substrate, two neighboring semiconductor regions RSN, RSP respectively having one and the other of the two types of conductivity, in this case the N type of conductivity and the P type of conductivity, and which are separated by an insulating region RIS.
(35) The assembly is covered by an insulating layer CS1, for example a layer of silicon nitride, itself covered with an insulating coating, for example of silicon dioxide SiO.sub.2.
(36) The fabrication of such a generator is perfectly compatible with the conventional method for fabrication of embedded memories and does not require any modification of the method nor addition of mask level.
(37) The insulating coating ENR is for example that in which the metallization levels of the interconnection part ITX are formed.
(38) For this purpose, and generally speaking, whatever the structure of the thermocouple assembly used, the generator comprises electrically-conducting connection means providing the electrical link between the semiconductor regions of the thermocouples, these connection means being situated on top of the substrate and connecting one end area of a semiconductor region having one of the two types of conductivity, for example the N type of conductivity, to an end area of a semiconductor region having the other type of conductivity, for example, the P type of conductivity.
(39) For example, these connection means are coated with the insulating material ENR and comprise metal tracks parallel to the semiconductor regions and connected to the said end areas by vertical electrical links, for example, contacts or vias.
(40) In addition, so as to be perfectly compatible with conventional methods for component fabrication, for example, embedded memories, the metal tracks of the connection means are situated on at least one of the metallization levels of the interconnection part ITX.
(41) This is more particularly illustrated in
(42) Thus, the end area ZX1 of the semiconductor region RSN is electrically connected to the corresponding end area ZX1 of the region RSP.sub.1 by a metal track PM straddling the insulating region RIS separating these two regions RSN1 and RST1, this metal track being connected to the end areas ZX1 through vias V.
(43) Similarly, the end areas ZX2 of the regions RSN1 and RSP2 are also connected together by a metal track PM straddling the region RIS separating these two regions RSN1 and RSP2. This metal track PM is connected to the end areas ZX2 through vias V.
(44) Similarly, the two end areas ZX1 of the regions RSP2 and RSN2 are connected in the same manner by a metal track PM straddling the insulating region RIS, this metal track being connected to the areas ZX1 by means of vias V.
(45) The embodiment in
(46) The assembly of thermocouples comprises, on the other hand, second parallel semiconductor regions RSN all respectively running within the insulating regions RIS and all having the other type of conductivity, in this case the N type of conductivity.
(47) It should be noted here that this embodiment has the advantage of offering a generator having, for the same size of surface area as that in
(48) With respect to a conventional fabrication method of the embedded memory type, the method for fabrication of the generator is slightly modified. More precisely, after formation of the trenches in the silicon, and formation on the walls of the trenches of a layer of oxide coating the latter, the polysilicon is deposited, doped in situ, then the silicon overspilling from the trenches is subsequently etched in a conventional manner, for example, by a dry etching process.
(49) In the embodiment in
(50) In addition, the assembly ENS1 of thermocouples here comprises, on top of each substrate region RSB, at least one pair of semiconductor regions RSP, RSN coated with an insulating material ENR and respectively having the two types of conductivity.
(51) More precisely, in this example, the lower semiconductor regions RSP of the pairs have the P type of conductivity and are covered by the regions RSN which have the N type of conductivity.
(52) The insulating coating conventionally comprises silicon nitride and silicon dioxide and corresponds to the conventional encapsulation of non-volatile dual-gate memories (one gate of which is floating). For this purpose, the method for fabrication of the thermocouple of the generator GEN in
(53) Here again, as illustrated in
(54) Furthermore, the second end areas ZX20 of the regions RSN1 and RSN2 are connected to the second corresponding end areas ZX2 of the regions RSP1 and RSP2 through vias V3, V4, V5, V6 and portions of metal tracks PM2, PM3.
(55) It should be noted here that, just as in the embodiment in
(56) It would also be possible, as a variant, for the pairs of semiconductor regions to be situated above the insulating regions RIS rather than above the substrate regions.
(57) This is notably the case in the embodiment in
(58) In addition, as indicated hereinabove, aside from these substrate regions RSNA, RSPA, the assembly ENS1 comprises, on top of each insulating region, a pair of semiconductor regions RSPBi and RSNBi coated with an insulating material ENR and respectively having the two types of conductivity N and P.
(59) Thus, with respect to the embodiment in
(60) Here again, the generator in
(61) The electrical link means between the various elements of the various thermocouples are illustrated schematically in
(62) More precisely, a first end area ZX1 of the semiconductor region RSPB1 situated on top of the insulating region RIS is connected to the first corresponding end area ZX10 of the region RSNB1 through vias V1 and V2 and a portion of metal lines PM1.
(63) The second end area ZX20 of the region RNSB1 is connected to the second end area ZX2A of the substrate region RSPA through vias V3 and V4 and a portion of metal track PM2.
(64) The electrical continuity between the region RSPA and the region RSNB2 is provided by vias V5 and a portion of metal track PM3 connecting the two corresponding first end areas ZX1A and ZX10 of the region RSPA and of the region RSNB2.
(65) The electrical continuity between the regions RSNB2 and RSPB2 is provided by vias V6 and V7 and a portion of metal track PM4 connecting the two corresponding ends ZX20 and ZX2 of these two regions.
(66) The electrical continuity between the region RSPB1 and the neighboring substrate region RSNA is provided, at their respective second end areas ZX2 and ZX2A, by vias V8 and V9 and a portion of metal track PM5.
(67) Similarly, the electrical continuity between this region RSNA and the semiconductor region RSPB of the neighboring pair is provided by a via V10 and a portion of metal track PM6 on the end area ZX1A of the region RSNA.
(68) The embodiment of the generator GEN in
(69) More precisely, the assembly ENS1 of thermocouples comprises parallel substrate regions RSNA all having the same type of conductivity, in this case the N type of conductivity, semiconductor regions RSPA running within the insulating regions RIS separating these substrate regions RSNA and all having the other type of conductivity, namely the P type of conductivity, and, on top of each substrate region RSNA, pairs of parallel semiconductor regions RSPBi and RSNBi coated with an insulating material ENR.
(70) Thus, such an embodiment, perfectly compatible with the technology of embedded non-volatile memories, comprises, with respect to the embodiment in
(71) The electrical connection means between the various parts of the various thermocouples of the generator in
(72) Just as in the preceding embodiments, the electrical continuity between the various elements of the various thermocouples connected in series is effected through vias and portions of metal track connecting two end areas of two semiconductor regions having the two opposing types of conductivity N and P.
(73) In addition, whereas the electrical connection between the region RSPB1 and the region RSNA is effected by a portion of metal track PM1 situated on the metallization level MET1, the electrical connection between the region RSNB1 and the region RSPA, encapsulated within the insulating region RIS, is effected notably by three portions of metal tracks PM2, PM3, PM4 situated on the metallization levels MET1 and MET2.
(74) The lower right-hand part of
(75) The other electrical continuities of the regions illustrated in
(76) As was indicated hereinabove with reference to
(77) In this figure, the generator GEN comprises for example the assembly of thermocouples ENS1 illustrated in
(78) Silicon is a very good conductor of heat, such that the two levels of temperature respectively present at the two ends of the thermocouples, and initially different, can equalize very quickly, which then halts the generation of electrical power.
(79) Generally speaking, the embodiment in
(80) More precisely, as illustrated very schematically in
(81) For this reason, in view of the fact that the insulating material, generally silicon dioxide, is a very poor conductor of heat, attaining equilibrium of the temperatures between the two ends of the thermocouples is delayed, which improves the efficiency of the generator.
(82) One more precise exemplary embodiment is illustrated in
(83) In these figures, the corresponding region of substrate SB is covered by a thin insulating layer CS1 of silicon dioxide.
(84) The assembly ENS1 of thermocouples comprises several parallel pairs of parallel semiconductor regions RSNi, RSPi respectively having the two types of conductivity N and P, these pairs running over and above the insulating layer CS1 and over the insulating region RIS, thicker than the insulating layer CS1.