POWER SUPPLY FOR DEEP DIMMING LIGHT

Abstract

Power supplies (1) comprise first induction circuits (11) for receiving first amounts of power from source circuits, second induction circuits (12) for providing second amounts of power to combinations (2) of light circuits (21) and capacitor circuits (22), control circuits (13) for controlling the second amounts, and trigger circuits (14) for bringing the control circuits (13) into first modes having first durations equal to time-intervals. The control circuits (13) in the first modes guide supplying current signals for supplying the combinations (2) and subsequently discharging current signals for reducing charges of the capacitor circuits (22) and in second modes prevent the flowing of the discharging current signals. The light circuits (21) experience low output levels without experiencing low frequency ripples. The control circuits (3) may comprise parallel combinations of transistors (15) such as field effect transistors and diodes (16) such as parasitic-reverse-diodes of the field effect transistors. The first/second modes may be conducting/non-conducting modes of the transistors (15).

Claims

1. A power supply for supplying a combination of a light circuit and a capacitor circuit, the power supply comprising a first induction circuit for receiving a first amount of power from a source circuit, a second induction circuit inductively coupled to the first induction circuit and connected to the combination for providing a second amount of power to the combination, a control circuit serially connected between the second induction circuit and the combination for controlling the second amount of power, and a trigger circuit having an input connected to the second induction circuit for detecting a voltage signal present at the second induction circuit for bringing the control circuit into a first mode having a first duration equal to a time-interval, the control circuit being configured to, in the first mode, guide a supplying current signal for supplying the combination and subsequently a discharging current signal for reducing a charge of the capacitor circuit, and to, in a second mode of the control circuit, prevent the flowing of the discharging current signal.

2. The power supply as defined in claim 1, the control circuit comprising a parallel combination of a transistor and a diode.

3. The power supply as defined in claim 2, the transistor comprising a field effect transistor, and the diode comprising a parasitic-reverse-diode of the field effect transistor, or the transistor comprising a bipolar transistor, and the diode comprising a reverse-diode.

4. The power supply as defined in claim 2, the first mode comprising a conducting mode of the transistor and the second mode comprising a non-conducting mode of the transistor.

5. The power supply as defined in claim 1, a length of the time-interval having a substantially fixed value.

6. The power supply as defined in claim 1, the first amount of power comprising power pulses having a period larger than the time-interval.

7. The power supply as defined in claim 6, the trigger circuit being configured to bring the control circuit into the first mode in response to a detection of an end of a power pulse.

8. The power supply as defined in claim 1, the power supply having a normal dimming mode and a deep dimming mode each supporting the first mode and the second mode.

9. The power supply as defined in claim 8, the control circuit being adapted to, in the deep dimming mode and in the first mode, guide the supplying current signal and subsequently the discharging current signal, and to, in the deep dimming mode and in the second mode, prevent the flowing of the discharging current signal, and the control circuit being adapted to, in the normal dimming mode and in the first mode, only guide the supplying current signal, and to, in the normal mode and in the second mode, only guide the supplying current signal during at most a part of a second duration of the second mode.

10. The power supply as defined in claim 8, the first amount of power comprising power pulses, the power supply being configured to go into the deep dimming mode in response to a width of a power pulse being smaller than a threshold value, and the power supply being configured to go into the normal dimming mode in response to the width of the power pulse being larger than the threshold value.

11. The power supply as defined in claim 1, the first induction circuit comprising a first winding and the second induction circuit comprising a second winding, wherein both windings are inductively coupled, or the respective first and second induction circuits comprising respective first and second parts of one and the same winding.

12. The power supply as defined in claim 1, the trigger circuit comprising an integrated circuit for detecting a voltage signal present at the second induction circuit and for in response to a detection result generating a control signal for bringing the control circuit into one of the modes, or the trigger circuit comprising a detector circuit for detecting a voltage signal present at the second induction circuit and a generator circuit for in response to a detection result from the detector circuit generating a control signal for bringing the control circuit into one of the modes.

13. A device comprising the power supply as defined in claim 1 and further comprising the combination of the light circuit and the capacitor circuit.

14. The device as defined in claim 13, the light circuit comprising a light emitting diode circuit.

15. A method for operating a power supply for supplying a combination of a light circuit and a capacitor circuit, the power supply comprising a first induction circuit for receiving a first amount of power from a source circuit, a second induction circuit coupled to the first induction circuit for providing a second amount of power to the combination, and a control circuit connected to the second induction circuit for controlling the second amount of power, the method comprising, in response to a detected voltage present at the second induction circuit, a step of bringing the control circuit into a first mode having a first duration equal to a time-interval, the control circuit being configured to, in the first mode, guide a supplying current signal for supplying the combination and subsequently a discharging current signal for reducing a charge of the capacitor circuit, and to, in a second mode of the control circuit, prevent the flowing of the discharging current signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In the drawings:

[0033] FIG. 1 shows an embodiment of a power supply,

[0034] FIG. 2 shows an embodiment of a trigger circuit,

[0035] FIG. 3 shows waveforms in a deep dimming mode,

[0036] FIG. 4 shows waveforms in a normal dimming mode,

[0037] FIG. 5 shows an embodiment of a detector circuit, and

[0038] FIG. 6 shows an embodiment of a generator circuit.

DETAILED DESCRIPTION OF EMBODIMENTS

[0039] In the FIG. 1, an embodiment of a power supply 1 is shown. The power supply 1 comprises a first induction circuit 11 for receiving a first amount of power from a source circuit not shown. Thereto, one end of the first induction circuit 11 is to be coupled to the source circuit, possibly via further circuitry and/or possibly via a dimmer. The other end of the first induction circuit 11 is coupled to a first main electrode (drain) of a switch circuit 17 such as a field effect transistor. A second main electrode (source) of the switch circuit 17 is coupled to ground via a resistor 18. In this exemplary case, the first amount of power comprises power pulses. Via a control signal provided to a control electrode (gate) of the switch circuit 17, a period and a width of the power pulses can be controlled.

[0040] The power supply 1 further comprises a second induction circuit 12 that in this exemplary case is inductively coupled to the first induction circuit 11. Thereto, the first induction circuit 11 comprises a first winding and the second induction circuit 12 comprises a second winding, wherein both windings are inductively coupled. Alternatively, the respective first and second induction circuits 11, 12 may comprise respective first and second parts of one and the same winding, which first and second parts are then inductively coupled per se.

[0041] The second induction circuit 12 provides a second amount of power to a parallel combination 2 of a light circuit 21 and a capacitor circuit 22. The power supply 1 further comprises a control circuit 13 for controlling the second amount of power, and a trigger circuit 14 for bringing the control circuit 13 into a first mode having a first duration equal to a time-interval. Thereto, one end of the second induction circuit 12 is coupled to one end of the combination 2. The other end of the second induction circuit 12 is coupled to a first main electrode of the control circuit 13 and to an input of the trigger circuit 14. A second main electrode of the control circuit 13 is coupled to ground. An output of the trigger circuit 14 is coupled to a control electrode of the control circuit 13. The other end of the parallel combination 2 is coupled to ground too.

[0042] The control circuit 13 is configured to, in the first mode, guide a supplying current signal for supplying the combination 2 and subsequently guide a discharging current signal for reducing a charge of the capacitor circuit 22, and to, in a second mode of the control circuit 13, prevent the flowing of the discharging current signal.

[0043] Preferably, the control circuit 13 comprises a parallel combination of a transistor 15 and a diode 16. The transistor 15 may comprise a field effect transistor, and the diode 16 may comprise a parasitic-reverse-diode of the field effect transistor. The first mode may comprise a conducting mode of the transistor 15 and the second mode may comprise a non-conducting mode of the transistor 15. The first and second main electrodes of the control circuit 13 may be the first and second main electrodes of the transistor 15 (drain and source), and the control electrode of the control circuit 13 may be the control electrode (gate) of the transistor 15. In a conducting mode, the transistor 15 may conduct the supplying current signal and the discharging current signal. When the transistor 15 is not conducting, the diode 16 may conduct the supplying current signal. The diode 16 cannot conduct the discharging current signal owing to the fact that the supplying current signal and the discharging current signal flow in opposite directions: The supplying current signal flows from the second induction circuit 12 through the combination 2 and through the control circuit 13 (through the transistor 15 when conducting or through the diode 16) back to the second induction circuit 12. The discharging current signal flows from the capacitor circuit 22 through the second induction circuit 12 (while charging this second induction circuit 12) and through the control circuit 13 (only in case the transistor 15 is conducting) back to the capacitor circuit 22.

[0044] Preferably, a length of the time-interval may have a substantially fixed value, such as for example a fixed value. The power pulses may have a period larger than the time-interval. The trigger circuit 14 may be configured to bring the control circuit 13 into the first mode in response to a detection of an end of a power pulse, as will be further discussed at the hand of the FIGS. 3 and 4.

[0045] Preferably, the power supply 1 may have a normal dimming mode and a deep dimming mode. The control circuit 13 may be configured in the deep dimming mode to, in the first mode, guide the supplying current signal and subsequently guide the discharging current signal, and to, in the second mode, prevent the flowing of the discharging current signal, and the control circuit 13 may be configured in the normal dimming mode to, in the first mode, only guide the supplying current signal, and to, in the second mode, only guide the supplying current signal during at most a part of a second duration of the second mode. The power supply 1 is configured to go into the deep dimming mode in response to a width of a power pulse being smaller than a threshold value, and the power supply 1 is configured to go into the normal dimming mode in response to the width of the power pulse being larger than the threshold value, as will be further discussed at the hand of the FIGS. 3 and 4. A sum of the first duration of the first mode (the time-interval) and the second duration of the second mode will usually be equal to the period of the power pulses.

[0046] In the FIG. 1, the trigger circuit 14 comprises for example an integrated circuit for detecting a voltage signal present at the second induction circuit 12 and for in response to a detection result generating a control signal for bringing the control circuit 13 into one of the modes.

[0047] In the FIG. 2, an embodiment of a trigger circuit 14 is shown. This trigger circuit 14 differs from the previously discussed integrated circuit in that this trigger circuit 14 comprises a detector circuit 31 for detecting a voltage signal present at the second induction circuit 12 and a generator circuit 51 for in response to a detection result from the detector circuit 31 generating a control signal for bringing the control circuit 13 into one of the modes. The detector circuit 31 is shown in and discussed at the hand of the FIG. 5, and the generator circuit 51 is shown in and discussed at the hand of the FIG. 6.

[0048] In the FIG. 3, waveforms are shown in a deep dimming mode. A waveform A corresponds with a voltage signal present between the first induction circuit 11 and the switch circuit 17 on the one hand and ground on the other hand. During a time length T.sub.PP, the waveform A has a minimum value owing to the fact that the switch circuit 17 is in a conducting mode, and a power pulse is present. A waveform B corresponds with a voltage signal present between the second induction circuit 12 and the control circuit 13 on the one hand and ground on the other hand. This voltage signal is an input signal for the trigger circuit 14. Clearly, when the waveform A is maximal, the waveform B is minimal, and vice versa, which results in the trigger circuit 14 bringing the control circuit 13 into the first mode in response to a detection of an end of a power pulse.

[0049] A waveform C corresponds with a control signal generated by the trigger circuit 14 for bringing the control circuit 13 in one of the modes. Here, the waveform C has, when ignoring delays and transitions, a zero value during a power pulse. The waveform C has a maximum value between two subsequent power pulses. A duration of this maximum value is equal to the time-interval having the length with the substantially fixed value (the first duration of the first mode). The waveform D corresponds with a current signal flowing between the second induction circuit 12 and the combination 2. Clearly, during a time length T.sub.SUP, the waveform D has a positive value (situated above the dashed line), which means that a supplying current signal is flowing from the second induction circuit 12 to the combination 2. During a time length T.sub.DIS, the waveform D has a negative value (situated below the dashed line), which means that a discharging current signal is flowing from the capacitor circuit 22 to the second induction circuit 12.

[0050] In the FIG. 4, waveforms are shown in a normal dimming mode. Again, the waveform A corresponds with the voltage signal present between the first induction circuit 11 and the switch circuit 17 on the one hand and ground on the other hand. During a time length T.sub.PP, the waveform A has a minimum value owing to the fact that the switch circuit 17 is in a conducting mode, and a power pulse is present. The waveform B corresponds with the voltage signal present between the second induction circuit 12 and the control circuit 13 on the one hand and ground on the other hand. This voltage signal is the input signal for the trigger circuit 14. Clearly, when the waveform A is maximal, the waveform B is minimal, and vice versa, which results in the trigger circuit 14 bringing the control circuit 13 into the first mode in response to the detection of the end of the power pulse.

[0051] Again, the waveform C corresponds with the control signal generated by the trigger circuit 14 for bringing the control circuit 13 in one of the modes. Here, the waveform C has, when ignoring delays and transitions, a zero value during a power pulse and during a part of the time between two subsequent power pulses. The waveform C has a maximum value during the rest of the time between the two subsequent power pulses. A duration of this maximum value is equal to the time-interval having the length with the substantially fixed value (the first duration of the first mode). Clearly, in the FIGS. 3 and 4, this duration of this maximum value is the same. The waveform D corresponds with the current signal flowing through the second induction circuit 12 and the combination 2. Clearly, during a time length T.sub.SUP, the waveform D has a positive value (situated above the dashed line), which means that a supplying current signal is flowing from the second induction circuit 12 to the combination 2. Here, the waveform D does not have a negative value (situated below the dashed line), which means that a discharging current signal does not flow here.

[0052] So, compared to the FIG. 3 (deep dimming), in the FIG. 4 (normal dimming) T.sub.PP has been increased, and a larger first amount of power is provided to the first induction circuit 11 and a larger second amount of power is provided to the combination 2, and as a result, the supplying current signal has got a larger maximum amplitude and a longer duration and the discharging current signal no longer occurs. Owing to the fact that, in the FIG. 3 (deep dimming), the second amount of power as provided to the combination 2 is equal to a difference between an amount of power provided to the combination 2 via the supplying current signal and an amount of power withdrawn from the capacitor circuit 22 via the discharging current signal, the light circuit 21 experiences a low output level without experiencing a low frequency ripple. This is a great technical advantage.

[0053] In the FIG. 5, an embodiment of a detector circuit 31 is shown. A parallel combination of a resistor 32 and a serial combination of a resistor 33 and a capacitor 34 receives at one end the input signal. Its other end is coupled via a parallel combination of a resistor 35 and a zener diode 36 to ground, and to a control electrode (gate) of a (field effect) transistor 37. A first main electrode (drain) of the transistor 37 is coupled to one end of resistors 38, 41 and 42 and to a non-inverting input of a comparator 44. Another end of the resistor 41 and a second main electrode (source) of the transistor 37 are coupled to ground. Another end of the resistor 38 is coupled via a diode 39 to one end of a resistor 40 and to an inverting input of the comparator 44. Other ends of the resistors 40 and 42 are coupled to a terminal 60 for receiving an auxiliary feeding signal. The inverting input of the comparator 44 is further coupled via a capacitor 43 to ground. The non-inverting input of the comparator 44 is further coupled via a resistor 45 to an output of the comparator 44 that provides a signal with a detection result. The terminal 60 is further coupled to ground via a capacitor 46.

[0054] In the FIG. 6, an embodiment of a generator circuit 51 is shown. Control electrodes (bases) of (bipolar) transistors 52 and 53 receive the signal with the detection result and are coupled to one end of a resistor 54. First main electrodes (emitters) of the transistors 52 and 53 are coupled to each other and to one end of a resistor 56. A second main electrode (collector) of the transistor 52 is coupled to ground. A second main electrode (collector) of the transistor 53 is coupled via a resistor 55 to the terminal 60 for receiving the auxiliary feeding signal. The terminal 60 is further coupled to another end of the resistor 54 and to ground via a capacitor 59. Another end of the resistor 56 is coupled via a resistor 57 to ground and to one end of a resistor 58. Another end of the resistor 58 provides the control signal for bringing the control circuit 13 into one of the modes.

[0055] Alternatively, the capacitor circuit 22 may form part of the power supply 1. First and second elements can be coupled indirectly via a third element and can be coupled directly without the third element being in between. The embodiments shown and discussed are exemplary embodiments only. For example, of the capacitors 46 and 59, one can be left out easily. Instead of a separate detector circuit 31 and a separate generator circuit 51, one integrated circuit or more than two separate circuits may be introduced.

[0056] Summarizing, power supplies 1 comprise first induction circuits 11 for receiving first amounts of power from source circuits, second induction circuits 12 for providing second amounts of power to combinations 2 of light circuits 21 and capacitor circuits 22, control circuits 13 for controlling the second amounts, and trigger circuits 14 for bringing the control circuits 13 into first modes having first durations equal to time-intervals. The control circuits 13 in the first modes guide supplying current signals for supplying the combinations 2 and subsequently discharging current signals for reducing charges of the capacitor circuits 22 and in second modes prevent the flowing of the discharging current signals. The light circuits 21 experience low output levels without experiencing low frequency ripples. The control circuits 3 may comprise parallel combinations of transistors 15 such as field effect transistors and diodes 16 such as parasitic-reverse-diodes of the field effect transistors. The first/second modes may be conducting/non-conducting modes of the transistors 15.

[0057] While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive; the invention is not limited to the disclosed embodiments. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims. In the claims, the word “comprising” does not exclude other elements or steps, and the indefinite article “a” or “an” does not exclude a plurality. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims should not be construed as limiting the scope.