DIGITALLY-CONTROLLED SWITCH-MODE START-UP CIRCUIT FOR LED-BASED LIGHTS

Abstract

Power consumption in a start-up circuit for a LED-based light bulb may be reduced by digitally switching a transistor of the start-up circuit coupled to the input voltage. When the transistor is digitally switched between on and off, a reduced amount of power is dissipated by the transistor, because it may not enter a saturation region of operation where the resistance of the transistor between drain and source terminals increases. The transistor may be coupled to a voltage regulator for generating one or more output voltages, including a supply voltage for a host controller IC. The transistor may be switched on and off by a digital signal generated by logic circuitry, which may decide to switch the transistor on and off based on a voltage level at an output of the voltage regulator.

Claims

1. An apparatus, comprising: a voltage regulator configured to generate an output voltage for supplying a lighting controller; a current power train comprising a power FET and coupled to the voltage regulator; a gate drive circuit coupled to a gate of the power FET; and a logic circuit coupled to the gate drive circuit and configured to operate the field-effect transistor power FET as a switching-mode power supply.

2. The apparatus of claim 1, wherein the power FET comprises a high-voltage (HV) depletion-mode power FET, and wherein the current power train further comprises: a low-voltage (LV) enhancement-mode power FET, wherein a drain of the LV power FET is coupled to a source of the HV power FET; and a diode coupled to the drain of the LV power FET and the source of the HV power FET.

3. The apparatus of claim 1, wherein the gate drive circuit comprises: an inverter coupled to the gate of the field-effect transistor power FET, wherein a power supply input to the inverter comprises a greater of a voltage at a source of the power FET and the output voltage of the voltage regulator.

4. The apparatus of claim 1, further comprising a comparator coupled to the logic circuit, wherein the comparator is configured to provide a signal to the logic circuit proportional to a difference between an auxiliary output node voltage and a reference voltage.

5. The apparatus of claim 4, wherein the logic circuitry is configured to digitally switch the power FET based on the comparator signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0030] For a more complete understanding of the disclosed system and methods, reference is now made to the following descriptions taken in conjunction with the accompanying drawings.

[0031] FIG. 1 is an example circuit schematic illustrating a conventional startup circuit for an LED-based bulb in accordance with the prior art.

[0032] FIG. 2 is another example circuit schematic illustrating a conventional startup circuit for an LED-based bulb in accordance with the prior art.

[0033] FIG. 3 is an example block diagram illustrating a digitally-controlled switch-mode start-up circuit for generating a controller supply voltage according to one embodiment of the disclosure.

[0034] FIG. 4 is an example flow chart illustrating a method for operating a switch-mode start-up circuit for generating a controller supply voltage according to one embodiment of the disclosure.

[0035] FIG. 5 is an example flow chart illustrating a method for digitally controlling operation of a start-up circuit to provide dimmer compatibility according to one embodiment of the disclosure.

[0036] FIG. 6 is an example circuit schematic illustrating digital control of a power FET for generating a controller supply voltage and providing dimmer compatibility according to one embodiment of the disclosure.

[0037] FIG. 7 are example graphs illustrating operation of the circuit of FIG. 6 to provide start-up and dimmer compatibility in an LED-based bulb according to one embodiment of the disclosure.

[0038] FIG. 8 is an example block diagram illustrating a dimmer system for a light-emitting diode (LED)-based bulb with a digitally-controlled switch-mode start-up circuit according to one embodiment of the disclosure.

DETAILED DESCRIPTION

[0039] FIG. 3 is an example block diagram illustrating a digitally-controlled switch-mode start-up circuit for generating a controller supply voltage according to one embodiment of the disclosure. A voltage regulator 312 may indirectly control an auxiliary output voltage V.sub.AUX at output node 304 and directly control a supply voltage V.sub.DD,H at output node 306. The V.sub.DD,H voltage may be, for example, a supply voltage of approximately 5-15 Volts for a controller integrated circuit (controller IC) and may be lower than the V.sub.AUX voltage. The output node 306 for V.sub.AUX may be coupled to a winding of a transformer (not shown) that provides current to the voltage regulator 312 when the start-up circuit 300 is off. Each of the output nodes 304, 306 may be held relatively constant by capacitors 304A, 306A, respectively.

[0040] The voltage regulator 312 may receive power, through power train 314, from an input node 302 receiving an input voltage V.sub.IN, such as a line voltage V.sub.LINE. The power train 314 may include a transistor 324 for applying power from the input node 302 to the voltage regulator 312. The power train 314 may be controlled by logic circuitry 320, including a gate drive circuit 316 and a digital control loop 318. The gate drive circuit 316 may generate a signal for input to a gate of the transistor 324. The signal generated by the gate drive circuit 316 may, for example, control the transistor 324 to generate a desired auxiliary voltage V.sub.AUX level at output node 304. In one embodiment, the power train 314 may directly couple to the V.sub.AUX node 304 through a diode. The gate drive circuit 316 may receive, through the digital control loop 318, feedback about operation of the power train 314. For example, the digital control loop 318 may provide information about a voltage level of auxiliary voltage V.sub.AUX at output node 304.

[0041] In one embodiment, the transistor 324 may be a high-voltage depletion-mode power FET. The power train 314 may also include other transistors (not shown), such as a low-voltage enhancement-mode power FET, and other components, such as blocking diodes. At start-up, current may be drawn from the input node 302 through the transistor 324 to charge capacitor 304A for output node 304. The transistor 324 may be boot-strapped during start-up of the circuit 300 to keep the transistor 324 in an “on” state while capacitor 304A charges to a level for normal operation of the LED-based bulb.

[0042] The gate drive circuit 316 may control the transistor 324 by digitally switching the transistor 324 on and off. For example, during start-up, the gate drive circuit 316 may apply a V.sub.DD,X (not shown) voltage to the gate of the transistor 324. The V.sub.DD,X voltage may track a source voltage of the transistor 324 to hold the transistor 324 in an “on” state. The V.sub.DD,X voltage may increase as the auxiliary voltage V.sub.AUX at capacitor 304A increases. The digital control loop 318 may monitor the auxiliary voltage V.sub.AUX level and provide feedback to the gate drive circuit 316 for control of the power train 314. When the digital control loop 318 detects the auxiliary voltage V.sub.AUX reaches or exceeds a first threshold level, the gate drive circuit 316 may couple a ground to the gate of the transistor 324. The transistor 324 then transitions to an “off” state after a sufficiently negative gate-source voltage V.sub.GS is generated to hold the transistor 324 in the “off” state. When the digital control loop 318 detects the auxiliary voltage V.sub.AUX level decreases to a second threshold level, lower than the first threshold level, the gate drive circuit 316 may drive V.sub.DD,X voltage to the gate of the transistor 324 to transition the transistor 324 back to an “on” state. When the transistor 324 returns to the “on” state, the capacitor 304A begins to charge and the auxiliary voltage V.sub.AUX increases until the digital control loop 318 again detects reaching of the first threshold level. In one embodiment shown in FIG. 6, V.sub.DD,X may be selected from a greater of the supply voltage V.sub.DD,H at output node 306 and a source voltage V.sub.SRC of the transistor 324 by diodes 642 and 644 (as shown in FIG. 6).

[0043] Operation of the circuit 300 with transistor 324 as described above results in the transistor 324 being operated in switch-mode in either an “on” state or an “off” state, rather than in an active region of operation of the transistor 324. Operating the transistor 324 as a switch minimizes power dissipation by the transistor 324 and thus allows the size of the transistor 324 to be reduced. The size of the transistor 324 represents a large portion of the space occupied by circuit 300. Thus, a reduction in size of the transistor 324 allows for a significant reduction in the size of the circuit 300 and also the cost of manufacturing the circuit 300 as an integrated circuit (IC).

[0044] As described above, the transistor 324 may be operated in a switching-mode to generate a supply voltage V.sub.DD,H. FIG. 4 is an example flow chart illustrating a method for operating a switching-mode power supply for generating a controller supply voltage according to one embodiment of the disclosure. A method 400 begins at block 402 with receiving a line voltage at a power FET. At block 404, a current supply may be provided to the voltage regulator by the power FET. At block 406, a supply voltage V.sub.DD,H may be generated by the voltage regulator from the current supply of block 404. The supply voltage V.sub.DD,H may be a supply voltage for a low-voltage controller IC. At block 408, a gate drive circuit coupled to a gate of the power FET may operate the power FET as a switching-mode power supply for providing the current supply to voltage regulator. Block 408 may include, for example, switching on the power FET to increase charge at a capacitor coupled to the V.sub.DD,H output node and switching off the power FET to decrease charge at the capacitor. Varying a charge level of the capacitor may result in a proportionate increase or decrease of the V.sub.DD,H voltage. Thus, switching-mode operation of the power FET may allow the gate drive circuit to regulate a voltage level of the V.sub.DD,H voltage during start-up of a LED-based light bulb. Variations in the V.sub.DD,H voltage may be reduced by the voltage regulator and timing the switching of the power FET.

[0045] In addition to providing start-up capability, the transistor 324 may be used to provide dimmer compatibility. FIG. 5 is an example flow chart illustrating a method for digitally controlling operation of a start-up circuit to provide dimmer compatibility according to one embodiment of the disclosure. Blocks 502, 504, and 506 of method 500 may be similar to blocks 402, 404, and 406 of method 400. That is, a line voltage may be received at a power FET at block 502, a current supply may be provided by the power FET to a voltage regulator at block 504, and a supply voltage V.sub.DD,H may be generated by the voltage regulator from the current supply at block 506. Controlling operation of the power FET from the gate drive circuit may differ at block 508 compared to block 408 of FIG. 4.

[0046] At block 508, the power FET may be operated to generate the supply voltage V.sub.DD,H during start-up and may also be operated to provide dimmer compatibility by generating the supply voltage V.sub.DD,H after the LED-based light bulb has started. In one embodiment, dimmer compatibility may be provided by providing a path to ground through a controlled impedance such that internal time constants of a dimmer are not interrupted. For example, FETs 324 and 624 illustrated in FIG. 3 and FIG. 6, respectively, may pull a controlled amount of current from line voltage at input node V.sub.IN to ground. This path to ground through resistor 640 may provide a controlled impedance. Generally, LED-based light bulbs may be limited to operation from on/off light switches. When dimmer compatibility is integrated into the LED-based light bulb, the light bulb may operate with dimmer switches to allow a nearly continuous range of operation from off to on. Dimmer compatibility allows the LED-based light bulbs, which are capacitive in nature, to operate from conventional dimmers, such as in homes, which are designed for use with conventional bulbs that are resistive in nature and that always provide a current path. However, conventionally such dimmer compatibility is implemented in additional circuitry separate from the start-up circuit.

[0047] The gate drive circuit at block 508 may control the power FET during start-up and after start-up to generate the supply voltage V.sub.DD,H. In one embodiment, the gate drive circuit may be configured to receive a digital input from a host control IC to modify operation of the power FET by the gate drive circuit. Thus, circuitry in a control IC may be reduced by operating the power FET during start-up and operation of the dimmed LED-based light bulb.

[0048] The circuit 300 of FIG. 3 may be configured to be controlled by a digital input received from a host controller IC. FIG. 6 is an example circuit schematic illustrating digital control of a power FET for generating a controller supply voltage and providing dimmer compatibility according to one embodiment of the disclosure. The gate of transistor (power FET) 324 may be coupled to transistors 632 and 634, which may be configured as a complimentary metal-oxide-semiconductor inverter (CMOS inverter). A control signal V.sub.CTRL,GATE generated by the digital control loop 318 may be provided to the gate drive circuit 320 for controlling the transistors 632 and 634. The V.sub.CTRL,GATE control signal may switch an applied gate voltage of the transistor 654 between V.sub.DD,X and ground. For example, when the V.sub.CTRL,GATE signal is high, the transistor 632 may be closed to couple V.sub.DD,X to the gate of the transistor 654 and the transistor 634 may be open to disconnect the gate of the transistor 654 from ground. In another example, when the V.sub.CTRL,GATE signal is low, the transistor 632 may be open to disconnect V.sub.DD,X from the gate of the transistor 654 and the transistor 634 may be closed to connect the gate of the transistor 324 to ground. Thus, the digital control loop 318 may control application of a gate V.sub.GATE by the gate drive circuit 320 to the transistor 324.

[0049] When the gate power FET of the transistor 324 is connected to V.sub.DD,X, the transistor 324 may be in an “on” state and current may flow from the input node 302 through resistor 640, through the transistor 324 and through blocking diode 646 to the voltage regulator 312. Additionally, current may flow directly to the V.sub.AUX capacitor 304A. The voltage regulator 312 may regulate flow of current to the V.sub.AUX capacitor 304A and the V.sub.DD,H capacitor 306A. The resistor 640 may be external to an integrated circuit containing circuit 600. In circuit 600, a large portion of the input voltage V.sub.IN may be dropped across the resistor 640. Thus, power dissipation in transistor 324 may be reduced. The resistance of resistor 640 may be selected to regulate a current through the transistor 324 when the transistor 324 is switched on. The current flows through blocking diode 646 to the voltage regulator 312. The transistor 612 may operate as a linear regulator for driving current from the power train 314 to capacitor 304A and 306A to generate V.sub.AUX and V.sub.DD,H, respectively. The transistor 612 may be biased by Zener diode 614.

[0050] The V.sub.CTRL,GATE signal may be generated by logic decode and control sequencing block 618 of the digital control loop 318. The control loop 318 may also include a comparator 620, resistors 622 and 624, and reference voltage V.sub.ref input node 606. The resistors 622 and 624 may divide the voltage that is across the voltage regulator 312 according to a ratio defined by the comparative resistance values of the resistors 622 and 624. The resistor 624 may also act as a sense resistor to provide the comparator 620 a voltage level that is a fraction of the voltage across the voltage regulator 312. The comparator 620 may compare the voltage across resistor 624 to reference voltage V.sub.ref. The V.sub.ref voltage may correspond to a first threshold level described above with reference to FIG. 3. An output V.sub.CMP of the comparator 620 provides feedback to logic block 618 regarding whether a voltage level of V.sub.AUX is at or above a first threshold voltage. The logic block 618 may switch the V.sub.CTRL,GATE signal between high and low to switch transistor 324 on and off based on the V.sub.CMP feedback. For example, when V.sub.CMP indicates the V.sub.AUX signal reaches a first threshold level, the V.sub.CTRL,GATE signal may be switched to turn off the transistor 324. The logic block 618 may also switch a V.sub.CTRL,GND signal between high and low to switch the gate of transistor 654 to ground to switch off transistor 654.

[0051] The logic block 618 may also receive digital control inputs V.sub.CTRL,1 and V.sub.CTRL,2 at mode input nodes 602 and 604. V.sub.CTRL,1 and V.sub.CTRL,2 inputs may be provided by a host controller IC as feedback for controlling the transistor 324 to provide dimmer compatibility. In one embodiment, pull-down resistors (not shown) may be coupled to the input nodes 602 and 604 and to ground to set the logic block 618 by default into Mode 0 for start-up. The logic block 618 may control circuit 600 based on the V.sub.CTRL,1 and V.sub.CTRL,2 inputs based on control described in Table 1.

TABLE-US-00001 TABLE 1 Control signals for controlling circuit 600 and the resulting operation of circuit 600 for dimmer compatibility according to one embodiment of the disclosure. power power Mode V.sub.CTRL,1 V.sub.CTRL,2 V.sub.CMP FET 324 FET 624 0 (HVS) 0 0 0 On Off 0 0 1 Off Off 1 (OFF) 0 1 X Off Off 2 (BLEED TO 1 0 X On On GROUND) 3 (BLEED TO AUX 1 1 0 On Off OR GROUND) 1 1 1 On On

[0052] The four modes described in Table 1 may enable configurations of the circuit 600 with the transistor 324 for providing dimmer compatibility. Mode 0, signaled by a low signal at V.sub.CTRL,1 and V.sub.CTRL,2 inputs, may be a start-up mode with operation similar to that described above with reference to FIG. 3. In Mode 0, the transistor 654 may be switched off and the transistor 324 is toggled on and off based on the output of the comparator 620. The transistor 324 may be switched off when the comparator 620 indicates V.sub.AUX is above a first threshold level by outputting a high signal. The transistor 324 may be switched on when the comparator 620 indicates V.sub.AUX is below a first threshold level by outputting a low signal. In Mode 1, signaled by a low V.sub.CTRL,1 and a high V.sub.CTRL,2 signal, the transistors 324 and 624 are turned off. In mode 2, charge is conducted from line to ground. Mode 2 is signaled by a high V.sub.CTRL,1 and low V.sub.CTRL,2 signal. In Mode 2, the transistors 324 and 624 may be both switched on regardless of comparator 620 output. In Mode 3, the transistor 324 may be always on and the comparator 620 output determines whether to transfer charge to capacitor 304A or to ground. The transistor 654 may be turned on when the comparator 620 output is high indicating V.sub.AUX has reached a first threshold level to dump current to ground. The transistor 654 may be turned off when the comparator 620 output is high indicating V.sub.AUX is below the first threshold level to dump current to capacitor 304A. Mode 3 may allow a host controller IC to recover from a low supply voltage V.sub.DD,H before the host controller IC begins malfunctioning due to a too low supply voltage V.sub.DD,H.

[0053] Illustration of one method of operating the circuit 600 of FIG. 6 is illustrated with the signals shown in FIG. 7. FIG. 7 includes example graphs illustrating operation of the circuit of FIG. 6 to provide start-up and dimmer compatibility in an LED-based bulb according to one embodiment of the disclosure. At time 732, the circuit 600 enters start-up mode 722 when V.sub.CTRL,1 712 and V.sub.CTRL,2 714 are low. Input voltage 702 shows a leading edge (LE) line voltage generated by a dimmer. In start-up mode 722, the gate of the transistor 324 is coupled to the source of the transistor 324. Thus, the voltage V.sub.GATE 706 and voltage V.sub.SRC 708 increase together. Current I.sub.FET through the transistor 324 is shown in line 704 and follows the input voltage V.sub.IN of line 702 while the transistor 324 is on. The auxiliary voltage V.sub.AUX and supply voltage V.sub.DD,H increase as capacitors 304A and 306A are charged from current I.sub.FET. At time 734, the comparator 620 output V.sub.CMP of line 710 switches to high when auxiliary voltage V.sub.AUX 716 reaches a first threshold 752. The logic block 618 may then switch V.sub.GATE 706 to ground to turn off the transistor 324. Auxiliary voltage V.sub.AUX 716 may then decrease after time 734 as capacitor 304A discharges. The supply voltage V.sub.DD,H in line 718 may be held relatively constant after the beginning of the start-up mode 722.

[0054] After the start-up mode 722, the logic block 618 may receive mode inputs on V.sub.CTRL,1 and V.sub.CTRL,2 from a host controller IC to provide dimmer compatibility, which may allow circuit 600 to continue to provide supply voltage V.sub.DD,H 718 during normal operation of the LED-based bulb. At time 736, the host controller IC may indicate a bleed-to-ground mode 724 by generating a high V.sub.CTRL,1 712 and low V.sub.CTRL,2 714 signal. After time 736, the transistors 324 and 624 are on and current is dumped from the input node 302 to ground. At time 738, the host controller IC may indicate a start-up mode 726 by generating a low V.sub.CTRL,1 712 and low V.sub.CTRL,2 714 signal. After time 738, the transistor 324 is on and the transistor 654 is off and current is again provided to voltage regulator 312 to charge the capacitor 304A. At time 738A, the comparator 620 output V.sub.CMP of line 710 switches high indicating auxiliary voltage V.sub.AUX reached the first threshold level 752. The logic block 618 then switches off the transistor 324, and the capacitor 304A begins discharging again. At time 740, the host controller IC may indicate an off mode 728 by generating a low V.sub.CTRL,1 signal 712 and a high V.sub.CTRL,2 signal 714. The logic block 618 may turn off transistors 324 and 624 in off mode 728. The host controller IC may continue cycling through modes 724, 726, and 728 during normal operation of the LED-based bulb. As the host controller IC continues cycling, the timing duration of each of the modes may vary from cycle to cycle of the input voltage 702 as necessary to maintain a desired voltage level of V.sub.DD,H.

[0055] The start-up circuits described above may be integrated into a dimmer circuit to provide dimmer compatibility with lighting devices. FIG. 8 is an example block diagram illustrating a dimmer system for a light-emitting diode (LED)-based bulb with a digitally-controlled switch-mode start-up circuit according to one embodiment of the disclosure. A system 800 may include a dimmer compatibility circuit 808 with a variable resistance device 808a and a control integrated circuit (IC) 808b. The dimmer compatibility circuit 808 may couple an input stage having a dimmer 804 and a rectifier 806 with an output stage 810, which may include light emitting diodes (LEDs). The system 800 may receive input from an alternating current (AC) mains line 802. The output stage 810 may include a power stage with a start-up circuit as described above. For example, the output stage 810 may include a digitally-controlled start-up circuit described above with reference to FIG. 3 and/or FIG. 6.

[0056] If implemented in firmware and/or software, the functions described above, such as functionality described with reference to FIG. 4 and FIG. 5, may be stored as one or more instructions or code on a computer-readable medium. Examples include non-transitory computer-readable media encoded with a data structure and computer-readable media encoded with a computer program. Computer-readable media includes physical computer storage media. A storage medium may be any available medium that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), compact disc-read only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Disk and disc includes compact discs (CD), laser discs, optical discs, digital versatile discs (DVD), floppy disks and blu-ray discs. Generally, disks reproduce data magnetically, and discs reproduce data optically. Combinations of the above should also be included within the scope of computer-readable media.

[0057] In addition to storage on computer readable medium, instructions and/or data may be provided as signals on transmission media included in a communication apparatus. For example, a communication apparatus may include a transceiver having signals indicative of instructions and data. The instructions and data are configured to cause one or more processors to implement the functions outlined in the claims.

[0058] Although the present disclosure and certain representative advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure as defined by the appended claims. For example, although signals generated by a controller are described throughout as “high” or “low,” the signals may be inverted such that “low” signals turn on a switch and “high” signals turn off a switch. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the present disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.