METHOD FOR MANUFACTURING A HALL SENSOR
20170358736 · 2017-12-14
Assignee
Inventors
Cpc classification
H10B61/00
ELECTRICITY
H10N59/00
ELECTRICITY
G01R33/0052
PHYSICS
International classification
G01R33/00
PHYSICS
Abstract
A method for manufacturing a Hall sensor, an insulation layer being initially applied to a wafer including an ASIC or integrated into the wafer, a Hall layer, for example, made of InSb or another III-V semiconductor material, being situated thereon, and this Hall layer being at least sectionally recrystallized with the aid of a laser. The insulation layer may be porous or may include a cavity or reflective layer for thermal protection of the ASIC.
Claims
1-10. (canceled)
11. A Hall sensor, comprising: a wafer including an ASIC; an insulation layer provided for the wafer, the insulation layer being one of (i) applied to the wafer, or (ii) integrated into the wafer; and a Hall layer made of a III/V semiconductor material situated on the insulation layer, the Hall layer having been heated with the aid of a laser in such a way that it is at least sectionally recrystallized, whereby a mobility of charge carriers of the Hall layer was increased.
12. The Hall sensor as recited in claim 11, wherein the insulation layer is at least sectionally porous.
13. The Hall sensor as recited in claim 11, wherein the insulation layer includes at least one cavity.
14. A method for manufacturing a Hall sensor, comprising: providing a wafer including an ASIC; forming an insulation layer, the insulation layer being one of: (i) applied to the wafer, or (ii) integrated into the wafer; situating a Hall layer made of a III/V semiconductor material on the insulation layer; and heating the Hall layer with the aid of a laser in such a way that the Hall layer at least sectionally recrystallizes, whereby a mobility of charge carriers of the Hall layer was increased.
15. The method as recited in claim 14, wherein the insulation layer is formed as at least sectionally porous, the Hall layer being applied to the insulation layer.
16. The method as recited in claim 14, wherein the insulation layer is formed having at least one cavity, the Hall layer being applied to the insulation layer.
17. The method as recited in claim 14, wherein the entire Hall layer is heat treated with the aid of the laser.
18. The method as recited in claim 14, wherein the Hall layer is structured before the heat treatment with the aid of the laser in such a way that a detection structure for the Hall effect is formed.
19. The method as recited in claim 18, wherein only the detection structure for the Hall effect is heat treated with the aid of the laser.
20. The method as recited in claim 18, wherein the ASIC of the wafer is protected from radiation of the laser with the aid of a protective layer.
21. The method as recited in claim 20, wherein the protective layer is an aluminum layer.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0029]
[0030]
[0031]
[0032]
[0033]
[0034]
[0035]
[0036]
[0037]
DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS
[0038] The present invention provides for initially depositing a Hall layer on an arrangement including a wafer and an insulation layer at low deposition temperature (approximately 250° C. to approximately 400° C.) and subsequently temporarily irradiating the Hall layer using a laser, so that a recrystallization process thus takes place in the Hall layer and in this way the mobility of the charge carriers of the Hall layer is increased.
[0039]
[0040]
[0041]
[0042]
[0043] An alternative process sequence is indicated in
[0044]
[0045] To prevent laser radiation from being able to reach wafer 10 including the ASICs or the application-specific integrated electronic circuits beyond Hall layer 30 and these circuits thus possibly being damaged, a protective layer 50 or intermediate layer is situated in insulation layer 20 below Hall layer 30. Protective layer 50 may be formed, for example, as a reflective layer made of aluminum (“light protection shield”), which reflects harmful laser radiation into insulation layer 20.
[0046]
[0047]
[0048]
[0049] As a result, micromechanical structures may thus advantageously be coated using Hall layer 30. A design diversity for the Hall sensor element may thus advantageously be increased. Arbitrary combinations of insulation layer 20 shown in
[0050]
[0051] In a step 200, a wafer 10 including an ASIC is provided.
[0052] In a step 210, an insulation layer 20 is formed, which is applied to wafer 10 or is integrated into wafer 10.
[0053] In a step 220, a Hall layer 30 is applied to insulation layer 20.
[0054] In a step 230, finally heating of Hall layer 30 is carried out with the aid of a laser 40 in such a way that Hall layer 30 at least sectionally recrystallizes.
[0055] In summary, a method for manufacturing a Hall sensor and a Hall sensor thus manufactured are provided by the present invention, a Hall layer initially being deposited at low temperature on an insulation layer and then being post-treated using a laser for the purpose of increasing the charge carrier mobility. This is achieved by a recrystallization process inside the Hall layer, which is generated by the temporary heating of the laser, heating of the Hall layer taking place at least to the melting point of the Hall layer and preferably beyond it.
[0056] The arrangement of the Hall layer on a defined surface of the insulation layer supports that the temperature-sensitive application-specific electronic circuits or ASICs (for example, evaluation circuits for the Hall sensor) remain largely unimpaired. Furthermore, a simpler and flatter construction of the entire arrangement is thus supported, because the Hall element may be integrated completely into the sensor.
[0057] The present invention advantageously enables, for example, electrical compasses based on III-V semiconductor Hall sensors to be manufactured, which may be integrated into smaller packing units.
[0058] Those skilled in the art will also implement specific embodiments which are not described above, without deviating from the core of the present invention.