METHOD FOR MANUFACTURING DOUBLE-SIDED COOLING TYPE POWER MODULE AND DOUBLE-SIDED COOLING TYPE POWER MODULE

Abstract

The present disclosure provides a method for manufacturing a double-sided cooling type power module including separately patterning a bonding material on a base film into two regions, positioning a semiconductor chip on the patterned bonding material, transferring the patterned bonding material to one surface of the semiconductor chip by pressurizing the semiconductor chip, positioning the bonding material of the semiconductor chip on an upper electrode layer formed on an upper substrate to be in contact with the upper electrode layer, and sintering an upper bonding layer by pressurizing and heating the semiconductor chip. According to the present disclosure, it is possible to separately dispose the bonding material on each of gate and source electrode parts on an upper portion of the chip even without protrusion to directly bond the chip and the substrate.

Claims

1. A method for manufacturing a double-sided cooling type power module, the method comprising: separately patterning a bonding material on a base film into two regions; positioning a semiconductor chip on the patterned bonding material; transferring the patterned bonding material to a first surface of the semiconductor chip by pressurizing the semiconductor chip; positioning the bonding material of the semiconductor chip on an upper electrode layer formed on an upper substrate to be in contact with the upper electrode layer; and sintering an upper bonding layer formed of the bonding material transferred to the semiconductor chip by pressurizing and heating the semiconductor chip.

2. The method of claim 1, wherein the upper electrode layer has a first region and a second region separately formed to be spaced apart from each other.

3. The method of claim 2, wherein the positioning of the bonding material of the semiconductor chip to be in contact with the upper electrode layer includes positioning two regions of the bonding material to be in contact with the first region of the upper electrode layer and the second region of the upper electrode layer.

4. The method of claim 3, wherein the separated two regions of the bonding material are separately formed to correspond to a gate electrode part and a source electrode part of the semiconductor chip.

5. The method of claim 4, wherein the patterning removes a region surrounding the two regions of the bonding material.

6. The method of claim 4, further comprising: positioning a second surface of the semiconductor chip on a lower electrode layer formed on a lower substrate after the sintering of the upper bonding layer; and sintering a lower bonding layer interposed between the semiconductor chip and the lower electrode layer by pressurizing and heating the semiconductor chip.

7. A method for manufacturing a double-sided cooling type power module, the method comprising: positioning a bonding material on a base film on an upper electrode layer formed on an upper substrate to be in contact with the upper electrode layer; separately patterning the bonding material into two regions to transfer the bonding material to the upper electrode layer; positioning a first surface of the semiconductor chip on the patterned bonding material to be in contact with the patterned bonding material; and sintering an upper bonding layer formed of the bonding material transferred to the semiconductor chip by pressurizing and heating the semiconductor chip.

8. The method of claim 7, wherein the upper electrode layer has a first region and a second region separately formed to be spaced apart from each other.

9. The method of claim 8, wherein the separately patterning of the bonding material into two regions to transfer the bonding material to the upper electrode layer includes positioning the two regions of the bonding material to correspond to the first region of the upper electrode layer and the second region of the upper electrode layer.

10. The method of claim 9, wherein the separated two regions of the bonding material are separately formed to correspond to a gate electrode part and a source electrode part of the semiconductor chip.

11. The method of claim 10, wherein the separately patterning of the bonding material into two regions to transfer the bonding material to the upper electrode layer removes a region surrounding the two regions of the bonding material.

12. The method of claim 10, further comprising: positioning a second surface of the semiconductor chip on a lower electrode layer formed on a lower substrate after the sintering the upper bonding layer; and sintering a lower bonding layer interposed between the semiconductor chip and the lower electrode layer by pressurizing and heating the semiconductor chip.

13. A double-sided cooling type power module comprising: a semiconductor chip; an upper substrate bonded to an upper surface of the semiconductor chip; and a lower substrate bonded to a lower surface of the semiconductor chip; wherein the semiconductor chip is directly bonded to an upper electrode formed on the upper substrate.

14. The double-sided cooling type power module of claim 13, wherein a bonding material interposed between an upper surface of the semiconductor chip and the upper electrode is separately patterned into two regions.

15. The double-sided cooling type power module of claim 14, wherein the upper electrode layer has a first region and a second region separately formed to be spaced apart from each other, and the two regions of the bonding material are in contact with the first region of the upper electrode layer and the second region of the upper electrode layer.

16. The double-sided cooling type power module of claim 15, wherein the separated two regions of the bonding material are separately formed to correspond to a gate electrode part and a source electrode part of the semiconductor chip.

17. The double-sided cooling type power module of claim 16, wherein a groove is formed in a surface that is not bonded to the upper bonding layer of the upper electrode layer and adjacent to the upper bonding layer.

18. The double-sided cooling type power module of claim 17, wherein the depth of the groove is 50 .Math.m or more, and a linear distance in a surface direction from the edge of the groove to the edge of the semiconductor chip is 100 .Math.m or more.

Description

BRIEF DESCRIPTION OF THE FIGURES

[0043] FIGS. 1 and 2 show an example of a conventional power module.

[0044] FIGS. 3, 4, 5, 6, 7, and 8 sequentially show a process of manufacturing the power module of FIG. 2.

[0045] FIG. 9 shows a double-sided cooling type power module according to an exemplary embodiment of the present disclosure.

[0046] FIGS. 10, 11, 12, 13, 14, 15, 16, 17, 18, and 19 sequentially show a process of manufacturing a double-sided cooling type power module according to a first exemplary embodiment of the present disclosure.

[0047] FIGS. 20, 21, 22, 23, and 24 sequentially show a process of manufacturing a double-sided cooling type power module according to a second exemplary embodiment of the present disclosure.

[0048] FIG. 25 shows a double-sided cooling type power module according to an application exemplary embodiment of the present disclosure.

DETAILED DESCRIPTION

[0049] To fully understand the present disclosure, the operational advantages of the present disclosure, and the objects achieved by practicing the present disclosure, reference should be made to the accompanying drawings showing preferred exemplary embodiments of the present disclosure and the contents described in the accompanying drawings.

[0050] In describing the preferred exemplary embodiments of the present disclosure, a description of well-known technologies or repetitive descriptions that can unnecessarily obscure the gist of the present disclosure will be reduced or omitted.

[0051] FIG. 9 shows a double-sided cooling type power module according to an exemplary embodiment of the present disclosure, and FIGS. 10 to 19 sequentially show a process of manufacturing a double-sided cooling type power module according to a first exemplary embodiment of the present disclosure.

[0052] Hereinafter, a double-sided cooling type power module according to an exemplary embodiment of the present disclosure and a method for manufacturing the double-sided cooling type power module according to a first exemplary embodiment will be described with reference to FIGS. 9 to 19.

[0053] To implement a double-sided cooling type power module, the present disclosure presents a thin module structure that removes a thick spacer or a protrusion structure disposed for the electrical and thermal connection between an upper portion of a chip and an upper substrate, and directly connects an upper electrode part of the chip and an electrode part of the upper substrate.

[0054] To remove the protrusion that performs a transfer function of a bonding material and directly bond the upper portion of the chip and the electrode part of the upper substrate in the conventional module structure, a method capable of directly transferring an Ag material for bonding the chip and the substrate to an upper surface of the chip or the electrode part of the upper substrate is disclosed. There are two methods presented as the transfer method, in which one is a method for removing the parts unnecessary for bonding of the bonding material existing in the Ag film using a block, and then transferring the remaining bonding material remaining in the film to the upper portion of the chip. The other is a method for transferring the bonding material to the upper substrate by applying heat and pressure to a protrusion block on the rear surface of the Ag film for bonding.

[0055] As described above, when the bonding material can be separately disposed on each of the gate and source electrode parts existing on the upper portion of the chip, the chip and the substrate can be directly bonded even when there is no protrusion.

[0056] When the substrate and the chip can be directly bonded without protrusion, a current and heat delivery path can be shortened, thereby improving the characteristics of the module and eliminating the occurrence of a problem caused by forming the protrusion in advance.

[0057] To this end, in the double-sided cooling type power module according to the exemplary embodiment of the present disclosure, as shown in FIG. 1, ceramic substrates 21, 31 are stacked above and below a semiconductor chip 10, respectively, and directly bonded to electrode layers 22, 32 formed on the ceramic substrates 21, 31 without spacer by bonding layers (Ag sintering layers) 40, 50.

[0058] A method for manufacturing the double-sided cooling type power module according to the first exemplary embodiment is a method for removing the parts unnecessary for bonding of the bonding material existing in the Ag film using the block, and then transferring the remaining bonding material remaining in the film to the upper portion of the chip.

[0059] First, to form an upper bonding layer 40 as shown in FIG. 10, the block of a certain shape is disclosed above the bonding material 41 coated on a base film, and as shown in FIG. 11, the block moves downward to be in contact with the bonding material 41 and is pressurized and heated.

[0060] The block is a block patterned in the certain shape, and has a protrusion (b1) protruding from a flat plate as shown in FIG. 11, and the protrusion (b1) partitions into two regions, and the two regions (s1, s2) are separately formed to correspond to the gate electrode part and the source electrode part of the semiconductor chip 10.

[0061] Therefore, as shown in FIG. 12, the bonding material 42 in the region corresponding to the protrusion (b1) of the block is transferred to the block, and upper bonding layers 40-1, 40-2 corresponding to the two regions (s1, s2) of the block and separated into two regions remain on the base film.

[0062] Next, as shown in FIG. 13, the semiconductor chip 10 is positioned by using the chuck above the patterned upper bonding layer 40, and as shown in FIG. 14, the semiconductor chip 10 moves downward to be in contact with the upper bonding layer 40 and is pressurized and heated.

[0063] Next, the upper bonding layers 40-1, 40-2 are transferred to the semiconductor chip 10 as shown in FIG. 15.

[0064] Next, as shown in FIG. 16, the semiconductor chip 10 is disposed on the upper substrate 21 having the upper electrode layers 22 formed on both surfaces thereof, and the upper bonding layers 40-1, 40-2 face the upper substrate 21 side.

[0065] Here, the upper electrode layer 22 has a first region 22-1 and a second region 22-2 separately formed to be spaced apart from each other, and as shown in FIG. 17, the semiconductor chip 10 is disposed to move downward so that the two regions of the upper bonding layer 40 are in contact with the first region 22-1 and the second region 22-2, respectively.

[0066] In addition, as shown in FIG. 18, the upper bonding layer 40 is sintered by pressurizing the upper portion of the semiconductor chip 10 using a heating jig.

[0067] Likewise, the power module shown in FIG. 9 is manufactured by positioning a lower surface of the semiconductor chip 10 on a lower electrode layer 32 formed on a lower substrate 31 with a lower bonding layer 50 interposed therebetween, and pressurizing a lower portion of the semiconductor chip 10 to sinter the lower bonding layer 50.

[0068] In implementing the double-sided cooling type module, as the structure of the module proposed by the present disclosure, proposed is the thin power module structure in which the upper portion of the chip is directly bonded to the substrate, thereby eliminating the reduction in the heat exchange performance due to the presence of the structure such as the spacer or the protrusion and having the cooling part and the chip close to each other.

[0069] This is a structure of the power module composed of two or more transistors capable of ON/OFF control, and is a double-sided cooling type power module in which insulating circuit substrates exist above and below the chip, respectively.

[0070] As a structure in which the gate electrode part and the source electrode part on the upper portion of the chip are directly bonded to the electrode part of the upper substrate, the bonding method can use a process such as Ag sintering or soldering, and the present disclosure proposes a pressurized Ag sintering bonding in which there is no spread of the bonding material and no high-temperature defect issue.

[0071] Next, FIGS. 20 to 24 sequentially show a process of manufacturing a double-sided cooling type power module according to a second exemplary embodiment of the present disclosure.

[0072] A method for manufacturing a double-sided cooling type power module according to a second exemplary embodiment is a method for transferring the bonding material to the upper substrate by applying heat and pressure to the protrusion block on the rear surface of the Ag film for bonding.

[0073] First, to form the upper bonding layer 40 as shown in FIG. 20, the bonding material 41 coated on the base film is disposed above the upper substrate 21 formed with the upper electrode layer 22 to face the upper substrate 21 side, a block of a certain shape is disposed above the base film, and as shown in FIG. 21, the block moves downward so that the block, the bonding material 41, and the upper substrate 21 are in contact with one another, and therefore, the block is pressurized and heated.

[0074] The block is a block patterned in the certain shape, and has the protrusion (b2) of two regions protruding from the flat plate and spaced apart from each other as shown in FIG. 21, and the two regions are separately formed to correspond to the gate electrode part and the source electrode part of the semiconductor chip 10.

[0075] Here, the upper electrode layer 22 also has the first region 22-1 and the second region 22-2 separately formed to be spaced apart from each other, and the two regions of the block correspond to the first region 22-1 and the second region 22-2, respectively.

[0076] Therefore, as shown in FIG. 22, the region corresponding to the protrusion of the block is transferred to the upper electrode layer 22 to form the upper bonding layers 40-1, 40-2, and the bonding material 42 not transferred remains on the base film.

[0077] Next, as shown in FIG. 23, the semiconductor chip 10 is disposed by using the chuck above the upper bonding layer 40 separately patterned into two regions, and as shown in FIG. 24, the semiconductor chip 10 moves downward to be in contact with the upper bonding layers 40-1, 40-2 and is pressurized and heated.

[0078] Then, as in FIGS. 16 and 17, the power module shown in FIG. 9 is manufactured by sequentially pressurizing the upper substrate 21 and the lower substrate 31 to sinter the upper bonding layers 40-1, 40-2 and the lower bonding layer 50.

[0079] Next, FIG. 25 shows a double-sided cooling type power module according to an application exemplary embodiment of the present disclosure, and only the parts different from the aforementioned exemplary embodiment will be described.

[0080] When the upper portion of the chip and the upper electrode layer 22 formed on the upper substrate 21 are bonded, a thin bonding part is formed between the chip 10 and the substrate 21 and therefore, there can occur an insulation problem such as causing a short circuit between the edge of the chip 10 and the electrode layer 22 of the upper substrate 21. To prevent such a problem, according to the application exemplary embodiment, a groove structure having a step is disposed around the electrode layer 22 of the upper substrate 21 bonded to the chip 10, thereby securing a distance at which the insulation can be possible between the electrode layer 22 of the upper substrate and the edge of the chip 10.

[0081] In other words, a groove 23 is formed in the upper electrode layer 22 adjacent to the upper bonding layer 40, and the groove 23 can have a square or circular cross section.

[0082] For a general epoxy molding compound (EMC) material, the characteristic of a dielectric breakdown strength is a value of about 40 V/.Math.m, and therefore, the insulation of about 1000 V is possible based on the thickness of the pressurized sintered bonding part of 25 .Math.m, which is not suitable for a withstand voltage of 1200 V or more.

[0083] Therefore, it is necessary to widen the gap so that the thickness of the sintered bonding part or more can be maintained between the electrodes, and to secure the gap so that the insulation of 2000 V or more can be secured assuming the EMC filling between the edge of the chip 10 and the electrode layer 22 of the upper substrate 21. To this end, according to this proposal, it is possible to secure the insulation characteristic by disposing the groove structure having the step around the electrode part of the upper substrate bonded to the chip, and the depth of the groove 23 can vary depending upon the difference in the characteristics of the insulating material such as EMC, but it is preferable to have the depth of 50 .Math.m or more at which the insulation of 2000 V or more can be secured, and a dent is formed at a position of 100 .Math.m or more at which the insulation of the edge of the chip 10 can be maintained even on the upper surface of the chip 10.

[0084] In other words, the length from the edge of the groove 23 to the edge of the upper bonding layer 40 to the edge of the semiconductor chip 10 is preferably 100 .Math.m or more.

[0085] Meanwhile, the upper substrate 21 and the lower substrate 31 can be electrically connected to constitute the electrical circuit of the module, and this connection can be implemented by disposing the structure such as a chip element or a spacer. For the bonding for this, a process such as Ag sintering or soldering can be used.

[0086] In addition, a power terminal can be connected to the upper or lower substrate by sintering bonding, soldering, or welding, and a signal pin terminal can be bonded to the substrate or connected between a signal terminal and the substrate by wire bonding, etc.

[0087] As described above, the present disclosure has been described with reference to the illustrative drawings, but is not limited to the described exemplary embodiment, and it is apparent to those skilled in the art that various modifications and changes can be made without departing from the spirit and scope of the present disclosure. Therefore, these modifications or changes should be said to belong to the claims of the present disclosure, and the scope of the present disclosure should be interpreted based on the appended claims.