METHOD AND SYSTEM FOR IMPLEMENTING ONE-WIRE PROGRAMMABLE CIRCUIT

Abstract

The present disclosure relates to method and system of implementing one wire programmable circuit by using the same terminal OUT as both main circuit output terminal and the digital I/O interfacing terminal of the circuit. The present invention overcomes the shortcoming of prior arts and does not require the circuit to be powered down first and then powered up again each time the circuit is switched between interfacing mode (read/write/program OTP) and the normal output mode, therefore shorten the time of interfacing with the OTP as well as simplified the interfacing system used to read/write/program the OTP. The present invention also enables the possibility to put the no longer required system clock into sleeping mode after the OTP has been programmed, and has the advantages of reducing system power consumption as well as system noise due to the existing of digital clock.

Claims

1. A one wire programmable circuit, comprising a main circuit module, an OTP module that controls the main circuit module, an OTP controlling module that controls the read/write/programming of OTP, one wire to multi-wire converter which communicates with the OTP controlling module, a first analog switch S1, a second analog switch S2 and a third analog switch S3 that are controlled by a bit OTPL in the OTP, a resistor R1 that is connected in parallel with the first analog switch S1 and a system clock that is controlled by the third analog switch S3; one of the terminal of the parallel connection of the resistor R1 and the first analog switch S1 is connected to a terminal Vout of the main circuit module; the other terminal of the parallel connection is connected to a terminal OUT; the data terminal of the one wire to multi-wire converter can be connected to the OUT terminal through the second analog switch S2 or connected to the OUT terminal directly; the OPT controlling module is connected to an OTP module, and control a setting of various parameters in the circuit through the OTP module.

2. The one wire programmable circuit of claim 1, wherein the bit OTPL is different from other bits in the OTP; the status of the OTPL is not affected by the read/write of the data from/to the OTP; the output state of the OTPL is changed only after the OTPL is programmed (change from 1 to 0 or 0 to 1); and when programming the OTP, the bit OTPL is the last bit that is programmed; the output state of OTPL is used to control the first analog switch S1, the second analog switch S2 and the third analog switch S3 and the status of the OTP control module.

3. The one wire programming circuit of claim 2, wherein when the OTPL has been programmed, the output of OTPL changes the first analog switch S1 from open to close; the main circuit output Vout connected to terminal OUT through the first analog switch S1.

4. The one wire programmable circuit of claim 2, wherein the OTP controlling module controls various parameters before OTPL is programmed; after the OTPL has been programmed, the various parameters of the circuit are controlled by the output state of OTP module; the OTP is programmed bit by bit which controlled by the OTP control module.

5. The one wire programmable circuit of claim 2, wherein after the OTPL has been programmed, the output state of OTPL change the second analog switch S2 from close to open, therefore, after the OTPL has been programmed, the terminal OUT will only be connected to main circuit module and disconnected from those circuits used to read/write/program the OTP.

6. The one wire programmable circuit of claim 2, wherein when the system clock (OSC) is not needed in the system after the OTP has been programmed, the system clock (OSC) can be put into sleeping mode by the changed output state of OTPL that controls the third analog switch S3.

7. The one wire programmable circuit of claim 1, wherein there is a time delay between the moment the bit OTPL finish programming and the time it outputs its signal to control the first analog switch S1, the second analog switch S2 and the third analog switch S3 as well as the OTP controlling module.

8. The one wire programmable circuit of claim 1, wherein the external interface circuit include a bi-direction I/O with pull up resistor, which is connected to the terminal OUT through a fourth analog switch S4 and measurement equipment/circuit with high input impedance, which is connected to terminal OUT using a fifth analog switch S5; when external interface circuit execute program to read/write/program the OTP, the fourth analog switch S4 is closed and the fifth analog switch S5 is open; if the output of the main circuit module needed to be measured, the fourth analog switch is open and the fifth analog switch S5 is closed.

9. The one wire programmable circuit of claim 1, wherein the OTP can be replaced by EEPROM, MTP or Flash.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] FIG. 1 is the block circuit diagram of one wire programmable circuit described in present invention

[0024] FIG. 2 is the flow chart of using the one wire programmable circuit described in present invention

[0025] FIG. 3 is the block circuit diagram of the one wire programmable circuit described in the present invention whereas the system clock is powered down by the close of the third analog switch S3 after the bit OPTL is programmed.

[0026] FIG. 4 is the block circuit diagram of the one wire programmable circuit described in the present invention whereas the programmable port is disconnected from the terminal OUT by the close of the second analog switch S2 after the bit OPTL is programmed.

DESCRIPTION OF THE COMPONENTS IN THE DRAWINGS

[0027] 1. one wire programming Integrated Circuit; [0028] 3: External Interface Circuit [0029] 11. Main circuit module; [0030] 12. OTP module including the last bit of OTP: OTPL [0031] 13. OTP controlling module; [0032] 14. One wire to multi wire converter [0033] 15. System Clock (OSC); [0034] 16: Circuit Output Terminal (OUT) [0035] 17: Resistance R1; [0036] 18. The first analog switch S1; [0037] 19: Main Circuit Output Vout; [0038] 20. One wire terminal of the one wire to multi wire converter(data) [0039] 21. The second analog switch with inverter S2; [0040] 22. The third analog switch S3; [0041] 31. The fourth analog switch S4; [0042] 32. The fifth analog switch S5; [0043] 33. Pull up resistor R2; [0044] 34. Bi-directional digital Input/Output (I/O); [0045] 35. Measurement Equipment/Circuit with high input impedance.

DETAILED DESCRIPTION OF THE PRESENT INVENTION

[0046] Please refer to the accompanying drawings. It should be noted that the drawings provided in the embodiments only schematically describe the basic ideas of the present invention, so the drawings only show the components related to the present invention, but are not plotted according to the number, shape and size of the components in actual implementation. The configuration, number, and proportion of the components in actual implementation may be changed at will and the layout of the components may be more complex.

[0047] The detailed implementation manners of the present invention are further described in detail below with reference to accompanying drawings.

[0048] FIG. 1 is the block diagram of one wire programmable circuit described in current invention, it includes the one wire programmable Integrated Circuit (1) and external Programming Interface (3).

[0049] The one wire programmable circuit includes main circuit module (11), One time programmable (OTP) memory (12) that control the main circuit module, OTP controlling module (13) that control the read/write/programming of the OTP; One wire to multi-wire converter (14) that communicate data between terminal OUT and OPT controlling module (13); The first analog switch S1 which is controlled by the bit OTPL in OTP, Resistor R1 (17) that is connected parallel with the first analog switch S1 (18), System Clock (OSC) (15); One terminal of the R1/S1 parallel connection is connected to Main Circuit Module terminal Vout (19), the other terminal of the R1/S1 parallel connection is connected to OUT terminal (16); the one wire terminal data (20) of the one wire to multi-wire converter (14) is connected to OUT terminal (16), the other terminal of the one wire to multi-wire converter is connected to the OTP controlling module (13); OTP controlling module (14) is connected with OTP module (12) and through the OTP control various parameters in the circuit.

[0050] The external interface circuit 3 includes: bi-directional I/O port (34) with pull up resistor R2, the I/O port (34) is connected through the fourth analog Switch S4 (31), to OUT terminal of the one wire programmable circuit 1. Measurement Instrument/Measurement Circuit (35) with high input impedance is connected to OUT terminal (16) of one wire programmable circuit 1 through the fifth analog switch S5 (32).

[0051] As illustrated in FIG. 1, connected the one wire programmable circuit with the external interfacing circuit, power up both systems. For read/write the data from/to the OTP, the fourth analog switch S4 (31) is close, the fifth analog switch S5 (32) is open, the external programming I/O port (34) executes the program to read/write OTP data. Since OTPL is still not programmed, the first analog switch S1 (18) is open, OUT terminal (16) is connected through R1 (17) to main circuit Vout Terminal (19). Since R2<<R1, therefore, the voltage at the terminal data (20) will not be influenced by Vout's voltage, but follow the change of the voltage at the bi-directional I/O port (34). The one wire to multi-wire converter (14) and the OTP controlling module (13) complete the read/write of data from the external interfacing circuit to the OTP.

[0052] When measurement of the voltage output at the main circuit module is needed, the fourth analog switch S4 (31) is open and fifth analog switch S5 (32) is closed, the measurement instrument/Measurement Circuit (35) measure the voltage output at OUT terminal (16). Since R1<<Input impedance of the measurement Instrument/Circuit (35), the voltage of terminal OUT (16) is equal to the voltage at terminal Vout (19).

[0053] FIG. 2 illustrates the flow chart of steps to find the right OTP code and program the OTP to make the circuit met the specification. A set of test and measurement procedure is carried out and the setting of OTP is calculated according to the specification needed by the circuit. After the right codes are found, close the fourth analog switch S4 (31) and Open the fifth analog switch S5 (32), the external interfacing circuit execute the program to program the OTP through one wire to multi-wire module (14) and OTP controlling module (13), and the calculated OTP setting is programmed into the OTP.

[0054] After the OTP has been programmed, the last bit of the OTP, i.e. OTPL's output state is changed (from 0 to 1 or from 1 to 0) after certain delay time. The change of OTPL's state changes the first analog switch S1 (18) from Open to Close, R1 (17) is short-circuit by the first analog switch S1 (18), Vout terminal (19) is connected to OUT terminal (17) by S1. Since S1 (18) has low resistance, therefore, voltage at OUT terminal (16) equal to voltage of Vout terminal (19) at the main circuit module.

[0055] Measure the output at the OUT terminal and verify that all the specifications are met after the OTP has been programmed.

[0056] After finishing the above procedure, the calculated setting of OTP is programmed into the OTP. The output of OTPL bit set the circuit to operate in normal output mode, the parameters of the circuit is controlled by the programmed OTP. The system in the present invention realize using the same terminal OUT (16) as both the output of main circuit module and the interfacing port of the OTP, thus realizing the one wire programming system.

[0057] FIG. 3 shows another preferred solution of present invention, for systems that do not require a system clock, such as programmable amplifier, programmable potentiometer/Capacitor, the out state of the OTPL after it is programmed can be used to change the status of the third analog switch S3 (22) and put the system clock into sleeping mode, thus reduce the system power consumption as well as system noise due to the digital clock.

[0058] FIG. 4, shows yet another preferred solution of the present invention, the output state of the programmed OPTL's open the second analog switch S2 (21) after go through the inverter, thus disconnects the one wire to multi-wire module (14) from the terminal OUT (16).

[0059] It should be noted that the embodiments of the present invention are described in the above through specific examples, and those with ordinary skill in the art can easily understand other advantages and effects of the present invention according to the content disclosed in the specification. The present invention may also be implemented or applied through other different specific examples, and various modifications and variations may be made to the details in the specification on the basis of different opinions and applications without departing from the principle of the present invention.