SERIES OF COUPLED SYNCHRONOUS OSCILLATORS

20170346443 · 2017-11-30

Assignee

Inventors

Cpc classification

International classification

Abstract

An integrated circuit includes at least two identical, synchronous and independent oscillator circuits that are coupled one to one in parallel with each other at homologous oscillating nodes of the respective oscillator circuits. The coupling in parallel is made using at least one coupling track that is configured so as to not introduce any phase shift or to introduce a very small phase shift.

Claims

1. An integrated circuit, comprising: a series of at least two substantially identical, synchronous and independent oscillator circuits; wherein said series of at least two substantially identical, synchronous and independent oscillator circuits are coupled one to one in parallel at homologous oscillating nodes of the respective oscillator circuits using at least one coupling track.

2. The integrated circuit according to claim 1, wherein a length of said at least one coupling track is less than or equal to one twentieth of a corresponding wavelength at a frequency of oscillation of the at least two substantially identical, synchronous and independent oscillator circuits.

3. The integrated circuit according to claim 1, wherein an impedance of said at least one coupling track is less than one tenth of an impedance of one of said at least two substantially identical, synchronous and independent oscillator circuits.

4. The integrated oscillator circuit according to claim 1, wherein said at least one coupling track is distinct from tracks of each of said at least two substantially identical, synchronous and independent oscillator circuits.

5. The integrated oscillator circuit according to claim 1, wherein each of said at least two substantially identical, synchronous and independent oscillator circuits comprises an individual output.

6. The integrated circuit according to claim 1, produced on a silicon substrate.

7. The integrated circuit according to claim 1, wherein a structure of each of the series of at least two substantially identical, synchronous and independent oscillator circuits is identical and configured so that a given number of juxtaposed oscillator circuits, forming a group, fits around a node point shared by each oscillator circuit of said group, in the manner of a mosaic with repeated patterns, and wherein the oscillator circuits are coupled one to one to said node point.

8. The integrated circuit according to claim 7, further comprising at least two groups of juxtaposed oscillator circuits, wherein said homologous oscillating nodes of the oscillator circuits of each group are coupled one to one via respective metal transmission lines.

9. The integrated circuit according to claim 7, wherein each of the oscillator circuit in said group has a circuit layout having an isosceles triangular shape and wherein node point is a co-located apex point of the isosceles triangular shapes.

10. The integrated circuit according to claim 1, wherein said series of at least two substantially identical, synchronous and independent oscillator circuits comprises between 2 and 32 oscillator circuits.

11. The integrated circuit according to claim 1, in which each oscillator circuit is configured to oscillate at a frequency of between 57 GHz and 86 GHz.

12. An integrated circuit, comprising: a first oscillator circuit including a first pair of oscillating signal nodes; a second oscillator circuit including a second pair of oscillating signal nodes; wherein the first and second oscillator circuit are substantially identical, synchronous and independent oscillator circuits; a pair of coupling tracks that directly connect corresponding oscillating signal nodes of the first and second oscillator circuits such that the first and second oscillator circuits are connected in parallel with each other.

13. The integrated circuit of claim 12, wherein each oscillating circuit of the first and second oscillating circuit has a circuit layout having an isosceles triangular shape, each isosceles triangular shape having a pair of isometric sides, and wherein one isometric side of the first oscillating circuit is adjacent and parallel to one isometric side of the second oscillating circuit.

14. The integrated circuit of claim 13, wherein the pair of coupling tracks are provided for connection of first and second oscillating circuits at co-located apex points of the isosceles triangular shapes for the first and second oscillating circuits.

15. The integrated circuit of claim 12, wherein a length of each track in said pair of coupling tracks is less than or equal to one twentieth of a corresponding wavelength at a frequency of oscillation of the oscillator circuits.

16. The integrated circuit of claim 12, wherein an impedance of each track of said pair of coupling tracks is less than one tenth of an impedance of one of said oscillator circuits.

17. The integrated circuit of claim 12, wherein each oscillating circuit of the first and second oscillating circuit has a circuit layout having an isosceles triangular shape, each isosceles triangular shape having a pair of isometric sides, and wherein the pair of coupling tracks are provided for connection of first and second oscillating circuits at co-located apex points of the isosceles triangular shapes for the first and second oscillating circuits.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Other advantages and features of the invention will become apparent upon examining the detailed description of completely non-limiting embodiments and the appended drawings, in which:

[0042] FIG. 1 is a circuit diagram of an exemplary electronic ultra-low phase noise oscillator circuit;

[0043] FIG. 2 schematically shows an integrated circuit architecture;

[0044] FIG. 3 is a circuit diagram of another exemplary ultra-low phase noise oscillator electronic circuit;

[0045] FIG. 4 schematically shows another oscillator architecture; and

[0046] FIG. 5 schematically shows another oscillator architecture.

DETAILED DESCRIPTION OF THE DRAWINGS

[0047] FIG. 1 shows a circuit diagram of an exemplary electronic ultra-low phase noise oscillator circuit according to one embodiment, comprising a series of two substantially identical voltage-controlled oscillator circuits VCO.

[0048] The resonant wavelength of the oscillators VCO is, for example, in the millimeter range.

[0049] These VCO oscillators comprise a resonant circuit OSC comprising an inductive element LOSC biased at a midpoint by a voltage VbiasBase. The terminals of the inductive element LOSC are connected to the bases of two bipolar transistors Tb that transmit, to their emitters, an amplified signal of the oscillations across the terminals of the inductive element LOSC. The collectors of the two bipolar transistors Tb are connected to the supply voltage VDD and the low impedance of their emitters allows them to isolate the oscillating signal from external variations that could otherwise be applied to the output terminals OUT.

[0050] Furthermore, the resonant circuit OSC comprises capacitive elements COSC in parallel with the inductive elements LOSC and that are connected to a pair of NMOS varactors VN1 that are biased so as to be depleted or enhanced, allowing two different frequency bands to be attained.

[0051] The varactors are biased, on the one hand, at a voltage VbiasVar via the resistors RVN and, on the other hand, by a signal Coarse.

[0052] Another, similar pair of varactors VN2 is controlled by the same signals. These varactors are connected between the emitters of the transistors Tb and terminals of a choke Lchoke.

[0053] The choke Lchoke allows variations in a bias current of the oscillator circuit VCO, delivered by a current mirror regulated by a reference current Iref, to be attenuated.

[0054] A capacitor Cfb connected between the emitter and the base of the transistor Tb in feedback allows a fraction of the output voltage OUT to be injected into the base of the transistor Tb, thus allowing the oscillations to be initiated and sustained.

[0055] A transformer TRAN comprises, in the conventional manner, two interlinked coils forming a primary circuit and a secondary circuit, the coil of the primary circuit being the coil LOSC of the resonant circuit OSC.

[0056] The secondary circuit of the transformer TRAN comprises an inductive element that is ground biased at its midpoint and coupled to the inductive element LOSC.

[0057] Elements CV with variable capacitance, typically PN junction diodes, comprising a control terminal Vtune, are coupled to the resonant circuit OSC via the transformer TRAN, allowing the voltage Vtune to be controlled independently of the voltage VbiasBase.

[0058] Wires 1a, 1b represent, respectively, a connection between oscillating nodes N1a and a connection between nodes N1b of each oscillator circuit VCO. The impedance of the connections 1a, 1b is negligible compared to the impedance of the resonant circuit and they may be considered to be short circuits. The impedance of the resonant circuit is, for example, of the order of a few hundred ohms, and the impedance of the connections 1a and 1b is, for example, lower than or equal to a few tens of ohms.

[0059] The oscillating nodes N1a are each located at one and the same position in the respective oscillator circuits VCO, and are thus referred to as being homologous; the same applies to the oscillating nodes N1b.

[0060] In this embodiment, the homologous oscillating nodes are located in the voltage control stage CV.

[0061] As a variant, the homologous oscillating nodes may be located, for example, on the outputs OUT of the respective oscillating circuits VCO, and the connections between the oscillating nodes N2a and N2b of each circuit VCO are then represented by the wires 2a and 2b.

[0062] As another variant, the homologous oscillating nodes may be located, for example, at the terminals of the primary circuit of the transformer TRAN of the respective oscillating circuits VCO, and the connections between the oscillating nodes N3a and N3b of each circuit VCO are then represented by the wires 3a and 3b.

[0063] More generally, the homologous oscillating nodes are located in a similar position in the respective oscillator circuits VCO, and carry the oscillating signal delivered by the resonant circuits OSC.

[0064] This type of independent oscillator VCO assembly, described here without limitation, provides a high level of performance, especially in terms of phase noise and frequency range, but of course this is applicable to any other type of LC-resonator-based oscillator circuit.

[0065] Stated otherwise, a series of two oscillator circuits VCO has been coupled via parallel connections to homologous oscillating nodes, allowing the phase noise of each of the oscillators to be decreased, while moreover being able to operate completely independently as if there were no coupling between them.

[0066] FIG. 2 schematically shows an advantageous integrated circuit architecture.

[0067] This representation corresponds to a top view of an integrated circuit IC formed in and on a semiconductor substrate SC, advantageously made of silicon, and, for example, in BiCMOS (bipolar and CMOS) technology.

[0068] By way of indication, the area of such a structure is of the order of 1 mm by 1 mm, and the various components are in this instance shown substantially to scale.

[0069] This architecture comprises a group GR of four voltage-controlled oscillators VCO which are substantially identical to one another and correspond to the oscillator circuits VCO of FIG. 1.

[0070] Each oscillator VCO takes the form of an isosceles triangle combined with a rectangle along its base. Thus, the four oscillators of the group GR are juxtaposed along their isometric sides so as to fit together precisely, forming a substantially square structure.

[0071] Each oscillator VCO comprises a resonant circuit OSC, whose coil LOSC is interlinked with a coil of the voltage control stage in the transformer TRAN.

[0072] For example, bipolar transistors and varactors are positioned in a stage, referred to as an output stage OUTP, located between two chokes Lchoke.

[0073] Power supply decoupling capacitors Cdec, commonly used and not shown in FIG. 1, are positioned on either side of the resonant circuit OSC and of the transformer TRAN so as to occupy the area not occupied by the oscillators themselves.

[0074] The architecture shown corresponds to the embodiment of FIG. 1 in which the homologous oscillating nodes are located in the voltage control stage CV, with reference to the connections 1a and 1b and to the nodes N1a and N1b.

[0075] These connections 1a and 1b are made by coupling tracks PLZ of small length, for example of less than about a hundred micrometers.

[0076] The length of the coupling tracks PLZ is more generally less than or equal to one twentieth of the corresponding wavelength of the frequency of oscillation of an oscillator VCO, said wavelength potentially being in the millimeter range.

[0077] When considering the length of the coupling tracks, the propagation characteristics of said coupling tracks may be taken into account. Such a length is usually referred to by the term electrical length.

[0078] The coupling tracks PLZ are connected to one another at a point located at the intersection of the four oscillator VCO structures of the group GR, which point is referred to as a node point PN, and comprises co-located apex points of the isosceles triangular layout shapes for the oscillators.

[0079] The node point PN comprises, for example, sections of metal track to which the respective metal tracks PLZ are connected together.

[0080] Thus, in this embodiment, referred to as being of centroid type, the length of the metal tracks PLZ is minimized, allowing losses to be minimized and parasitic capacitance with the substrate SC to be limited.

[0081] Furthermore, in this embodiment, the connections 1a, 1b formed by the metal tracks PLZ may be considered to be short circuits, i.e. connections whose impedance is negligible compared to the impedance of an oscillator circuit VCO, or, more specifically, less than 10% of the latter.

[0082] Consequently, the connections 1a, 1b formed by the metal tracks PLZ introduce very little or even no phase shift between the oscillating signals delivered by each oscillator circuit VCO thus coupled, which therefore operate synchronously without requiring additional tuning.

[0083] FIG. 3 shows a circuit diagram of another exemplary ultra-low phase noise oscillator electronic circuit, comprising a series of four substantially identical oscillator circuits VCObis.

[0084] One oscillator circuit VCObis is described below.

[0085] An inductive element L1-L2, supplied with a voltage VDD at a midpoint allows an oscillating signal to be generated across its terminals, which are connected to bipolar transistors Q1, Q2 via their collectors.

[0086] The bipolar transistors Q1, Q2 allow the oscillations to be sustained by presenting a negative resistance to the circuit composed of all of the passive inductive and capacitive elements that are located on the collector side of said transistors.

[0087] Other bipolar transistors QM1, QM2 form a current mirror, and a current generator Iref regulates the bias current of the oscillator circuit, by means of this current mirror, which bias current is applied to a node connecting the emitters of the transistors Q1, Q2.

[0088] A capacitive bridge comprising capacitive elements CB1, CB2 that are connected between the base of each of the transistors Q1, Q2 and the collector of the other, respectively, allows, with the base capacitances of said transistors Q1, Q2, the amplitude of the oscillations on said bases to be limited.

[0089] The bases of the transistors Q1, Q2 are moreover biased via resistors RB1, RB2 to a base potential Vbiasbase.

[0090] Varactors formed by MOS transistors M1/M2 are connected via their gates to the collectors of the respective transistors Q1, Q2, via respective capacitive decoupling elements CS1, CS2. The varactors M1/M2 are biased so as to be depleted, or enhanced, on the one hand via the resistors RS1, RS2 by a voltage Vbias1 on their gate and, on the other hand, by a voltage VbandSelect, and allow two different frequency bands to be attained.

[0091] Capacitive element CS1, CS2 allow the voltage on the gates of the transistors M1, M2 to be decoupled from the rest of the oscillator circuit.

[0092] PN junction diodes D1, D2 that are connected via their anode to the collector of the respective transistors Q1, Q2, and via their cathode to a voltage terminal Vtune, are reverse biased and allow fine and continuous tuning of the frequency within a given frequency band. On the one hand, the anodes of the diodes D1, D2 are biased, via the resistors RV1, RV2, to a voltage Vbias2 and, on the other hand, their cathodes are biased to a voltage Vtune.

[0093] Capacitive elements CV1, CV2 that are connected between the anodes of the respective diodes D1, D2 and the collectors of the respective transistors Q1, Q2 allow the voltage on the anodes of the diodes D1, D2 to be decoupled from the rest of the oscillator.

[0094] Furthermore, the four oscillator circuits VCObis are coupled one to one in parallel at homologous oscillating nodes N4a and N4b, which are located at the terminals of the inductive element L1-L2 of each oscillator circuit VCObis, via wires, respectively 4a and 4b. FIG. 4 schematically shows another advantageous oscillator architecture, comprising a series of eight voltage-controlled oscillator circuits VCObis that are distributed in a first group G1 and a second group G2 of four oscillators each.

[0095] Each group G1 and G2 corresponds to the configuration shown in FIG. 3, some references, such as the coil L, capacitive decoupling elements CV2 and CV1 and the varactors M1, M2, from the oscillating circuit of FIG. 3 having been inserted into FIG. 4.

[0096] In each of the groups G1 and G2, the oscillator circuits VCObis are coupled one to one in parallel at homologous oscillating nodes Na and Nb of each oscillator circuit VCObis, for example corresponding to the nodes N4a and N4b of the circuit shown in FIG. 3.

[0097] Each of the first and second groups G1 and G2 is also in a centroid-type configuration of four oscillators VCObis. Each group G1 and G2 therefore also includes a node point, denoted by PN1 and PN2, respectively, to which homologous oscillating nodes Na, Nb of the oscillating circuits of the respective group are coupled one to one via short circuit-type connections.

[0098] Furthermore, the first node point PN1 of the first group G1 and the second node point PN2 of the second G2 are connected via metal transmission lines LTa, LTb.

[0099] More specifically, the oscillating nodes Na of the oscillators VCObis of the first group G1 that are connected to one another are connected to the homologous oscillating nodes Na of the oscillators VCObis of the second group G2 via a transmission line LTa. Likewise, the oscillating nodes Nb of the oscillators VCObis of the first group G1 that are connected to one another are connected to the homologous oscillating nodes Nb of the oscillators VCObis of the second group G2 via a transmission line LTb.

[0100] The metal transmission lines LTa, LTb thus also make it possible to couple together the oscillator circuits VCObis of the first group GR1 and the oscillator circuits VCObis of the second group GR2 in parallel.

[0101] The oscillators VCO, VCObis are subject to a phase noise that gets weaker as the number of oscillator circuits coupled in parallel is increased, while proving robust to variations in supply voltage.

[0102] FIG. 5 schematically shows another oscillator architecture according to the invention, comprising four groups G3, G4, G5 and G6 of four oscillators VCObis each, similar to the groups shown in relation to FIG. 3.

[0103] In a manner analogous to the embodiment presented in relation to FIG. 3, the node points PN3, PN4, PN5 and PN6 of the respective groups are connected one to one via metal transmission lines LTa, LTb.

[0104] By way of indication, the embodiments described above may operate at a supply voltage VDD of 1.8 V for a power of 150 mW to 200 mW, and exhibit a phase noise of between −100 dBc/Hz and −115 dBc/Hz with a frequency shift of 1 MHz for a carrier frequency of 85 GHz.

[0105] Of course, the invention is not limited to the embodiments disclosed above, but rather encompasses all variants; the invention may, for example, be applied to current-controlled oscillators, employ any type of transistor (CMOS, bipolar, MESFET, etc.) or else be applied to other semiconductor technologies (GaAs, InGaAs, etc.).