Method for forming silicon nitride film selectively on top/bottom portions
11676812 · 2023-06-13
Assignee
Inventors
- Dai Ishikawa (Ome, JP)
- Atsuki Fukazawa (Tama, JP)
- Eiichiro Shiba (Tama, JP)
- Shinya Ueda (Hachioji, JP)
- Taishi Ebisudani (Tama, JP)
- SeungJu Chun (Chungcheongnam-do, KR)
- YongMin Yoo (Seoul, KR)
- YoonKi Min (Seoul, KR)
- SeYong Kim (Daejeon-si, KR)
- JongWan Choi (Gyeonggi-do, KR)
Cpc classification
H01L21/0217
ELECTRICITY
H01L21/02211
ELECTRICITY
International classification
Abstract
A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.
Claims
1. A method for fabricating a layer structure constituted by a dielectric film containing a Si-N bond in a recess formed in a substrate, comprising: (i) obtaining a reference plasma density at which the chemical resistance properties of a top/bottom portions of a reference dielectric film and a sidewall portion of the reference dielectric film are substantially equivalent, wherein obtaining the chemical resistance properties of a top/bottom portion of a reference dielectric film and a sidewall portion of the reference dielectric film comprises: forming a plurality of reference dielectric films each containing a Si—N bond on a top surface and a bottom surface and a sidewall of a recess, bombarding each of the plurality of reference dielectric films with one of a plurality of reference plasmas excited by applying voltage in a reaction space between two electrodes, wherein each of the plurality of reference plasmas has a different plasma density, and wherein plasma density is modulated by tuning a pressure in the reaction space, wherein plasma density increases by lowering the pressure, etching the top surfaces, the bottom surfaces, and the sidewall surfaces of each of the plurality of reference dielectric films to obtain the chemical resistance properties of each surface, and repeating these steps for a plurality of times using different plasma density values until one of the plurality of reference dielectric films has chemical resistance properties of the top/bottom portion and the sidewall portion that are substantially equivalent; and wherein the reference plasma density is the plasma density used on the one of the reference dielectric films where the chemical resistance properties of the top/bottom portion and the sidewall portion are substantially equivalent (ii) simultaneously forming a dielectric film containing a Si—N bond on an upper surface and a bottom surface and a sidewall of the recess, wherein a top/bottom portion of the dielectric film formed on the upper surface and the bottom surface and a sidewall portion of the dielectric film formed on the sidewall are given different chemical resistance properties by bombardment of a plasma excited by applying voltage in the reaction space between two electrodes between which the substrate is placed in parallel to the two electrodes; and (iii) substantially removing one of but not both of the top/bottom portion and the sidewall portion of the dielectric film by etching which removes the one of the top/bottom portion and the sidewall portion of the dielectric film more predominantly than the other according to the different chemical resistance properties; wherein the plasma in step (ii) is a capacitively coupled plasma (CCP) which is excited by applying RF power to one of the two electrodes, wherein plasma density is lower than the reference plasma density, wherein the etching in step (iii) (ii) removes the sidewall portion of the dielectric film selectively relative to the top/bottom portion of the dielectric film.
2. The method according to claim 1, wherein the plurality of reference plasmas in step (i) and the plasma in step (ii) are plasmas of Ar, N.sub.2, or O.sub.2.
3. The method according to claim 1, wherein in step (ii), a halogenated silane is used as a precursor.
4. The method according to claim 1, wherein the etching is a wet etching, which is conducted using a solution of hydrogen fluoride (HF) or phosphoric acid.
5. The method according to claim 1, wherein the pressure in step (ii) is controlled below 300 Pa.
6. A method for fabricating a layer structure constituted by a dielectric film containing a Si-N bond in a recess formed in a substrate, comprising: (i) obtaining a reference plasma density at which the chemical resistance properties of a top/bottom portions of a reference dielectric film and a sidewall portion of the reference dielectric film are substantially equivalent, wherein obtaining the chemical resistance properties of a top/bottom portion of a reference dielectric film and a sidewall portion of the reference dielectric film comprises: forming a plurality of reference dielectric films each containing a Si—N bond on a top surface and a bottom surface and a sidewall of a recess, bombarding each of the plurality of reference dielectric films with one of a plurality of reference plasmas excited by applying voltage in a reaction space between two electrodes, wherein each of the plurality of reference plasmas has a different plasma density, and wherein plasma density is modulated by tuning a pressure in the reaction space, wherein plasma density increases by lowering the pressure, etching the top surfaces, the bottom surfaces, and the sidewall surfaces of each of the plurality of reference dielectric films to obtain the chemical resistance properties of each surface, and repeating these steps for a plurality of times using different plasma density values until one of the plurality of reference dielectric films has chemical resistance properties of the top/bottom portion and the sidewall portion that are substantially equivalent; and wherein the reference plasma density is the plasma density used on the one of the reference dielectric films where the chemical resistance properties of the top/bottom portion and the sidewall portion are substantially equivalent; (ii) simultaneously forming a dielectric film containing a Si—N bond on an upper surface and a bottom surface and a sidewall of the recess, wherein a top/bottom portion of the dielectric film formed on the upper surface and the bottom surface and a sidewall portion of the dielectric film formed on the sidewall are given different chemical resistance properties by bombardment of a plasma excited by applying voltage in the reaction space between two electrodes between which the substrate is placed in parallel to the two electrodes; and (iii) substantially removing one of but not both of the top/bottom portion and the sidewall portion of the dielectric film by etching which removes the one of the top/bottom portion and the sidewall portion of the dielectric film more predominantly than the other according to the different chemical resistance properties; wherein the plasma in step (ii) is a capacitively coupled plasma (CCP) which is excited by applying RF power to one of the two electrodes, wherein plasma density is higher than the reference plasma density, wherein the etching in step (iii) removes the top/bottom portion of the dielectric film selectively relative to the sidewall portion of the dielectric film.
7. The method according to claim 6, wherein the plurality of reference plasmas in step (i) and the plasma in step (ii) are plasmas of Ar, N.sub.2, or O.sub.2.
8. The method according to claim 6, wherein in step (ii), a halogenated silane is used as a precursor.
9. The method according to claim 6, wherein the etching is a wet etching, which is conducted using a solution of hydrogen fluoride (HF) or phosphoric acid.
10. The method according to claim 6, wherein the pressure in step (ii) is controlled below 300 Pa.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) These and other features of this invention will now be described with reference to the drawings of preferred embodiments which are intended to illustrate and not to limit the invention. The drawings are greatly simplified for illustrative purposes and are not necessarily to scale.
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DETAILED DESCRIPTION OF EMBODIMENTS
(20) In this disclosure, “gas” may include vaporized solid and/or liquid and may be constituted by a single gas or a mixture of gases. In this disclosure, a process gas introduced to a reaction chamber through a showerhead may be comprised of, consist essentially of, or consist of a precursor gas and an additive gas. The precursor gas and the additive gas are typically introduced as a mixed gas or separately to a reaction space. The precursor gas can be introduced with a carrier gas such as a noble gas. The additive gas may be comprised of, consist essentially of, or consist of a reactant gas and a dilution gas such as a noble gas. The reactant gas and the dilution gas may be introduced as a mixed gas or separately to the reaction space. A precursor may be comprised of two or more precursors, and a reactant gas may be comprised of two or more reactant gases. The precursor is a gas chemisorbed on a substrate and typically containing a metalloid or metal element which constitutes a main structure of a matrix of a dielectric film, and the reactant gas for deposition is a gas reacting with the precursor chemisorbed on a substrate when the gas is excited to fix an atomic layer or monolayer on the substrate. “Chemisorption” refers to chemical saturation adsorption. A gas other than the process gas, i.e., a gas introduced without passing through the showerhead, may be used for, e.g., sealing the reaction space, which includes a seal gas such as a noble gas. In some embodiments, “film” refers to a layer continuously extending in a direction perpendicular to a thickness direction substantially without pinholes to cover an entire target or concerned surface, or simply a layer covering a target or concerned surface. In some embodiments, “layer” refers to a structure having a certain thickness formed on a surface or a synonym of film or a non-film structure. A film or layer may be constituted by a discrete single film or layer having certain characteristics or multiple films or layers, and a boundary between adjacent films or layers may or may not be clear and may be established based on physical, chemical, and/or any other characteristics, formation processes or sequence, and/or functions or purposes of the adjacent films or layers.
(21) In this disclosure, “containing a Si—N bond” may refer to being characterized by a Si—N bond or Si—N bonds, having a main skeleton substantially constituted by a Si—N bond or Si—N bonds, and/or having a substituent substantially constituted by a Si—N bond or Si—N bonds. A dielectric film containing a Si—N bond includes, but is not limited to, a SiN film and a SiON film, which have a dielectric constant of about 2 to 10, typically about 4 to 8.
(22) In this disclosure, “annealing” refers to a process during which a material is treated to get into its stable form, e.g., a terminal group (such as an alcohol group and hydroxyl group) present in a component is replaced with a more stable group (such as a Si-Me group) and/or forms a more stable form (such as a Si—O bond), typically causing densification of a film.
(23) Further, in this disclosure, the article “a” or “an” refers to a species or a genus including multiple species unless specified otherwise. The terms “constituted by” and “having” refer independently to “typically or broadly comprising”, “comprising”, “consisting essentially of”, or “consisting of” in some embodiments. Also, in this disclosure, any defined meanings do not necessarily exclude ordinary and customary meanings in some embodiments.
(24) Additionally, in this disclosure, any two numbers of a variable can constitute a workable range of the variable as the workable range can be determined based on routine work, and any ranges indicated may include or exclude the endpoints. Additionally, any values of variables indicated (regardless of whether they are indicated with “about” or not) may refer to precise values or approximate values and include equivalents, and may refer to average, median, representative, majority, etc. in some embodiments.
(25) In the present disclosure where conditions and/or structures are not specified, the skilled artisan in the art can readily provide such conditions and/or structures, in view of the present disclosure, as a matter of routine experimentation. In all of the disclosed embodiments, any element used in an embodiment can be replaced with any elements equivalent thereto, including those explicitly, necessarily, or inherently disclosed herein, for the intended purposes. Further, the present invention can equally be applied to apparatuses and methods.
(26) The embodiments will be explained with respect to preferred embodiments. However, the present invention is not limited to the preferred embodiments.
(27) Some embodiments provide a method for fabricating a layer structure constituted by a dielectric film containing a Si—N bond in a trench formed in an upper surface of a substrate, comprising: (i) simultaneously forming a dielectric film containing a Si—N bond on the upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the dielectric film formed on the upper surface and the bottom surface and a sidewall portion of the dielectric film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and (ii) substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the dielectric film by wet etching which removes the one of the top/bottom portion and the sidewall portion of the dielectric film more predominantly than the other according to the different chemical resistance properties. The term “simultaneously forming” may refer to forming generally or substantially at the same time, in the same process, or in the same step, which includes depositing generally or substantially at the same time, in the same process, or in the same step, and/or treating generally or substantially at the same time, in the same process, or in the same step. In this disclosure, the term “substantial” or “substantially” may refer to ample, considerable, or material quantity, size, time, or space (e.g., at least 70%, 80%, 90%, or 95% relative to the total or referenced value) recognized by a skilled artisan in the art to be sufficient for the intended purposes or functions.
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(29) In step S2, the wet etching is conducted using a solution of hydrogen fluoride (HF), for example.
(30) By adjusting bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes, a top/bottom portion of the dielectric film formed on the upper surface and the bottom surface and a sidewall portion of the dielectric film formed on the sidewalls can be given different chemical resistance properties. A plasma is a partially ionized gas with high free electron content (about 50%), and when a plasma is excited by applying AC voltage between parallel electrodes, ions are accelerated by a self dc bias (V.sub.DC) developed between plasma sheath and the lower electrode and bombard a film on a substrate placed on the lower electrode in a direction perpendicular to the film (the ion incident direction). The bombardment of a plasma can be represented by plasma density or kinetic energy of ions (ion energy). The plasma density can be modulated mainly by tuning the pressure and RF power (the lower the pressure and the higher the power, the higher the plasma density becomes). The plasma density can also be modulated by applying a dc bias voltage or an AC voltage with a lower frequency set for ions to follow (<1 MHz). The plasma density can be determined using a probe method (e.g., “High accuracy plasma density measurement using hybrid Langmuir probe and microwave interferometer method”, Deline C, et al., Rev. Sci. Instrum. 2007 November; 78(11): 113504, the disclosure of which is incorporated by reference in its entirety). When inserting a probe in a plasma and applying a voltage thereto, an electric current flows through the probe, which is called “ion saturation current” (I.sub.i) which can be calculated as follows, and then the plasma density (N.sub.p) can be calculated as follows:
(31) I.sub.i=e×N.sub.e√(kT.sub.e/M)×exp(½)eA; N.sub.p=I.sub.i√(M/kT.sub.e)/exp(½)eA, wherein L: ion saturation current [A]; A: surface area of the probe [m.sup.2]; e: electronic charge [C]; Ne: electron density [m.sup.−3]; k: Boltzmann's constant [J/K]; T.sub.e: electron temperature [K]; M: ion mass [kg].
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(33) In
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(35) When ion bombardment is exerted on a film without using a parallel electrode configuration, e.g., by using a reactant in low-pressure chemical vapor deposition (LPCVD), a threshold point such as that shown in
(36) In some embodiments, the plasma is a capacitively coupled plasma (CCP) which is excited by applying RF power to one of the two electrodes. Further, in some embodiments, inductively coupled plasma (ICP), electron cyclotron resonance (ECR) plasma, microwave surface wave plasma, helicon wave plasma, etc. can be used as the plasma, wherein bias voltage is applied to the electrodes as necessary to increase dc bias voltage between the plasma and electrode.
(37) In some embodiments, the RF power is higher than the reference RF power at which the chemical resistance properties of the top/bottom portion of the dielectric film and the sidewall portion of the dielectric film are substantially equivalent, wherein the wet etching removes the top/bottom portion of the dielectric film selectively relative to the sidewall portion of the dielectric film.
(38) In some embodiments, the plasma is a plasma of Ar, N.sub.2, and/or O.sub.2 or other atoms which have an atomic number higher than hydrogen or helium.
(39) In some embodiments, the trench has a width of 10 to 50 nm (typically 15 to 30 nm) (wherein when the trench has a length substantially the same as the width, it is referred to as a hole/via, and a diameter thereof is 10 to 50 nm), a depth of 30 to 200 nm (typically 50 to 150 nm), and an aspect ratio of 3 to 20 (typically 3 to 10).
(40) In some embodiments, the dielectric film can be used as an etching stopper, low-k spacer, or gap-filler. For example, when only the sidewall portion is left, the portion can be used as a spacer for spacer-defined double patterning (SDDP), or when only the top/bottom portion is left, the portion can be used as a mask used for solid-state doping (SSD) of a sidewall layer exclusively.
(41) In some embodiments, step (i) comprises: (ia) placing a substrate having a trench in its upper surface between the electrodes; and (ib) depositing the dielectric film on the substrate by plasma-enhanced atomic layer deposition (PEALD) using nitrogen gas as a reactant gas, wherein the plasma is a capacitively coupled plasma (CCP) which is excited by applying RF power to one of the two electrodes in each cycle of the PEALD, wherein the RF power is higher than the reference RF power at which the chemical resistance properties of the top/bottom portion of the dielectric film and the sidewall portion of the dielectric film are substantially equivalent so that the wet etching in step (ii) removes the top/bottom portion of the dielectric film selectively relative to the sidewall portion of the dielectric film. In the above, the film having directionality of film properties is formed as the film is depositing, not after the completion of deposition of the film.
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(43) In some embodiments, step (i) comprises: (ia) placing a substrate having a trench on its upper surface between the electrodes; and (ic) depositing the dielectric film on the substrate by plasma-enhanced atomic layer deposition (PEALD) using nitrogen gas as a reactant gas, wherein the plasma is a capacitively coupled plasma (CCP) which is excited by applying RF power to one of the two electrodes in each cycle of the PEALD, wherein the RF power is lower than reference RF power at which the chemical resistance properties of the top/bottom portion of the dielectric film and the sidewall portion of the dielectric film are substantially equivalent so that the wet etching in step (ii) removes the sidewall portion of the dielectric film selectively relative to the top/bottom portion of the dielectric film. In the above, the film having directionality of film properties is formed as the film is depositing, not after the completion of deposition of the film.
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(45) In some embodiments, the dielectric film is SiN film or SiON film or other Si—N bond-containing film.
(46) In some embodiments, the PEALD or other deposition methods uses one or more compounds selected from the group consisting of aminosilane, halogenated silane, monosilane, and disilane as a precursor. The aminosilane and halogenated silane include, but are not limited to, Si.sub.2Cl.sub.6, SiCl.sub.2H.sub.2, SiI.sub.2H.sub.2, bisdiethylaminosilane, bisdimethylaminosilane, hexaethylaminodisilane, tetraethylaminosilane, tart-butylamonosilane, bistart-butylamonosilane, trimehylsilyldiethylamine, trimethysilyldiethylamine, and bisdimethylaminodimethylsilane.
(47) In some embodiments, step (i) comprises: (iA) depositing a dielectric film on a substrate having a trench in its upper surface; (iB) placing the substrate between the two electrodes; and (iC) exciting the plasma between the electrodes to treat a surface of the deposited dielectric film without depositing a film, wherein the plasma is a capacitively coupled plasma (CCP) which is excited by applying RF power to one of the two electrodes, wherein the RF power is higher than the reference RF power at which the chemical resistance properties of the top/bottom portion of the dielectric film and the sidewall portion of the dielectric film are substantially equivalent so that the wet etching in step (ii) removes the top/bottom portion of the dielectric film selectively relative to the sidewall portion of the dielectric film. In the above, the film having directionality of film properties is formed after completion of deposition of a film, by treating the film. In the above, step (ii) is post-deposition treatment which need not be cyclic.
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(49) In some embodiments, the deposited dielectric film has a thickness of approximately 10 nm or less (typically approximately 5 nm or less). If the film to be treated is thicker than approximately 10 nm, plasma bombardment does not reach a bottom of the film, i.e., it is difficult to adjust the wet etch rate of the film entirely in the thickness direction.
(50) The dielectric film subjected to the post-deposition treatment can be deposited on the substrate by any suitable deposition methods including plasma-enhanced atomic layer deposition (PEALD), thermal ALD, low-pressure chemical vapor deposition (PCVD), remote plasma deposition, PECVD, etc. Preferably, the dielectric film is deposited by ALD since ALD can provide a high conformality such as more than approximately 70% (or more than 80% or 90%).
(51) In some embodiments, no annealing is conducted after depositing the dielectric film and before step (ii).
(52) In some embodiments, the plasma in step (i) is a capacitively coupled plasma (CCP) which is excited by applying RF power to one of the two electrodes, wherein plasma density is higher than reference plasma density at which the chemical resistance properties of the top/bottom portion of the dielectric film and the sidewall portion of the dielectric film are substantially equivalent, wherein the wet etching in step (ii) removes the top/bottom portion of the dielectric film selectively relative to the sidewall portion of the dielectric film. As discussed above in relation to
(53) In some embodiments, the plasma density is modulated by tuning the pressure in the reaction space, wherein the plasma density increases by lowering the pressure. In that case, the method further comprises, prior to steps (i) and (ii), repeating the following steps to determine the reference plasma density: (a) simultaneously forming a dielectric film under the same conditions as in step (i) except that the pressure is changed as a variable; and (b) substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the dielectric film by wet etching under the same conditions as in step (ii).
(54) In some embodiments, the pressure in step (i) is controlled below 350 Pa, including 300 Pa, 250 Pa, 200 Pa, 150 Pa, 100 Pa, 50 Pa, and 10 Pa, and any values between any two of the foregoing values.
(55) In some embodiments, the plasma density is modulated by tuning a ratio of high frequency RF power to low frequency RF power constituting the RF power, wherein the plasma density increases by decreasing the ratio. In some embodiments, the high frequency RF power has a frequency of 1 MHz or higher (e.g., 10 MHz to 60 MHz), and the low frequency RF power has a frequency of less than 1 MHz (e.g., 200 kHz to 800 kHz). In the above, the method further comprises, prior to steps (i) and (ii), repeating the following steps to determine the reference plasma density: (a) simultaneously forming a dielectric film under the same conditions as in step (i) except that the ratio is changed as a variable; and (b) substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the dielectric film by wet etching under the same conditions as in step (ii).
(56) In some embodiments, the ratio of high frequency RF power (HRF) to low frequency RF power (LRF) is 0/100 to 95/5 (e.g, 10/90 to 90/10). In some embodiments, the RF power consists of the low frequency RF power. In some embodiments, the total RF power is 100 W to 600 W for a 300-mm wafer (which power is applicable to any size of wafer as wattage per area, i.e., 0.14 W/cm.sup.2 to 0.85 W/cm.sup.2).
(57) In some embodiments, any one or more of the variables discussed in this disclosure can be used to manipulate the plasma density when depositing a dielectric film so as to control selective etching in the etching process.
(58) In the above embodiments where the ratio of HRF/LRF is controlled, low pressure and high RF power are not required as a variable to manipulate the plasma density when depositing a dielectric film, thereby making the process conditions less restricted. Further, in the embodiments, abnormal discharge by applying high RF power can be avoided.
(59) In other embodiments where the wet etching in step (ii) removes the sidewall portion of the dielectric film selectively relative to the top/bottom portion of the dielectric film, plasma density is set lower than reference plasma density at which the chemical resistance properties of the top/bottom portion of the dielectric film and the sidewall portion of the dielectric film are substantially equivalent.
(60) In some embodiments, the deposition cycle may be performed by PEALD, one cycle of which is conducted under conditions shown in Table 1 below.
(61) TABLE-US-00001 TABLE 1 (numbers are approximate) Conditions for Deposition Cycle Substrate temperature 100 to 600° C. (preferably 250 to 550° C.) Pressure 10 to 2000 Pa (preferably 100 to 800 Pa); Less than 350 Pa (preferably 250 Pa or less) for WER of top/bottom being higher than WER of sidewall Precursor SiI.sub.2H.sub.2, etc. Precursor pulse 0.05 to 10 sec (preferably 0.2 to 1 sec) Precursor purge 0.05 to 10 sec (preferably 0.2 to 3 sec) Reactant N.sub.2 + H.sub.2 mixture, or NH.sub.3 + N.sub.2 mixture Flow rate of reactant 100 to 20000 sccm (preferably 1000 to 3000 sccm) for (continuous) N.sub.2; 0 to 6000 sccm (preferably 0 to 600 sccm) for H.sub.2 or NH.sub.3 (H.sub.2/N.sub.2 = 0-0.5, preferably 0-0.2) Flow rate of carrier gas 100 to 5000 sccm (preferably 1000 to 3000 sccm) Ar or (continuous) N.sub.2 Flow rate of dilution gas 0 to 10000 sccm (preferably 0 to 5000 sccm) Ar or N.sub.2 (continuous) RF power (13.56 MHz) for a Less than 600 W (preferably 100 to 500 W) for WER of 300-mm wafer sidewall being higher than WER of top/bottom; 600 W or more (preferably 600 to 1000 W) for WER of top/bottom being higher than WER of sidewall A ratio of HRF/LRF Over 95/5 (typically 100/0) for WER of sidewall being higher than WER of top/bottom; 0/100 to 95/5 (preferably 0/100 to 90/10) for WER of top/bottom being higher than WER of sidewall RF power pulse 0.05 to 30 sec (preferably 1 to 5 sec) Purge 0.05 to 10 sec (preferably 0.2 to 3 sec) Growth rate per cycle (on top 0.02 to 0.06 nm/cycle surface) Step coverage (side/top; 20 to 100%; 30 to 100% (preferably, 50 to 100%; 50 to side/bottom) 100%) Distance between electrodes 5 to 30 mm (preferably 7 to 20 mm)
(62) In some embodiments, the post-deposition treatment may be performed under conditions shown in Table 2 below.
(63) TABLE-US-00002 TABLE 2 (numbers are approximate) Conditions for Post-Deposition Treatment Thickness of SiN film 2 to 15 nm (preferably 5 to 10 nm) Substrate temperature 25 to 600° C. (preferably 100 to 500° C.) Pressure 10 to 2000 Pa (preferably 100 to 500 Pa) Reactant N.sub.2, H.sub.2, NH.sub.3 Flow rate of reactant 100 to 20000 sccm (preferably 1000 to 3000 sccm) for (continuous) N.sub.2; 0 to 6000 sccm (preferably 0 to 600 sccm) for H.sub.2 or NH.sub.3 (H.sub.2/N.sub.2 = 0-0.5, preferably 0-0.2) Flow rate of carrier gas 100 to 5000 sccm (preferably 1000 to 3000 sccm) Ar or (continuous) N.sub.2 Flow rate of dilution gas 0 to 10000 sccm (preferably 0 to 5000 sccm) Ar or N.sub.2 (continuous) RF power (13.56 MHz) for a More than 600 W (preferably 600 to 1000 W) 300-mm wafer Duration of RF power 1 to 600 sec. (preferably 30 to 180 sec.) application Distance between electrodes 5 to 30 mm (preferably 7 to 20 mm)
(64) In the above, although no precursor is fed to the reaction chamber, and a carrier gas flows continuously.
(65) In some embodiments, wet etching may be performed under conditions shown in Table 3 below.
(66) TABLE-US-00003 TABLE 3 (numbers are approximate) Conditions for Wet etching Etching solution HF 0.05-5% Etching solution temperature 10 to 50° C. (preferably 15 to 30° C.) Duration of etching 1 sec to 5 min (preferably 1 to 3 min) Etching rate 0.1 to 5 nm/min (preferably 0.5 to 2 nm/min)
(67) For wet etching, any suitable single-wafer type or batch type apparatus including any conventional apparatuses can be used. Also, any suitable solution for wet etching including any conventional solutions, such as phosphoric acid, can be used.
(68) In some embodiments, in place of wet etching, any other suitable etching such as dry etching or plasma etching can be conducted. A skilled artisan can readily determined the etching conditions such as temperature, duration, etchant concentration, as routine experimentation in view of this disclosure.
(69) In some embodiments, an insulation film can be formed only on a sidewall of a trench as follows:
(70) 1) forming a SiN film over a substrate having a trench pattern, in which a pulse of feeding a precursor and a pulse of exposing the substrate to an ambient atmosphere containing nitrogen species excited by a plasma are repeated, in which the plasma is excited in a manner exerting plasma bombardment on the substrate in a direction perpendicular to the substrate (the incident angle of ions is perpendicular to the substrate) under conditions such that the wet etch rate of a sidewall portion of the film is lower than that of a top/bottom portion of the film; and
(71) 2) removing the top/bottom portion of the film by wet etching.
(72) In the above process sequence, the precursor is supplied in a pulse using a carrier gas which is continuously supplied. This can be accomplished using a flow-pass system (FPS) wherein a carrier gas line is provided with a detour line having a precursor reservoir (bottle), and the main line and the detour line are switched, wherein when only a carrier gas is intended to be fed to a reaction chamber, the detour line is closed, whereas when both the carrier gas and a precursor gas are intended to be fed to the reaction chamber, the main line is closed and the carrier gas flows through the detour line and flows out from the bottle together with the precursor gas. In this way, the carrier gas can continuously flow into the reaction chamber, and can carry the precursor gas in pulses by switching the main line and the detour line.
(73) The precursor may be provided with the aid of a carrier gas. Since ALD is a self-limiting adsorption reaction process, the number of deposited precursor molecules is determined by the number of reactive surface sites and is independent of precursor exposure after saturation, and a supply of the precursor is such that the reactive surface sites are saturated thereby per cycle. A plasma for deposition may be generated in situ, for example, in an ammonia gas that flows continuously throughout the deposition cycle. In other embodiments the plasma may be generated remotely and provided to the reaction chamber.
(74) As mentioned above, each pulse or phase of each deposition cycle is preferably self-limiting. An excess of reactants is supplied in each phase to saturate the susceptible structure surfaces. Surface saturation ensures reactant occupation of all available reactive sites (subject, for example, to physical size or “steric hindrance” restraints) and thus ensures excellent step coverage. In some embodiments the pulse time of one or more of the reactants can be reduced such that complete saturation is not achieved and less than a monolayer is adsorbed on the substrate surface.
(75) The process cycle can be performed using any suitable apparatus including an apparatus illustrated in
(76) In some embodiments, in the apparatus depicted in
(77) In some embodiments, a dual chamber reactor (two sections or compartments for processing wafers disposed close to each other) can be used, wherein a reactant gas and a noble gas can be supplied through a shared line whereas a precursor gas is supplied through unshared lines.
(78) A skilled artisan will appreciate that the apparatus includes one or more controller(s) (not shown) programmed or otherwise configured to cause the deposition and reactor cleaning processes described elsewhere herein to be conducted. The controller(s) are communicated with the various power sources, heating systems, pumps, robotics, and gas flow controllers or valves of the reactor, as will be appreciated by the skilled artisan.
(79) The present invention is further explained with reference to working examples below. However, the examples are not intended to limit the present invention. In the examples where conditions and/or structures are not specified, the skilled artisan in the art can readily provide such conditions and/or structures, in view of the present disclosure, as a matter of routine experimentation. Also, the numbers applied in the specific examples can be modified by a range of at least ±50% in some embodiments, and the numbers are approximate.
(80) In some embodiments, an insulation film can be formed only on a sidewall of a trench as follows:
(81) 1) forming a SiN film over a substrate having a trench pattern (the film may or may not have directionality of film properties);
(82) 2) treating the film with a plasma excited in a manner exerting plasma bombardment on the substrate in a direction perpendicular to the substrate (the incident angle of ions is perpendicular to the substrate) under conditions such that the wet etch rate of a sidewall portion of the film is lower than that of a top/bottom portion of the film; and
(83) 3) removing the top/bottom portion of the film by wet etching.
EXAMPLES
Example 1
(84) A SiN film was formed on a Si substrate (Φ300 mm) having trenches by PEALD, one cycle of which was conducted under the conditions shown in Table 4 (deposition cycle) below using the PEALD apparatus illustrated in
(85) After taking out the substrate from the reaction chamber, the substrate was subjected to wet etching under the conditions shown in Table 4 below.
(86) TABLE-US-00004 TABLE 4 (numbers are approximate) Conditions for Deposition Cycle Substrate temperature 400° C. Pressure 350 Pa Precursor SiI.sub.2H.sub.2 Precursor pulse 0.3 sec Precursor purge 0.5 sec Reactant N.sub.2 Flow rate of reactant (continuous) 2000 sccm Flow rate of carrier gas (continuous) 2000 sccm N.sub.2 Flow rate of dilution gas (continuous) 0 sccm RF power (13.56 MHz) for a 300-mm wafer Variable (see FIG. 7) RF power pulse 3.3 sec Purge 0.1 sec Growth rate per cycle (on top surface) 0.05 nm/cycle Number of cycles (thickness of film on top surface) 200 times (10 nm) Step coverage (side/top; side/bottom) 100%; 100% Trench depth/width (nm) 100/33 (AR = about 3) Distance between electrodes 15 mm Conditions for Wet etching Etching solution 0.5% HF Etching solution temperature 20° C. Duration of etching 2 min Etching rate Variable (see FIG. 7)
(87) The results are shown in
(88) Further, prior to the wet etching, the top portion of the film was subjected to additional analyses: Si—N peak intensity and density.
Example 2
(89) The SiN films were deposited under the conditions shown in Table 5, where the threshold RF power was determined to be approximately 400 W in the same manner as in Example 1. The SiN films were then subjected to wet etching under the conditions shown in Table 5.
(90) TABLE-US-00005 TABLE 5 (numbers are approximate) Conditions for Deposition Cycle Substrate temperature 200° C. Pressure 350 Pa Precursor Bisdiethylaminosilane Precursor pulse 0.2 sec Precursor purge 3 sec Reactant N.sub.2 Flow rate of reactant (continuous) 2000 sccm Flow rate of carrier gas (continuous) 2000 sccm Ar Flow rate of dilution gas (continuous) 0 sccm RF power (13.56 MHz) for a 300-mm wafer Variable (see FIG. 8) RF power pulse 3 sec Purge 0.1 sec Growth rate per cycle (on top surface) 0.02 nm/cycle Number of cycles (thickness of film on top surface) 500 times (10 nm) Step coverage (side/top; side/bottom) 30%; 30% Trench depth/width (nm) 100/33 (AR = about 3) Distance between electrodes 13 mm Conditions for Wet etching Etching solution 0.05% HF Etching solution temperature 20° C. Duration of etching 4 min Etching rate Variable (see FIG. 8)
Example 3
(91) The SiN film was deposited in the same manner as in Example 1 except that RF power was 880 W. The SiN film was then subjected to wet etching under the same conditions as in Example 1.
Example 4 (Prophetic Example)
(92) A SiN film is formed on a Si substrate (Φ300 mm) having trenches by PEALD in the same manner as in Example 1 except that RF power is 600 W. Thereafter, in the same reactor, the film is treated with a plasma under the conditions shown in Table 6 below, where RF power is 800 W which is higher than the threshold RF power, thereby causing damage to the top surface of the substrate and the bottom surface of the trench and degrading the film quality. After taking out the substrate from the reaction chamber, the substrate is subjected to wet etching under the conditions shown in Table 6 below.
(93) TABLE-US-00006 TABLE 6 (numbers are approximate) Conditions for Surface treatment Substrate temperature 400° C. Pressure 350 Pa Reactant N.sub.2 Flow rate of reactant (continuous) 2000 sccm Flow rate of carrier gas (continuous) 2000 sccm Flow rate of dilution gas (continuous) 0 sccm RF power (13.56 MHz) for a 300-mm wafer 880 W Duration of RF power application 60 sec Distance between electrodes 15 mm Conditions for Wet etching Etching solution 0.5% HF Etching solution temperature 20° C. Duration of etching 2 min Etching rate (top/sidewall) 6 nm/min, 0.2 nm/min
(94)
Example 5 (Prophetic Example)
(95) A SiN film is formed on a Si substrate (Φ300 mm) having trenches by PEALD, one cycle of which is conducted under the conditions shown in Table 7 (deposition cycle) below using the PEALD apparatus illustrated in
(96) After taking out the substrate from the reaction chamber, the substrate is subjected to wet etching under the conditions shown in Table 7 below.
(97) TABLE-US-00007 TABLE 7 (the numbers are approximate) Conditions for Deposition Cycle Substrate temperature 400° C. Pressure 350 Pa Precursor SiI.sub.2H.sub.2 Precursor pulse 0.3 sec Precursor purge 0.5 sec Reactant N.sub.2 Flow rate of reactant (continuous) 2000 sccm Flow rate of carrier gas (continuous) 2000 sccm N.sub.2 Flow rate of dilution gas (continuous) 0 sccm RF power (13.56 MHz) for a 300-mm wafer 100 W RF power pulse 3.3 sec Purge 0.1 sec Growth rate per cycle (on top surface) 0.05 nm/cycle Number of cycles (thickness of film on top surface) 200 times (10 nm) Trench depth/width (nm) 100/33 (AR = about 3) Step coverage (side/top; side/bottom) 100%; 100% Distance between electrodes 15 mm Conditions for Wet etching Etching solution 0.5% HF Etching solution temperature 20° C. Duration of etching 2 min Etching rate (top/sidewall) 0.3 nm/min, 2.4 nm/min
(98)
Example 6
(99) SiN films were deposited under the conditions shown in Table 8, where the threshold pressure was determined to be approximately 300 Pa in a manner substantially similar to that in Example 1. The SiN films were then subjected to wet etching under the conditions shown in Table 8.
(100) TABLE-US-00008 TABLE 8 (numbers are approximate) Conditions for Deposition Cycle Substrate temperature 450° C. Bottle temperature 35° C. Showerhead temperature 200° C. Wall temperature 150° C. Inflow gas temperature 75° C. Precursor SiI2H2 Pressure Variable (see FIG. 15) 350 Pa 250 Pa 150 Pa Reactant N.sub.2 Flow rate of reactant (continuous) 5000 sccm 2500 sccm Flow rate of carrier gas (continuous) 4000 sccm 2000 sccm N.sub.2 N.sub.2 Flow rate of seal gas (continuous) 200 sccm N.sub.2 RF power (13.56 MHz) for a 300-mm wafer 990 W Precursor pulse 0.45 sec Precursor purge 0.50 sec RF power pulse 3.30 sec Purge 0.10 sec 0.046 0.018 0.028 Growth rate per cycle (on top surface) nm/cycle nm/cyc nm/cyc 500 times 265 times 500 times Number of cycles (thickness of film on top surface) (231 nm) (4.76 nm) (14.2 nm) Step coverage (side/top; side/bottom) 79%; 88% 73%; 65% 78%; 75% Trench depth/width (nm) 330/33 (AR = about 10) Distance between electrodes 15 mm Conditions for Wet etching Etching solution 1:100 DHF Etching solution temperature 20° C. Duration of etching 1 min Etching rate Variable (see FIG. 15)
Example 7
(101) SiN films were deposited under the conditions shown in Table 9, where the threshold RF power (HRF alone) was determined to be approximately 550 W in a manner substantially similar to that in Example 1. The SiN films were then subjected to wet etching under the conditions shown in Table 9.
(102) TABLE-US-00009 TABLE 9 (numbers are approximate) Conditions for Deposition Cycle Substrate temperature 450° C. Bottle temperature 35° C. Showerhead temperature 200° C. Wall temperature 150° C. Inflow gas temperature 75° C. Precursor SiI.sub.2H.sub.2 Pressure Variable (see FIG. 16) Reactant N.sub.2 Flow rate of reactant (continuous) 5000 sccm Flow rate of carrier gas (continuous) 2000 sccm N.sub.2 Flow rate of seal gas (continuous) 200 sccm N.sub.2 RF power (13.56 MHz) for a 300-mm 550 W 550 W 880 W wafer RF power (400 kHz) for a 300-mm 0 W(None) 50 W 0 W(None) wafer Precursor pulse 0.30 sec 0.30 sec 0.30 sec Precursor purge 1.00 sec 1.00 sec 0.5 sec RF power pulse 3.30 sec 3.30 sec 3.30 sec Purge 0.10 sec 0.10 sec 0.10 sec Growth rate per cycle (on top surface) 0.038 0.052 0.045 nm/cycle nm/cycle nm/cycle Number of cycles (thickness of film 300 times 300 times 430 times on top surface) (11.3 nm) (15.5 nm) (19.6 nm) Step coverage (side/top; side/bottom) 73%; 68.% 73%; 68.% 67%; 77% Trench depth/width (nm) 100/33 (AR = about 3) Distance between electrodes 12 mm 12 mm 15 mm Conditions for Wet etching Etching solution 1:100 DHF Etching solution temperature 20° C. Duration of etching 5 min Etching rate Variable (see FIG. 16)
Example 8
(103) SiN films were deposited under the conditions shown in Table 10, where the threshold RF power (HRF alone) was determined to be approximately 400 W in a manner substantially similar to that in Example 1. The SiN films were then subjected to wet etching under the conditions shown in Table 10.
(104) TABLE-US-00010 TABLE 10 (numbers are approximate) Conditions for Deposition Cycle HRF power (13.56 MHz) for a 300 200-250 W 0 W -mm wafer LRF power (430 kHz) for a 300-mm 0 W 300 W wafer Substrate temperature 450° C. Pressure 10 Torr 4 Torr Precursor DCS Reactant NH.sub.3 Flow rate of reactant (continuous) 50 sccm Flow rate of carrier gas (continuous) 1,000 sccm Ar Flow rate of dilution gas (continuous) 500 sccm N.sub.2, 2,000 sccm Ar Precursor pulse 0.5 sec Precursor purge 1.0 sec Reactant pulse w/o RF plasma 0.5 sec RF power pulse 2.0 sec Purge 0.5 sec Growth rate per cycle 0.73 >0.73 (on top surface) Å/min Å/min Number of cycles (thickness of film 480 times (445 nm) on top surface) Step coverage (side/top; side/bottom) 70%; 70% Non-uniformity in film thickness 3.73% 0.86% within wafer surface Trench depth/width (nm) 100/33 (AR = about 3) Distance between electrodes 10 mm Conditions for Wet etching Etching solution DI:HF = 100:1 Etching solution temperature Room temperature Duration of etching >0.5 min Etching rate Variable (see FIG. 17)
Example 9
(105) As shown in
(106) TABLE-US-00011 TABLE 11 (numbers are approximate) Hydrogen content (at.%) WER to thermal oxide HRF (13.56 MHz, 200 W) 21.0 at.% 1.30 LRF (430 KHz, 300 W) 26.2 at.% 6.31
Example 10 (Prophetic Example)
(107) As shown in Example 2 (
(108) TABLE-US-00012 TABLE 12 (numbers are approximate) Etchant Top Side solution (nm/min) (nm/min) Film profile BHF130* 2 0.5 Similar to “700 W” in FIG. 8 or “LRF” in FIG. 17 0.2 5 Similar to “300 W” in FIG. 8 or “HRF” in FIG. 17 70° C.- 4 0 Similar to “700 W” in FIG. 8 or H.sub.3PO.sub.4 “LRF” in FIG. 17 0.2 5 Similar to “300 W” in FIG. 8 or “HRF” in FIG. 17 *Manufactured by Daikin Industries, Ltd., Japan (a hydrogen fluoride containing 5% ammonium hydrogen fluoride, 37% ammonium fluoride, and 58% water)
(109) It will be understood by those of skill in the art that numerous and various modifications can be made without departing from the spirit of the present invention. Therefore, it should be clearly understood that the forms of the present invention are illustrative only and are not intended to limit the scope of the present invention.