LIGHT-EMITTING DIODE

20170345970 · 2017-11-30

Assignee

Inventors

Cpc classification

International classification

Abstract

A light-emitting diode having a stack-like structure, whereby the stack-like structure comprises a substrate layer and a mirror layer and an n-doped bottom cladding layer and an active layer, producing electromagnetic radiation, and a p-doped top cladding layer and an n-doped current spreading layer, and the aforementioned layers are arranged in the indicated sequence. The active layer comprises a quantum well structure. A tunnel diode is situated between the top cladding layer and the current spreading layer, whereby the current spreading layer is formed predominantly of an n-doped Ga-containing layer, having a Ga content >1%.

Claims

1. A light-emitting diode having a stack-like structure, the light-emitting diode comprising: a substrate layer; an n-doped bottom cladding layer; an active layer producing electromagnetic radiation, the active layer comprising a quantum well structure; a p-doped top cladding layer; an n-doped current spreading layer; and a tunnel diode arranged between the top cladding layer and the current spreading layer, the current spreading layer having an n-doped Ga-containing layer having a Ga content >1%; a mirror layer arranged between the substrate layer and the n-doped cladding layer; an n-doped contact layer formed below the n-doped bottom cladding layer, wherein the tunnel diode comprises an As-containing layer that is doped with carbon and/or comprises a P-containing layer that is doped with tellurium, and wherein the tunnel diode comprises an n-doped layer having a dopant concentration greater than 3×10.sup.18 N/cm.sup.3 and a p-doped layer having a dopant concentration greater than 1×10.sup.19 N/cm.sup.3.

2. The light-emitting diode according to claim 1, wherein a contact layer is formed on the current spreading layer and the current spreading layer has a same polarity in the doping as the contact layer, and wherein the n-doping of the contact layer is greater than the n-doping of the current spreading layer.

3. The light-emitting diode according to claim 1, wherein the stack-like structure comprises monolithically arranged layers and part of the layers contain group-III-arsenide compound semiconductors and/or group-III-phosphide compound semiconductors.

4. The light-emitting diode according to claim 1, wherein the substrate layer comprises silicon or germanium or nickel or GaAs and has a first terminal contact.

5. The light-emitting diode according to claim 1, wherein the mirror layer is formed from a metal layer and the metal layer forms an electrical contact between the substrate and the bottom cladding layer and/or the bottom contact layer.

6. The light-emitting diode according to claim 1, wherein the bottom cladding layer and the top cladding layer comprise a compound of GaAs or of AlGaAs or of InGaAsP or of GaAsP or of InGaP or of AlInGaP.

7. The light-emitting diode according to claim 1, wherein the current spreading layer has a thickness between of 0.1 μm to 5.0 μm.

8. The light-emitting diode according to claim 1, wherein the current spreading layer is n-doped and is formed of GaAs or AlGaAs or InGaP or InAIP or AlInGaP.

9. The light-emitting diode according to claim 1, wherein the current spreading layer comprises an n-doped Al.sub.xGa.sub.1-xAs layer having an Al-content x between 0% and 20%.

10. The light-emitting diode according to claim 1, wherein the current spreading layer has a layer resistance Rs<70 Ω/▪ and the cladding layer has a layer resistance R.sub.S>400 Ω/▪.

11. The light-emitting diode according to claim 1, wherein the current spreading layer has a recess, and wherein the recess has a top-side edge surface and a side surface and a bottom surface, wherein the current spreading layer is completely removed on the bottom surface and the bottom surface is covered with a filler material that is different from the first semiconductor material, and wherein the contact resistance between the filler material and the bottom surface is greater than the contact resistance between the filler material and the current spreading layer.

12. The light-emitting diode according to claim 11, wherein the filler material comprises a metallic compound, and wherein the metallic compound in an area of the bottom produces at least a 10-times higher contact resistance than with respect to the side surface and/or to the edge surface.

13. The light-emitting diode according to claim 11, wherein a chemical compound or an alloy or an intermediate semiconductor layer is formed at the boundaries between the filler material and the layers surrounding the filler material.

14. The light-emitting diode according to claim 11, wherein the filler material contains a dopant for doping the boundaries with the surrounding layers.

15. The light-emitting diode according to claim 11, wherein the filler material and/or the current spreading layer and the contact layer have a doping with one or more of the elements Si, Ge, and/or Te.

16. The light-emitting diode according to claim 11, wherein a Schottky contact is formed in the area of the bottom.

17. The light-emitting diode according to claim 11, wherein the recess does not penetrate the tunnel diode layer structure or penetrates it partially or completely.

18. The light-emitting diode according to claim 11, wherein at least part of the bottom surface is formed in the area of the top cladding layer.

19. The light-emitting diode according to claim 11, wherein the recess is arranged centrally or eccentrically on the surface of the light-emitting diode, and wherein a second terminal contact is formed on the surface of the filler material within the recess in the form of a bond.

20. The light-emitting diode according to claim 19, wherein proceeding from the recess, a plurality of electrically conductive fingers are situated on the surface of the light-emitting diode, and wherein the fingers are electrically connected to the second terminal contact.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus, are not limitive of the present invention, and wherein:

[0035] FIG. 1 shows a view of an embodiment of the invention of an LED layer stack;

[0036] FIG. 2 shows a detailed view of the tunnel diode of the embodiment in FIG. 1;

[0037] FIG. 3 shows a detailed view of the structure of the active layer of the embodiment in FIG. 1;

[0038] FIG. 4 shows a detailed view of the embodiment in FIG. 1 with an embodiment of a recess;

[0039] FIG. 5 shows a complete view of the embodiment in FIG. 1 with a recess and an illustration of the preferred emission ranges in the case of the active layer.

DETAILED DESCRIPTION

[0040] The illustration in FIG. 1 shows a view of an embodiment of the invention of a light-emitting diode 10. Light-emitting diode 10 has a stack-like structure with layers arranged vertically on one another. A substrate layer 14 is formed on a back-side contact layer 12. A mirror layer 15 is placed on substrate layer 14. An n-doped bottom cladding layer 16 is formed on mirror layer 15. Mirror layer 15 is preferably made from a metal layer. The metal layer forms a good electrical contact between substrate layer 14 and bottom cladding layer 16 or an n-doped contact layer (not shown), which is located below bottom cladding layer 16.

[0041] An active layer 18 producing electromagnetic radiation is placed on bottom cladding layer 16, whereby active layer 18 comprises a quantum well structure. A p-doped top cladding layer 20 is formed on active layer 18. A tunnel diode 22 is placed on top cladding layer 20. An n-doped current spreading layer 24 is formed on tunnel diode 22. An n-doped contact layer 26 is placed on n-doped current spreading layer 24. Current spreading layer 24 predominantly has an n-doped Ga-containing layer having a Ga content greater than 1%.

[0042] A front-side contact 28 is placed on n-doped contact layer 26. It is understood that front-side contact 28, in contrast to back-side contact layer 12, is not formed over the entire surface. It should also be noted that the indicated layers are arranged in the aforementioned sequence.

[0043] A detailed view of the tunnel diode of the embodiment in FIG. 1 is shown in the illustration in FIG. 2. Only the differences relative to the illustration in FIG. 1 will be described below. Tunnel diode 22 has a first p-doped layer 22.1 placed on top cladding layer 20. The doping of the first layer is greater than 1×10.sup.19 N/cm.sup.3. The first layer preferably comprises As, the first layer being doped with carbon.

[0044] A second n-doped layer 22.2 is placed on first layer 22.1. The doping of the second layer is greater than 3×10.sup.18 N/cm.sup.3. The second layer preferably comprises P, the second layer being doped with tellurium.

[0045] A detailed view of active layer 18 of the embodiment in FIG. 1 is shown in the illustration in FIG. 3. Only the differences relative to the illustration in FIG. 1 will be described below. In a first alternative, a first layer stack 18.1, formed as multi-quantum well structure, and in a second alternative a second layer stack 18.2, also formed as a multi-quantum well structure, are shown for the active layer.

[0046] First layer stack 18.1 has a sequence of a first layer al and a second layer b1. The sequence in the present case repeats exactly three times. First layer al is arranged as the topmost layer of first layer stack 18.1. First layer al is 20 nm thick and has a GaAs.sub.0.8P.sub.0.2 compound. Second layer b1 is 10 nm thick and has an In.sub.0.15Ga.sub.0.85As compound.

[0047] Second layer stack 18.2 has a sequence of a first layer a2 and a second layer b2. The sequence in the present case repeats exactly three times. First layer a2 is arranged as the topmost layer of second layer stack 18.2. First layer a2 is 20 nm thick and has an Al.sub.0.5Ga.sub.0.5As compound. Second layer b2 is 10 nm thick and has an Al.sub.0.15Ga.sub.0.85As compound.

[0048] A detailed view of a first embodiment of a recess for the embodiment in FIG. 1 is shown in the illustration of FIG. 4. Only the differences relative to the illustration in FIG. 1 will be described below.

[0049] A top part of the stack-like monolithic structure of light-emitting diode 10 has a circular or oval or rectangular recess 30 with a bottom 31, with a side surface 32, and a top-side edge surface 33. Recess 30 is situated in the center of the surface (not shown) of n-doped contact layer 26 and completely penetrates n-doped contact layer 26 and subjacent n-doped current spreading layer 24 and second layer 22.2 of tunnel diode 22 and in FIG. 4 lies above first layer 22.1 of tunnel diode 22. It is understood that depending on the duration and type of the etching or structuring process, bottom 31 of recess 30 is formed with a different depth in first layer 22.1.

[0050] The area of the recess constitutes at mostn 25% of the area of the active layer. Otherwise, the light-emitting area of n-doped contact layer 26 becomes too small.

[0051] It is understood that in a further embodiment, shown in FIG. 5, bottom 31 of recess 30 is formed at or within top cladding layer 20, whereby depending on the duration and type of dry etching process, bottom 31 of recess 30 is situated with a different depth in top cladding layer 20.

[0052] Recess 30 is filled with a filler material 40 different in comparison with the surrounding semiconductor material of layers 20, 22.1, 22.2, 24, 26. Filler material 40 preferably comprises Au and/or Ni and/or Pd and/or Pt and/or Ag.

[0053] Recess 30 is filled predominantly or preferably completely with filler material 40. Filler material 40 represents part of front side contact 28 and has a metallic conductivity at least on the top side. The contact resistance between filler material 40 and bottom 31 is at least 10 times higher than the contact resistance between filler material 40 and current spreading layer 24. An undesirable current flow through bottom 31 is suppressed perpendicular to active layer 18.

[0054] The contact resistance between filler material 40 and bottom surface 31 is preferably greater than that to layers 22.2, 24, 26 opened on the side surfaces.

[0055] In an embodiment that is not shown, an insulation layer is formed in the area of bottom 31 and/or on side surfaces 32. The insulation layer can be formed, for example, before the introduction of filler material 40. A further possibility is that the semiconductor/cladding layer itself forms an insulation layer by the outward diffusion of a dopant out of the filler material.

[0056] Filler material 40 contains a dopant for doping boundaries 31 and 32 between the filler material. Filler material 40 has one or more the elements Si, Ge, and Te as the dopant. Filler material 40 in an embodiment that is not shown has a Schottky contact in the area of bottom 31.

[0057] Metal traces are formed in the shape of fingers 28.1 on top-side edge surface 33 as part of front-side contact 28 in order to connect n-doped contact layer 26 to the surface with as low a resistance as possible. All fingers 28.1 are connected in a low-resistance manner to filler material 40. In an embodiment that is also not shown, a wire bond is formed on the top side of the filler material as part of a second terminal contact.

[0058] A view of the embodiment in FIG. 1 with a second embodiment of the recess with an illustration of the preferred emission ranges in the case of the active layer is shown in the illustration in FIG. 5. Only the differences relative to the embodiment shown in FIG. 4 will be described below.

[0059] Because current spreading layer 24 already has a good electrical conductivity and a low contact resistance to the top second terminal contact, the formation of n-doped contact layer 26 is unnecessary. An advantage is that the emission rate of light-emitting diode 10 increases.

[0060] Bottom 31 of recess 30 is formed at or within top cladding layer 20. In the area of bottom 3, a Schottky contact area 50 is formed, by which a current flow vertical to active layer 18 is effectively suppressed.

[0061] Substrate layer 14 is made very thin and has a thickness between 100 μm to 450 μm. Filler material 40 comprises a PdGe compound.

[0062] Two emission regions EM of active layer 18 are shown to the left and right next to the bottom area. In a view that is not shown, the emission regions are formed completely encircling recess 30.

[0063] The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications as would be obvious to one skilled in the art are to be included within the scope of the following claims.