Method for fabricating a crystalline metal-phosphide hetero-layer by converting first and second crystalline metal-source layers into first and second crystalline metal phosphide layers
11674237 · 2023-06-13
Assignee
Inventors
- Yannick Baumgartner (Thalwil, CH)
- Bernd W. Gotsmann (Horgen, CH)
- Jean Fompeyrine (Waedenswil, CH)
- Lukas Czornomaz (ZURICH, CH)
Cpc classification
H01L29/7781
ELECTRICITY
H01L29/66977
ELECTRICITY
H01L29/7786
ELECTRICITY
H01L29/66969
ELECTRICITY
C30B1/026
CHEMISTRY; METALLURGY
H01L29/24
ELECTRICITY
H01L21/02614
ELECTRICITY
C30B1/10
CHEMISTRY; METALLURGY
C23C28/04
CHEMISTRY; METALLURGY
International classification
C30B1/10
CHEMISTRY; METALLURGY
Abstract
Fabricating a crystalline metal-phosphide layer may include providing a crystalline base substrate and a step of forming a crystalline metal-source layer. The method may further include performing a chemical conversion reaction to convert the metal-source layer to the crystalline metal phosphide layer. One or more corresponding semiconductor structures can be also provided.
Claims
1. A method for fabricating a crystalline metal-phosphide hetero-layer, the method comprising; providing a crystalline base substrate; forming a crystalline buffer layer on the crystalline base substrate; forming a first crystalline metal-source layer comprising a first metal source on the crystalline buffer layer, wherein the first crystalline metal-source is a metal oxide of W, Mo or Nb, or a metal nitride of W, Mo or Nb; forming a second crystalline metal-source layer comprising a second metal-source on the first crystalline metal-source layer, wherein the second crystalline metal-source is a metal oxide of W, Mo or Nb, or a metal nitride of W, Mo or Nb and is compositionally different from the first metal-source; performing a chemical conversion reaction to convert the first crystalline metal-source layer into a first crystalline metal phosphide layer; and performing a chemical conversion reaction to convert the second crystalline metal-source layer into a second crystalline metal phosphide layer.
2. The method of claim 1, wherein the base substrate comprises silicon.
3. The method of claim 2, wherein the base substrate has a (100) crystal orientation.
4. The method of claim 1, wherein the crystalline buffer layer is a layer comprising SrTiO.sub.3.
5. Thee method of claim 1, wherein the crystalline buffer layer is a layer comprising sapphire.
6. The method of claim 1, wherein the first crystalline metal-source layer is a layer comprising WO.sub.3, the second crystalline metal-source layer is a layer comprising MoO.sub.3, the first crystalline metal phosphide layer is a layer comprising WP.sub.2, and the second crystalline metal phosphide layer is a layer comprising MoP.sub.2.
7. The method of claim 1, wherein the first crystalline metal-source layer is a layer comprising MoO.sub.3, the second crystalline metal-source layer is a layer comprising WO.sub.3, the first crystalline metal phosphide layer is a layer comprising MoP.sub.2, and the second crystalline metal phosphide layer is a layer comprising WP.sub.2.
8. The method of claim 1, wherein the chemical conversion reaction is performed by an annealing in a phosphorous environment.
9. The method of claim 8, wherein the annealing is performed at a temperature range of 600° C. to 1000° C.
10. The method of claim 1, wherein the chemical conversion reaction is a solid-phase phosphidation.
11. The method of claim 1, wherein the chemical conversion reaction is performed in a chemical vapor deposition (CVD) reactor with a precursor selected from the group consisting of: tertiarybutylphosphine (TBP) and phospine (PH.sub.3).
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION
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(17) The buffer layer 111 may be generally formed by any suitable deposition technique. According to an embodiment, the buffer layer 111 is formed by molecular beam epitaxy. According to other embodiments, the buffer layer 111 may be formed by sputtering, atomic layer deposition, pulsed laser deposition or chemical vapor deposition.
(18) Details of one possible method to form a layer of STO on Silicon are disclosed in the document “Crystalline Oxides on Silicon: The First Five Monolayers”, R. A. McKee, F. J. Walker, and M. F. Chisholm, Phys. Rev. Lett. 81, 3014—Published 5 Oct. 1998.
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(20) According to embodiments, the metal-source layer 112 may be formed by molecular beam epitaxy, by sputtering, by atomic layer deposition, by pulsed laser deposition or by chemical vapor deposition.
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(22) According to an embodiment, the chemical conversion reaction may be performed by an annealing of the structure 112 in a phosphorous environment. The annealing may be in particular performed at a temperature range between 600° C. to 1000° C. According to embodiments, the annealing may be performed for a duration between a few minutes to a few hours, in particular between a duration of 1 minute to 10 hours. The chemical conversion reaction may be in particular a solid-phase phosphidation. In other words, the starting material of the chemical conversion reaction, i.e. the material of the metal-source layer, e.g. the WO.sub.3 crystals or the MoO.sub.3 crystals, remain in the solid form during the chemical conversion reaction, while the phosphor may be in a gaseous phase. According to embodiments, the chemical conversion reaction is performed in a controlled atmosphere, in particular in a chemical vapor deposition (CVD) reactor. The controlled atmosphere may provide in particular an overpressure of phosphor. The precursor may be in particular Tertiarybutylphosphine (TBP) as metal-organic precursor or phosphine (PH3) as hydride precursor.
(23) According to another embodiment, the chemical conversion reaction may be performed by exposing the metal-source layer in a closed vacuum tube or vacuum chamber with phosphorous powder.
(24) The crystalline metal phosphide layer 113 may have a thickness of less than 10 μm. According to further embodiments, the crystalline metal phosphide layer may have a thickness of less than 1 μm. Such a thin layer facilitates an efficient and fast chemical conversion reaction.
(25) According to embodiments, the metal-oxide layer may be a layer of WO.sub.3 and the metal phosphide layer a layer of WP.sub.2. According to such embodiments, the oxygen of the metal oxide layer is replaced during the chemical conversion step with phosphor.
(26) According to another embodiment, the metal-oxide layer is a layer of MoO.sub.3 and the metal phosphide layer is a layer of MoP.sub.2. According to such an embodiment the oxygen of the MoO.sub.3-layer is replaced during the chemical conversion step with phosphor.
(27) As a result of the steps described above, the crystalline structure 103 has been formed which comprises a substrate 110 of e.g. crystalline silicon, a crystalline buffer layer 111 on the substrate 110 and a crystalline metal phosphide layer 113 on the buffer layer 111.
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(29) Starting from the structure 102 as shown in
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(33) Referring to
(34) The second crystalline metal-source layer 213 may be formed with the same methods as the first crystalline metal-source layer 212, e.g. by sputtering, by atomic layer deposition, by pulsed laser deposition or by chemical vapor deposition.
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(36) According to an embodiment, the first metal-source layer 212 may be a layer of WO.sub.3, the second metal-source layer 213 may be a layer of MoO.sub.3, the first metal phosphide layer 214 may be a layer of WP.sub.2 and the second metal phosphide layer 215 a layer of MoP.sub.2.
(37) According to another embodiment, the first metal-source layer 212 is a layer of MoO.sub.3, the second metal-source layer 213 is a layer of WO.sub.3, the first metal phosphide layer 214 is a layer of MoP.sub.2 and the second metal phosphide layer 215 is a layer of WP.sub.2.
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(39) As a result of the steps described above, a crystalline structure 204 has been formed which comprises a substrate 210 of e.g. crystalline silicon, a crystalline buffer layer 211 on the substrate 210, a first crystalline metal phosphide layer 214 on the buffer layer 211 and a second crystalline metal phosphide layer 215 on the first crystalline metal phosphide layer 214.
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(42) At a step 310, a crystalline base substrate is provided.
(43) At an optional step 320, a crystalline buffer layer is formed on the crystalline base substrate.
(44) At a step 330, a crystalline metal-source layer is formed on the crystalline buffer layer.
(45) According to some embodiments, step 320 may be omitted and the crystalline metal-source layer is formed directly on the base substrate.
(46) At an optional step 340, the metal-source layer is patterned.
(47) At a step 350, a chemical conversion reaction is performed. The chemical conversion reaction converts the metal-source layer in a crystalline metal phosphide layer.
(48) While illustrative examples are given above, it will be appreciated that the basic fabrication steps described above can be used to produce crystalline structures and substrates of other materials, shapes and sizes. Materials and processing techniques can be selected as appropriate for a given embodiment.
(49) While particular examples have been described above, numerous other embodiments can be envisaged.
(50) The disclosed crystalline structures and substrates can be part of a chip. The resulting integrated circuit chips can be distributed by the fabricator in raw wafer form (that is, as a single wafer that has multiple unpackaged chips), as a bare die, or in a packaged form. In any case the chip may be integrated with other chips, discrete circuit elements, and/or other signal processing devices as part of either an intermediate product or an end product. The end product can be any product that includes integrated circuit chips.
(51) While in the above described examples a crystalline buffer layer has been provided between the crystalline base substrate and the crystalline metal-source layer, other embodiments may be envisaged according to which no buffer layer is used and the crystalline metal-source layer is formed directly on the base substrate.
(52) The following definitions and abbreviations are to be used for the interpretation of the claims and the specification. As used herein, the terms “comprises,” “comprising,” “includes,” “including,” “has,” “having,” “contains” or “containing,” or any other variation thereof, are intended to cover a non-exclusive inclusion. For example, a composition, a mixture, process, method, article, or apparatus that comprises a list of elements is not necessarily limited to only those elements but can include other elements not expressly listed or inherent to such composition, mixture, process, method, article, or apparatus.
(53) As used herein, the articles “a” and “an” preceding an element or component are intended to be nonrestrictive regarding the number of instances (i.e., occurrences) of the element or component. Therefore, “a” or “an” should be read to include one or at least one, and the singular word form of the element or component also includes the plural unless the number is obviously meant to be singular.
(54) As used herein, the terms “invention” or “present invention” are non-limiting terms and not intended to refer to any single aspect of the particular invention but encompass all possible aspects as described in the specification and the claims.
(55) As used herein, the term “about” modifying the quantity of an ingredient, component, or reactant of the invention employed refers to variation in the numerical quantity that can occur, for example, through typical measuring and liquid handling procedures used for making concentrates or solutions. Furthermore, variation can occur from inadvertent error in measuring procedures, differences in the manufacture, source, or purity of the ingredients employed to make the compositions or carry out the methods, and the like. In one aspect, the term “about” means within 10% of the reported numerical value. In another aspect, the term “about” means within 5% of the reported numerical value. Yet, in another aspect, the term “about” means within 10, 9, 8, 7, 6, 5, 4, 3, 2, or 1% of the reported numerical value.
(56) The descriptions of the various embodiments of the present invention have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.