Multi-interface GPS time synchronization

Abstract

A time synchronizer receives UTC (Coordinated Universal Time) time in serial+PPS (Pulse Per Second) format from a GPS (Global Positioning System) device and outputs timestamp data in multiple formats, including: CAN (Controller Area Network), Ethernet, gPTP (generic Precision Time Protocol), and serial+PPS. Multiple data sources receive timestamp data in the multiple formats and each provide data in a unified UTC time base to a sensor-fusion device. The unified UTC time base is based on the timestamp data in the multiple formats output by the time synchronizer. The time synchronizer may perform edge detection for a first transition of an internal clock signal following a transition of the PPS signal received from the GPS device. The internal clock signal may be asynchronous with the PPS signal received from the GPS device. The internal clock signal may have a frequency of 40 MHz.

Claims

1. An apparatus comprising: a time synchronizer configured to receive UTC (Coordinated Universal Time) time in serial+PPS (Pulse Per Second) format from a GPS (Global Positioning System) device and to output timestamp data in a plurality of formats, the plurality of formats including at least two of: CAN (Controller Area Network), Ethernet, gPTP (generic Precision Time Protocol), and serial+PPS, wherein the time synchronizer is configured to perform edge detection for a first transition of an internal clock signal following a transition of the PPS signal received from the GPS device, and wherein the internal clock signal is asynchronous with the PPS signal received from the GPS device; a plurality of data sources configured to receive timestamp data in the plurality of formats and to each provide data in a unified UTC time base to a sensor-fusion device, wherein the unified UTC time base is based on the timestamp data in the plurality of formats output by the time synchronizer.

2. The apparatus of claim 1, wherein the internal clock signal has a frequency of 40 MHz.

3. The apparatus of claim 1, wherein, based on the edge detection, the time synchronizer controls the timing of, and keeps master time for, the plurality of data sources.

4. The apparatus of claim 3, wherein the master time is synchronized to the internal clock signal.

5. The apparatus of claim 1, wherein the time synchronizer outputs a reference signal to the sensor-fusion device, wherein the reference signal includes timestamp data in the plurality of formats including at least two of: CAN, Ethernet, gPTP, and serial+PPS.

6. A method comprising: receiving, at a time synchronizer, UTC (Coordinated Universal Time) time in serial+PPS (Pulse Per Second) format from a GPS (Global Positioning System) device; and outputting, from the time synchronizer, timestamp data in a plurality of formats, the plurality of formats including at least two of: CAN (Controller Area Network), Ethernet, gPTP (generic Precision Time Protocol), and serial+PPS, wherein the time synchronizer performs edge detection for a first transition of an internal clock signal following a transition of the PPS signal received from the GPS device, and wherein the internal clock signal is asynchronous with the PPS signal received from the GPS device; receiving, at a plurality of data sources, the timestamp data in the plurality of formats; and providing, from the data sources, data in a unified UTC time base to a sensor-fusion device, wherein the unified UTC time base is based on the timestamp data in the plurality of formats outputted from the time synchronizer.

7. The method of claim 6, wherein the internal clock signal has a frequency of 40 MHz.

8. The method of claim 6, wherein, based on the edge detection, the time synchronizer controls the timing of, and keeps master time for, the plurality of data sources.

9. The method of claim 8, wherein the master time is synchronized to the internal clock signal.

10. The method of claim 6, wherein the time synchronizer outputs a reference signal to the sensor-fusion device, wherein the reference signal includes timestamp data in the plurality of formats including at least two of: CAN, Ethernet, gPTP, and serial+PPS.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 depicts an apparatus for providing multi-interface GPS time synchronization in accordance with embodiments of the invention.

(2) FIG. 2 is a timing diagram depicting edge detection in accordance with embodiments of the invention.

(3) FIG. 3 depicts an embodiment that is realized using a Compact RIO system in accordance with embodiments of the invention.

(4) FIG. 4 depicts an embodiment of the invention that is used with an HFL test vehicle in accordance with embodiments of the invention.

(5) FIG. 5 depicts an embodiment of the invention in which a time synchronizer provides time stamp information, using a single time base, to various ECUs and an ADCU (Automated Driving Control Unit) in accordance with embodiments of the invention.

DETAILED DESCRIPTION

(6) Embodiments of the invention use a Linux real time controller, with a CAN, Serial, and Ethernet interface as well as an FPGA (Field Programmable Gate Array). The FPGA is synchronized to a single GPS (Global Positioning System) source, this then becomes a master clock. The FPGA creates a PPS (Pulse Per Second) output, as needed, which can be routed to the various devices which rely on this as an input. Additionally, via the serial interface, the GPS date and time message is broadcast to the various devices. A timestamp is also sent via the CAN interface, for devices that can accept this, and via Ethernet as well. Furthermore, there is a gPTP (generic Precision Time Protocol) interface which is set to bypass the IEEE 1588 Best Master Clock Algorithm and which is designated as the master clock on whatever gPTP network it is connected to.

(7) FIG. 1 depicts an apparatus 100 for providing multi-interface GPS time synchronization in accordance with embodiments of the invention. As depicted in FIG. 1, a GPS antenna 114 outputs UTC Time (serial)+PPS, which is input to a time synchronization module 118, which outputs a timestamp in various formats to various other modules. The time synchronization module 118 outputs a timestamp 106 in CAN message format to a CAN ECU 102 and/or one or more other data sources with CAN input for time synchronization. The time synchronization module 118 outputs a timestamp 110 in Ethernet message format to an Ethernet ECU 104 and/or one or more other data sources with Ethernet input for time synchronization. The time synchronization module 118 outputs a timestamp 122 in Serial+PPS message format to one or more other data sources 130 having a Serial+PPS input for time synchronization. The time synchronization module 118 exchanges information bidirectionally via gPTP interface 124 with one or more data sources that accept and/or provide timestamp information via the gPTP interface 124.

(8) Each data source, namely, the CAN ECU 102 and/or one or more other data sources with CAN input for time synchronization, the Ethernet ECU 104 and/or one or more other data sources with Ethernet input for time synchronization, the one or more other data sources 130 having a Serial+PPS input for time synchronization, and the one or more data sources that accept and/or provide timestamp information via the gPTP interface 124, output data in a unified UTC time base to the recording box 120, as depicted by 108, 112, 126, and 128, respectively.

(9) FIG. 2 is a timing diagram 200 depicting edge detection in accordance with embodiments of the invention. A PPS signal 202 from GPS includes a rising edge. FPGA clock 204, is a 40 MHz clock signal that is asynchronous with the PPS signal 202. Generating such clock signals is well known in the art. And frequencies other than 40 MHz may also be used. Upon a first rising edge of the FPGA clock signal 204 following the rising edge of the PPS signal 202, edge detection signal 206 transitions from 0 to 1.

(10) In accordance with embodiments of the invention, the time synchronization module 118 may be an FPGA that generates timestamp information based on the PPS signal 202 from a GPS receiver. The FPGA then controls the timing of other data sources and keeps master time. Master time within the system is then synchronized to +/−period of the FPGA clock signal 204, which still synchronizes the other data sources with each other because the other data sources each receives the same time base, which is shifted from the PPS signal 202 from GPS.

(11) Instead of an FPGA, other embodiments may be implemented in dedicated hardware, a processor that executes computer-executable instructions, and the like.

(12) FIG. 3 depicts an embodiment that is realized using a Compact RIO system, including a CRIO controller and C Series I/O modules, from National Instruments with a controller, processor, and FPGA which has a RTOS (Real Time Operating System). The chassis allows for expandable IO (Input/Output) modules, which increases the configurability.

(13) As depicted in FIG. 3, the interfaces may include one or more of the following types of interfaces: a CAN interface, which is a bus structure; an Ethernet interface, which can be mated to a BroadR switch; a gPTP interface; a DIO interface; and a serial interface. BroadR-Reach technology is an Ethernet physical layer standard designed for use in automotive connectivity applications. BroadR-Reach technology allows multiple in-vehicle systems to simultaneously access information over unshielded single twisted pair cable.

(14) FIG. 4 depicts an embodiment of the invention that is used with an HFL test vehicle that uses an RT Range DGPS (Differential GPS) system, which provides position data and also serves as the time source for the time sync module 118. Alongside real-time monitoring systems and a post-processing application, the RT-Range provides precise Vehicle-to-Vehicle, Vehicle-to-Lane and Vehicle-to-Infrastructure measurements for end to end ADAS testing.

(15) The time sync module 118 communicates via, BroadR Ethernet, the timestamp to the HFL. It has a dedicated Serial+PPS interface for each Velodyne VLP 16. The RT Range already has UTC Time to within nanoseconds of the time sync module. The timestamped data is sent to the MI5 recording box and is recorded there.

(16) FIG. 5 depicts an embodiment of the invention in which the time synch module receives UTC time in serial+PPS format and provides time stamp information, using a single time base, to the ECUs and the ADCU (Automated Driving Control Unit) or recording box in the following formats: gPTP, CAN, Ethernet, and/or serial+PPS. When the timing source is a single common module, then the data from various data sources shares a common time base and, for a given time, a scene captured by the data sources can be known from the captured data.

(17) The reference signal depicted in FIG. 5 is a dedicated connection coming from the time sync module to the ADCU/recording box, also referred to as the fusion box. The cabling may be the same in length and composition as to the individual ECUs, and may be used to calculate the latency between signals and the effect of the ECU between the time sync module and the fusion box.

(18) By subtracting T.sub.R, which is the time at which a given timestamp arrives at the fusion box from the time sync module, from T.sub.S, which is the time at which the corresponding timestamped data arrives from an individual sensor, the effect of the ECU in the system can be calculated.

(19) Similarly, by subtracting the time at which the same timestamp arrives on different interfaces, we can calculate the latency between different interfaces. That is, if the CAN timestamp for a given time arrives at T.sub.CAN and the same timestamp arrives via Ethernet at T.sub.Eth, then their relative latency can be calculated by subtracting one from the other.

(20) In this manner, the time taken from an ECU receiving a timestamp to reporting the data for that given time, as well as the delay between different communication protocols, can be calculated. This allows the fusion box to account for these delays when correlating the data from the various ECUs.

(21) In these ways, embodiments of the invention bridge the gap between traditional GPS timing methods and gPTP time synchronization allowing common time to be kept between these two types of interfaces. The embodiments limit the number of antennas needed to synchronize several devices to UTC time to a single antenna (or two antennas in the case of Differential GPS). The embodiments eliminate the jitter and drift associated with using several different antennas by using a single timing synchronization module as the timing source. And the embodiments provide timing information via CAN and Ethernet for automotive ECU's (Electronic Control Units) that use those communication protocols.

(22) While the present invention has been illustrated by a description of various embodiments and while these embodiments have been described in considerable detail, it is not the intention of the applicants to restrict or in any way limit the scope of the appended claims to such detail. Additional advantages and modifications will readily appear to those skilled in the art. The invention in its broader aspects is therefore not limited to the specific details, representative apparatus and method, and illustrative example shown and described. Accordingly, departures may be made from such details without departing from the spirit or scope of applicant's general inventive concept.