Electronic resonant and insulated half-bridge zeta converter

Abstract

An electronic half-bridge ZETA converter may include a transformer, wherein a half-bridge is connected to the primary winding of transformer, and wherein a respective capacitance and a respective diode are associated with the half-bridge switches. Moreover, the converter includes a ZETA converter which is connected to secondary winding of transformer, so that the ZETA converter includes a first inductance, which includes the magnetization inductance of transformer, and a second inductance. Finally, the converter includes a control unit which drives the half-bridge switches with four time intervals that are repeated periodically. Specifically, during the fourth time interval the first and the second switch are opened, so that the capacitance associated with said second switch is charged and the capacitance associated with said first switch is discharged, enabling a zero voltage switching.

Claims

1. An electronic half-bridge ZETA converter for providing a power signal through an output, said electronic half-bridge ZETA converter comprising: a transformer with a primary winding and a secondary winding, wherein each winding comprises at least a first and a second terminal, a half-bridge comprising a first and a second electronic switch for selectively connecting said first terminal of said primary winding to a supply signal or a ground, wherein a respective capacitance and a respective diode are associated with said first and said second electronic switch, at least one capacitor connected between said second terminal of said primary winding and said supply signal or said ground, an electronic ZETA converter connected to said secondary winding, wherein said ZETA converter comprises three branches which are connected in parallel, wherein: a) the first branch comprises a first capacitor connected in series with the secondary winding of said transformer, so that said first branch comprises a first inductance which includes the magnetization inductance of said transformer, b) the second branch comprises a diode, and c) the third branch comprises a second capacitor connected in series with a second, wherein said output is connected in parallel with said second capacitor; and a control unit configured for driving said first and said second electronic switch with the following time intervals which are repeated periodically: a) a first time interval, wherein said first switch is closed and said second switch is opened, so that a current flow from said supply signal through said primary winding of said transformer increases; b) a subsequent second time interval, wherein said first switch is opened and said second switch is opened; c) a subsequent third time interval, wherein said first switch is opened and said second switch is closed; and d) a subsequent fourth time interval, wherein said first switch is opened and said second switch is opened, so that the capacitance associated with said second switch is charged and the capacitance associated with said first switch is discharged, wherein said first and said second inductance are dimensioned such that said first and said second inductance provide during said fourth time interval a current which charges the capacitance associated with said second switch and discharges the capacitance associated with said first switch.

2. The electronic converter according to claim 1, wherein during said third time interval occurs an oscillation of a resonant circuit comprising said at least one capacitor connected between said second terminal of said first winding and said supply signal or said ground, said first capacitor connected in series with the secondary winding of said transformer and the leakage inductance of said transformer, wherein said at least one capacitor, said first capacitor and said leakage inductance are dimensioned such that: a) during said third time interval occur one or more half-periods of the oscillation of said resonant circuit, and b) the current which flows through the diode is zero at the end of said third time interval.

3. The electronic converter according to claim 2, wherein the capacitance of said at least one capacitor and the capacitance of said first capacitor are dimensioned such that: $C_R\le \frac{{\mathrm{Tr}}^2}{{\pi }^2{L}_R}$ where C.sub.R is the capacitance of said at least one capacitor connected in series with said first capacitor; Tr is the minimum duration of said third time interval, and L.sub.R is the leakage inductance of said transformer.

4. The electronic converter according to claim 1, wherein an equivalent capacitance at the intermediate point of said half-bridge which comprises said capacitances associated with said first and said second electronic switch is between 200 pF and 1.5 nF.

5. The electronic converter according to claim 1, wherein the sum of the durations of said first time interval, said second time interval, said third time interval and said fourth time interval is substantially constant.

6. The electronic converter according to claim 1, wherein the durations of said second time interval and the duration of said fourth time interval are substantially constant.

7. The electronic converter according to claim 1, wherein the values of said first and said second inductance are dimensioned as a function of: a) the voltage of said supply signal, b) the duration of said first time interval with respect to the duration of a switching period, c) the output current provided through said output, and d) an equivalent capacitance at the intermediate point of said half-bridge which comprises said capacitances associated with said first and said second electronic switch.

8. A method for operating an electronic converter, the method comprising providing a transformer with a primary winding and a secondary winding, wherein each winding comprises at least a first and a second terminal, selectively connecting said first terminal of said primary winding to a supply signal or a ground by a half-bridge comprising a first and a second electronic switch, wherein a respective capacitance and a respective diode are associated with said first and said second electronic switch, providing at least one capacitor connected between said second terminal of said primary winding and said supply signal or said ground, providing an electronic ZETA converter connected to said secondary winding, wherein said ZETA converter comprises three branches which are connected in parallel, wherein: a) the first branch comprises a first capacitor connected in series with the secondary winding of said transformer, so that said first branch comprises a first inductance which includes the magnetization inductance of said transformer, b) the second branch comprises a diode, and c) the third branch comprises a second capacitor connected in series with a second, wherein said output is connected in parallel with said second capacitor; and for driving said first and said second electronic switch by a control unit with the following time intervals which are repeated periodically: a) a first time interval, wherein said first switch is closed and said second switch is opened, so that a current flow from said supply signal through said primary winding of said transformer increases; b) a subsequent second time interval, wherein said first switch is opened and said second switch is opened; c) a subsequent third time interval, wherein said first switch is opened and said second switch is closed; and d) a subsequent fourth time interval, wherein said first switch is opened and said second switch is opened, so that the capacitance associated with said second switch is charged and the capacitance associated with said first switch is discharged, wherein said first and said second inductance are dimensioned such that said first and said second inductance provide during said fourth time interval a current which charges the capacitance associated with said second switch and discharges the capacitance associated with said first switch.

9. A method for designing an electronic converter, the electronic converter comprising: a transformer with a primary winding and a secondary winding, wherein each winding comprises at least a first and a second terminal, a half-bridge comprising a first and a second electronic switch for selectively connecting said first terminal of said primary winding to a supply signal or a ground, wherein a respective capacitance and a respective diode are associated with said first and said second electronic switch, at least one capacitor connected between said second terminal of said primary winding and said supply signal or said ground, an electronic ZETA converter connected to said secondary winding, wherein said ZETA converter comprises three branches which are connected in parallel, wherein: a) the first branch comprises a first capacitor connected in series with the secondary winding of said transformer, so that said first branch comprises a first inductance which includes the magnetization inductance of said transformer, b) the second branch comprises a diode, and c) the third branch comprises a second capacitor connected in series with a second, wherein said output is connected in parallel with said second capacitor; and a control unit configured for driving said first and said second electronic switch with the following time intervals which are repeated periodically: a) a first time interval, wherein said first switch is closed and said second switch is opened, so that a current flow from said supply signal through said primary winding of said transformer increases; b) a subsequent second time interval, wherein said first switch is opened and said second switch is opened; c) a subsequent third time interval, wherein said first switch is opened and said second switch is closed; and d) a subsequent fourth time interval, wherein said first switch is opened and said second switch is opened, so that the capacitance associated with said second switch is charged and the capacitance associated with said first switch is discharged, wherein said first and said second inductance are dimensioned such that said first and said second inductance provide during said fourth time interval a current which charges the capacitance associated with said second switch and discharges the capacitance associated with said first switch, the method comprising: dimensioning said first and said second inductance such that said first and said second inductance provide during said fourth time interval a current which charges the capacitance associated with said second switch and discharges the capacitance associated with said first switch.

10. The method according to claim 9, wherein during said third time interval occurs an oscillation of a resonant circuit comprising said at least one capacitor connected between said second terminal of said first winding and said supply signal or said ground, said first capacitor connected in series with the secondary winding of said transformer and the leakage inductance of said transformer, and wherein the method comprises: dimensioning said at least one capacitor, said first capacitor and said leakage inductance are dimensioned such that: a) during said third time interval occur one or more half-periods of the oscillation of said resonant circuit, and b) the current which flows through the diode is zero at the end of said third time interval.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the disclosed embodiments. In the following description, various embodiments described with reference to the following drawings, in which:

(2) FIGS. 1-3, 4A-4B and 5 have already been described in the foregoing,

(3) FIG. 6 shows an electronic half-bridge ZETA converter according to the present description; and

(4) FIGS. 7A-7F, 8A-8G, 9A-E, 10, 11A-11C and 12 show details of embodiments of a driving of the converter of FIG. 6.

DETAILED DESCRIPTION

(5) In the following description numerous specific details are given to provide a thorough understanding of embodiments. The embodiments can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials or operations are not shown or described in detail to avoid obscuring aspects of the embodiments.

(6) Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures or characteristics may be combined in any suitable manner in one or more embodiments.

(7) The headings provided herein are for convenience only and do not interpret the scope or meaning of the embodiments.

(8) Substantially, also the electronic ZETA converter of the present description is driven via a half bridge, and therefore this topology is typically called a half-bridge ZETA converter.

(9) In this topology, the converter includes a transformer T comprising a primary winding T1 and a secondary winding T2. Specifically, transformer T may be modelled as an ideal transformer with a given turn ratio 1:n, an inductor L.sub.M which represents the magnetization inductance of transformer T and an inductor L.sub.R which represents the leakage inductance of transformer T.

(10) The connection on the secondary side of the transformer corresponds to a typical ZETA converter, i.e. a diode, two capacitors and an inductor, because the second inductor may be represented by the magnetization inductance of the transformer.

(11) On the contrary, on the primary side of the transformer no single switch is used, but a first terminal of the primary winding of the transformer is connected to a half bridge, i.e. at the intermediate point between two switches, and therefore such a half bridge is configured to selectively connect such first terminal of the primary winding of transformer to the input voltage or to ground. Moreover, the second terminal of the primary winding of the transformer is connected through at least a capacitor to the input voltage and/or to ground.

(12) For example, FIG. 6 shows a possible embodiment of an electronic half-bridge ZETA converter.

(13) Also in this case, converter 12 receives as an input, via two input terminals 110, a supply signal, such as for instance a DC voltage V.sub.in, and supplies as an output, via two output terminals 106, a regulated voltage V.sub.o or a regulated current i.sub.o.

(14) In the presently considered embodiment, converter 12 includes a half bridge, i.e. two electronic switches S.sub.1 and S.sub.2 which are connected in series between the two input terminals 110, wherein the switching of electronic switches S.sub.1 and S.sub.2 is driven via a control unit 112. For example, the control unit 112 may be an analogue and/or digital circuit, such as for example a micro-processor which is programmed via a software code.

(15) For example, in the embodiment such electronic switches S.sub.1 e S.sub.2 are N-MOS transistors or n-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors).

(16) In the presently considered embodiment, such switches S.sub.1 and S.sub.2 have respective capacitances C.sub.A1, C.sub.A2 and respective diodes D.sub.A1, D.sub.A2 connected in parallel. For example, capacitances C.sub.A1 and C.sub.A2 may represent the intrinsic capacitances of a MOSFET and/or may be implemented with additional capacitors, which are connected in parallel with switches S.sub.1 e S.sub.2.

(17) Specifically, according to the present disclosure, the capacitance of switches S.sub.1 e S.sub.2 may even be remarkably higher than the value 42 pF mentioned in the paper by WU TSAI-FU. For example, the sum of capacitances C.sub.A1 and C.sub.A2 of switches S1 and S2 can even reach 1.5 nF. For example, in the case MOSFETs are used, the capacitances of switches S.sub.1 and S.sub.2 may reach 100-200 pF, but normally it is necessary to add parallel capacitances, in order to slow down the switching leading edges and to reduce EMIs, and therefore the total capacitance of the node between both switches S.sub.1 e S.sub.2 may reach 1.5 nF, preferably between 200 pF and 1 nF.

(18) On the contrary, diodes D.sub.A1 and D.sub.A2 may represent the body diodes of a MOSFET and/or may be implemented through additional diodes.

(19) For example, in the considered embodiment, a first terminal of primary winding T1 of transformer T is connected directly to the intermediate point between both electronic switches S.sub.1 and S.sub.2. On the contrary, the second terminal of primary winding T1 of transformer T is connected via a capacitor C.sub.RP to the second input terminal, which represents a first ground GND.sub.1. Therefore, switches S.sub.1 e S.sub.2 may be used to selectively connect the first terminal of primary winding T1 of transformer T to voltage V.sub.in or to ground GND.sub.1.

(20) Generally, on the secondary side of the transformer, the ZETA converter includes three branches which are connected in parallel: the first branch includes the secondary winding of transformer T2 (and therefore magnetization inductance L.sub.M) and a capacitor C.sub.RS; the second branch includes diode D; and the third branch includes inductor L.sub.0 and a capacitor C.sub.0, wherein load R.sub.L, i.e. output 106, is connected in parallel with capacitor C.sub.0.

(21) In the presently considered embodiment, the connection on the secondary side of transformer T substantially corresponds to what is shown in FIG. 5. However, the diagram in FIG. 3 might be used as well.

(22) Specifically, in the presently considered embodiment, the first terminal of secondary winding T2 of transformer T is connected directly to output 106, specifically to the first terminal of output 106. On the contrary, the second terminal of secondary winding T2 is connected through a capacitor C.sub.RS (corresponding to capacitor C1 in FIG. 5) to the anode of diode D, wherein the cathode of diode D is connected directly to the first terminal of output 106.

(23) In the presently considered embodiment, the anode of diode D is connected via output inductor L.sub.0 to the second output terminal 106, which represents a second ground GND.sub.2, which due to the isolating effect of transformer T is preferably different from ground GND.sub.1 and therefore is denoted with a different ground symbol.

(24) Finally, also in this case, capacitor C.sub.0 is connected in parallel to output 106, i.e. directly to the terminals of output 106.

(25) In the presently considered embodiment, the leakage inductance L.sub.R of transformer T is shown on the secondary side of transformer T, and the magnetization inductance L.sub.M is shown on the primary side of transformer T. Generally speaking, such inductances L.sub.M and L.sub.R may also include additional inductors, such as for example an inductor connected in parallel with the primary and/or the secondary winding of transformer T, and/or an inductor connected in series with the primary and/or secondary winding of transformer T.

(26) Therefore, from the point of view of the circuits, the circuit shown in FIG. 6 may be compared with the circuit shown in the paper by WU TSAI-FU. In fact, according to the connection of the second terminal of primary winding T1 to ground and not to voltage V.sub.in, switch S.sub.1 anyway performs the function of controlling the energy flow from supply V.sub.in through the primary side of transformer T. Moreover, the serial connection of capacitors C.sub.RS and C.sub.RP performs the function of the clamping capacitor Cc described in the paper by WU TSAI-FU.

(27) However, while the zero voltage switching of half-bridge switches was obtained, in the paper by WU TSAI-FU, thanks to the dimensioning of clamping capacitance Cc and of the leakage inductance Lr, the inventor has observed that the zero voltage switching of half-bridge switches may be obtained thanks to an energy flow coming from the magnetization inductance L.sub.M and the output inductance L.sub.0.

(28) A possible embodiment of the driving of switches S.sub.1 and S.sub.2 of FIG. 6 will be described in the following.

(29) In the presently considered embodiment, it is assumed that the turn ratio of primary winding T1 is the same as the turn ratio of secondary winding T2, i.e. n=1, which makes the mathematical processing simpler. However, the person skilled in the art will appreciate that the exemplary case may also be applied to the general case wherein the turn ratio differs from each other.

(30) FIGS. 7A-7F shows in this respect the wave forms of some signals during these driving modes. Specifically, FIGS. 7A-7F respectively show:

(31) a) the driving signal V.sub.G1 for switch S.sub.1 and the driving signal V.sub.G2 for switch S.sub.2,

(32) b) the voltage V.sub.DS2 across switch S.sub.2,

(33) c) the current I.sub.DS2 which corresponds to the sum of the currents flowing through switch S.sub.2, capacitance C.sub.A2 and diode D.sub.A2,

(34) d) the current I.sub.DS1 corresponding to the sum of the currents flowing through switch S.sub.1, capacitance C.sub.A1 and diode D.sub.A1,

(35) e) the current I.sub.D flowing through diode D, and

(36) f) the voltage V.sub.CRS across capacitance C.sub.RS.

(37) Specifically, at a time t0, switch S.sub.1 is closed and switch S.sub.2 remains open. Moreover, diodes D.sub.A1, D.sub.A2 and D are open during this operating mode (M1). The corresponding equivalent circuit of this driving mode is shown in FIG. 8A.

(38) Specifically, as it will become clear in the following, in the presently considered embodiment switch S.sub.1 is closed at zero voltage (ZVS).

(39) Substantially, during this driving mode, a voltage corresponding to V.sub.in−V.sub.CRP, i.e. the voltage across capacitor C.sub.RP, is applied to primary winding T1 of transformer T, i.e.
V.sub.T1=V.sub.in−V.sub.CRP  (2)

(40) Therefore, the same voltage is also applied to secondary switching T2 of transformer T, because n=1:
V.sub.T2=V.sub.T1  (3)

(41) This voltage across secondary winding T2 and voltage V.sub.CRS across capacitor C.sub.RS are applied to inductor L.sub.0 and to output 106, i.e. C.sub.0 and R.sub.L. Typically, inductance L.sub.R is much smaller than inductance L.sub.0, i.e. L.sub.R<<L.sub.0, and therefore the voltage across inductance L.sub.R may be neglected. Therefore, the current I.sub.Lo flowing through inductor L.sub.0 corresponds during this mode substantially to:

(42) $\begin{array}{cc}{I}_{\mathrm{LO}}\left(t\right)=I_{\mathrm{LO}}\left(t0\right)+\frac{\left(V_{T2}+V_{\mathrm{CRS}}-V_o\right)}{L_0}\left(t-t0\right)& \left(4\right)\end{array}$
i. e., during this operating mode current I.sub.Lo which flows through inductance L.sub.0 increases in a substantially linear way, starting from the value of current I.sub.Lo(t0) at time t0, which is also visible in FIG. 7D, showing current I.sub.DS1 flowing through switch S.sub.1.

(43) At a time t1, switch S.sub.1 is opened and switch S.sub.2 still remains open. Therefore, at time t1, current I.sub.Lo flowing through inductor L.sub.0 has reached the following value:

(44) $\begin{array}{cc}{I}_{\mathrm{LO}}\left(t1\right)=I_{\mathrm{LO}}\left(t0\right)+\frac{\left(V_{T2}+V_{\mathrm{CRS}}-V_o\right)}{L_0}\left(t1-t0\right)& \left(5\right)\end{array}$

(45) Moreover, diodes D.sub.A1, D.sub.A2 and D are still open during this operating mode (M2). The corresponding equivalent circuit diagram of this driving mode is shown in FIG. 8B.

(46) In the presently considered embodiment, current I.sub.P flowing through the primary side of transformer T, i.e. current I.sub.IM flowing through magnetization inductance and the current flowing through the ideal primary winding T1 (i.e., for example, the current across inductor L.sub.0), also flows through capacitances C.sub.A1 and C.sub.A2:
I.sub.P=I.sub.LM+I.sub.L0  (6)

(47) Therefore, during this operating mode, capacitor C.sub.A2 is discharged, and voltage V.sub.DS2 across switch S.sub.2 falls to zero thanks to that current. For example, as shown in FIG. 7B, voltage V.sub.DS2 across switch S.sub.2 (and therefore also across capacitance C.sub.A2) decreases.

(48) At time t2 voltage V.sub.DS2 across switch S.sub.2 reaches zero. Therefore, in this operating mode (M3), at this point current I.sub.P flowing through the primary side of transformer T only flows through diode D.sub.A2 and the voltage V.sub.DS2 across switch S.sub.2 stays set to zero, which creates the condition for a zero voltage switching of switch S2. Moreover, during this operating mode diode D is closed and the current of the resonant circuit including inductance L.sub.R and capacitors C.sub.RS and C.sub.RP connected in series, and also the current flowing through inductor L.sub.0 start flowing through diode D (see for example FIG. 7E):
I.sub.D=I.sub.CRS+I.sub.Lo  (7)

(49) The corresponding equivalent circuit diagram of this driving mode is shown in FIG. 8C.

(50) At time t3 switch S.sub.2 is closed and switch S.sub.1 stays open. Therefore, in this operating mode (M4) diodes D.sub.A1, D.sub.A2 are open and diode D stays active. The corresponding equivalent circuit diagram of this driving mode is shown in FIG. 8D.

(51) Substantially, in this operating mode, driving signal V.sub.G2 closes switch S.sub.2 and, thanks to the fact that voltage V.sub.DS2 has been set to zero through diode D.sub.A2, switching is performed at zero voltage.

(52) Moreover, the resonant frequency of the current flowing through diode D substantially corresponds to:

(53) $\begin{array}{cc}\mathrm{fr}=\frac{1}{2\pi \sqrt{L_R{C}_R}}& \left(8\right)\end{array}$
wherein C.sub.R corresponds to capacitance C.sub.RP connected in series with capacitance C.sub.RS.

(54) Substantially, capacitor C.sub.RS is charged again during this mode, which is shown in FIG. 7F, and the magnetization current in the magnetization inductance L.sub.M increases.

(55) Therefore, at time t4 the current flowing through diode D reaches zero and diode D is switched off, while switch S.sub.2 stays closed, switch S.sub.1 stays open, and in this operating mode (M5), too, diodes D.sub.A1, D.sub.A2 are open. The corresponding equivalent circuit of this driving mode is shown in FIG. 8E.

(56) Specifically, the inventor has observed that diode D opens when the current flowing through inductor L.sub.0 equals the resonance current of the resonant circuit, including inductance L.sub.R and capacitors C.sub.RS and C.sub.RP.

(57) Nevertheless, there may exist situations, typically at a low duty cycle, wherein the magnetizing current on the primary may still be negative when the resonance has ended.

(58) This is shown for example in FIGS. 9A-9E, which respectively show:

(59) a) the driving signal V.sub.G1 for switch S.sub.1 and the driving signal V.sub.G2 for switch S.sub.2,

(60) b) the voltage V.sub.DS2 across switch S.sub.2,

(61) c) the current I.sub.DS1 which corresponds to the sum of the currents which flow through switch S.sub.1, capacitance C.sub.A1 and diode D.sub.A1,

(62) d) the current I.sub.DS2 which corresponds to the sum of the currents flowing through switch S.sub.2, capacitance C.sub.A2 and diode D.sub.A2, and

(63) e) the current I.sub.D flowing through diode D.

(64) Therefore, in this situation, current I.sub.L0 which flows through inductor L.sub.0 will no longer flow through diode D, but it will start flowing through capacitor C.sub.RS, which is shown in FIG. 10. However, such a current will also impose a current on leakage inductance L.sub.R, bringing its voltage from negative to zero.

(65) This is shown for example in FIGS. 11A-11C, which respectively show:

(66) a) the voltage V.sub.LR across inductance L.sub.R,

(67) a) the voltage V.sub.CRS across capacitor C.sub.RS, and voltage V.sub.CRP across capacitor C.sub.RP, and

(68) c) the current I.sub.D which flows through diode D, the current I.sub.L0 which flows through inductor L.sub.0, and the current I.sub.LR which flows across inductance L.sub.R.

(69) Specifically, at time t4 currents I.sub.LO and I.sub.LR are equal and opposed, and therefore current I.sub.D flowing through diode D is zero (see FIG. 11C) and current I.sub.LO takes voltage V.sub.LR across inductance L.sub.R to zero (see FIG. 11A), i.e.:
V.sub.T1=V.sub.CRP=V.sub.T2<V.sub.CRS
and, neglecting the voltage across leakage inductance L.sub.R, voltage V.sub.D across the diode is:
V.sub.D=V.sub.CRS−V.sub.T2<0

(70) As a consequence, the current will no longer flow through diode D, but it will charge capacitor C.sub.RP and discharge capacitor C.sub.RS. However, at a time t4′ the voltages across both capacitors are the same, i.e. voltage V.sub.T1 across primary winding T1 is equal to the voltage across secondary winding T2, to the voltage across capacitor C.sub.RP, and to the voltage across capacitor C.sub.RS:
V.sub.T1=V.sub.CRP=V.sub.T2=V.sub.CRS
and therefore the voltage across diode D is zero:
V.sub.D=0

(71) As a consequence, from time t4′, current I.sub.LO may flow again across diode D, but now the circuit is the same as at time t3 and inductance L.sub.R with capacitors C.sub.RP and C.sub.RS may start oscillating again, and therefore a new oscillation will start; i.e., during the third time interval there may be present one or several half periods of the resonance of such an oscillation.

(72) At time t5, switch S.sub.2 is opened, while switch S.sub.1 remains open. Moreover, diodes D.sub.A1, D.sub.A2 and D are open in this operating mode (M6). The corresponding equivalent circuit diagram of this driving mode is shown in FIG. 8F. In this context, the dimensioning of components and the switching period should ensure that at time t5 there is no more orcillation, as shown in FIGS. 9A-9E, 10 and 11A-11C, and current I.sub.P through the primary winding has become positive.

(73) Therefore, during this first operating mode, current I.sub.P on the primary side of transformer T discharges capacitance C.sub.A1 and charges capacitance C.sub.A2 until the voltage across switch S.sub.2 reaches the input voltage V.sub.in at a time t6, which is shown in FIGS. 7B-7D.

(74) In fact, at time t6, diode D.sub.A1 is closed and voltage V.sub.DS2 corresponds to input voltage V.sub.in, which generates the condition for a zero voltage switching for switch S.sub.1. Diodes D.sub.A2 and D stay open during this operation mode (M7). The corresponding equivalent circuit diagram of this operating mode is shown in FIG. 8G.

(75) Therefore, in various embodiments, the control unit drives the half-bridge switches with the following steps, which are periodically repeated: during a first time interval Δt1 switch S.sub.1 is closed and switch S.sub.2 is open (times t0-t1); during a second time interval Δt2 switch S.sub.1 is open and switch S.sub.2 is open (times t1-t3); wherein, during said second time interval Δt2, capacitance C.sub.A1 associated to switch S.sub.2 is charged and capacitance C.sub.A2 associated to switch S.sub.2 is discharged, creating the condition for a zero voltage switching of switch S.sub.2; during a third time interval Δt3 switch S.sub.1 is open and switch S.sub.2 is closed (times t3-t5); wherein, during said third time interval Δt3, the magnetization current of the magnetization inductance increases and diode D of the ZETA converter is switched off at zero current; and during a fourth time interval Δt4 switch S.sub.1 is open and switch S.sub.2 is open (times t5-t0); wherein, during such a time interval Δt4, capacitance C.sub.A2 associated to switch S.sub.2 is charged and capacitance C.sub.A1 associated to switch S.sub.1 is discharged, creating the condition for a switching at zero voltage of switch S.sub.1.

(76) Therefore, the duration of the first time interval Δt1 in which switch S.sub.1 is closed may be controlled so that output voltage V.sub.o reaches a desired value, as shown for example in equation (5). For example, to the purpose it is possible to use a feedback of the output voltage V.sub.o which increases or decreases such durations until the supply signal reaches a desired value.

(77) In various embodiments, intervals Δt2 and Δt4 may be constant, and the duration of interval Δt3 may be varied to have a fixed switching frequency, i.e.
Δt3=Ts−Δt1−Δt2−Δt4  (9)
wherein Ts is the duration of a switching period which is constant.

(78) Some general considerations about the dimensioning of the various components enabling a zero voltage switching of switches S.sub.1 and S.sub.2 will be explained in the following.

(79) Specifically, the inventor has observed that, thanks to the previously described driving arrangement, the switching of switch S.sub.1 at time t1 and the switching of switch S.sub.2 at time t3 are not very critical. However, there may occur situations wherein:

(80) a) the switching of switch S.sub.1 at time t0 does not take place at zero voltage, because voltage V.sub.DS2 across switch S.sub.2 has not reached the value of input current V.sub.in, and/or

(81) b) the switching of switch S.sub.2 at time t5 switches off diode D at non-zero current.

(82) FIG. 12 shows in this respect a simplified circuit diagram for the operating mode M6.

(83) Specifically, in the considered embodiment, a capacitor C.sub.eq is connected in parallel to switch S.sub.2. Moreover, a circuit LC including an inductance L.sub.P and a capacitance C.sub.RP is connected in parallel to switch S.sub.2.

(84) In the presently considered embodiment:

(85) a) the voltage V.sub.CRP across capacitor C.sub.RP is considered substantially constant;

(86) b) the inductor L.sub.P represents the magnetization inductance connected in parallel with inductor L.sub.0 (also in this instance neglecting leakage inductance L.sub.R);

(87) c) the capacitance C.sub.eq represents capacitances C.sub.A1 e C.sub.A2, and possible other capacitances, wherein capacitance C.sub.eq is typically much smaller than capacitance C.sub.RP (C.sub.eq<<C.sub.RP).

(88) As previously explained, when switch S.sub.2 is opened at time t5, voltage V.sub.DS2 increases starting from 0 V.

(89) If current I.sub.P flowing through the primary side of transformer T equals zero at time t5, voltage V.sub.DS2 starts oscillating with a frequency of:

(90) $\begin{array}{cc}\mathrm{fr}=\frac{1}{2\pi \sqrt{L_P{C}_{\mathrm{eq}}}}& \left(10\right)\end{array}$

(91) The maximum value that voltage V.sub.DS2 may reach in the operating mode M6 substantially corresponds to the peak-to-peak value of the oscillation, and the minimum value V.sub.DS2,min corresponds to
V.sub.DS2,min=2.Math.V.sub.in.Math.D.sub.min  (11)
wherein D.sub.min represents the minimum duty cycle, i.e. the duty cycle for the smallest ratio between output voltage V.sub.o and input voltage V.sub.in.

(92) However, as such a duty cycle is typically lower than 0.5, voltage V.sub.DS2 cannot reach voltage V.sub.in at time t6, which is essential to enable a zero voltage switching of switch S.sub.1.

(93) Therefore, according to the present description, the missing energy is supplied via inductor L.sub.P, which must store at least the following energy:

(94) $\begin{array}{cc}\frac{1}{2}{L}_P{I}_p^2\ge \frac{1}{2}{C}_{\mathrm{eq}}\left[V_{\mathrm{in}}^2-{\left(2.Math.V_{\mathrm{in}}.Math.D_{\min }\right)}^2\right]& \left(12\right)\end{array}$
wherein current I.sub.p corresponds to:

(95) $\begin{array}{cc}{I}_p=\frac{V_{\mathrm{in}}.Math.D_{\min }\left[\left(1-D_{\mathrm{mi}n}\right)T_s\right]/2}{L_P}-\left(I_o-\frac{\Delta I_{L0}}{2}\right)& \left(13\right)\end{array}$

(96) For example, if the minimum duty cycle D.sub.min is higher than 0.5 (D.sub.min>0.5), current I.sub.p may also be zero, i.e.

(97) $\begin{array}{cc}\frac{V_{\mathrm{in}}.Math.D_{\min }\left[\left(1-D_{\mathrm{mi}n}\right)T_s\right]/2}{L_P}-\left(I_o-\frac{\Delta I_{L0}}{2}\right)=0& \left(14\right)\end{array}$
and, as a consequence, the value of inductance L.sub.P may be calculated as:

(98) $\begin{array}{cc}{L}_P\le \frac{V_{\mathrm{in}}.Math.D_{\min }\left[\left(1-D_{\mathrm{mi}n}\right)T_s\right]/2}{\left(I_o-\frac{\Delta I_{L0}}{2}\right)}& \left(15\right)\end{array}$

(99) On the contrary, if the minimum duty cycle D.sub.min is lower than 0.5 (D.sub.min<0.5), current I.sub.P must supply the missing energy. For example, this may be obtained by dimensioning L.sub.P in the following way:

(100) $\begin{array}{cc}{L}_P\le \frac{\left(2\mathrm{BC}+A\right)-\sqrt{{\left(2\mathrm{BC}+A\right)}^2-4B^2{C}^2}}{2C^2}& \left(16\right)\end{array}$
wherein:

(101) 0$-A=C_{\mathrm{eq}}.Math.V_{\mathrm{in}}^2-{\left(2.Math.V_{\mathrm{in}}{D}_{\min }\right)}^2.Math.-B=V_{\mathrm{in}}.Math.D_{\min }\left[\left(1-D_{\mathrm{mi}n}\right)T_s\right]/2-C=\left(I_o-\frac{\Delta I_{L0}}{2}\right)$

(102) Therefore, by knowing the value of inductance L.sub.p, it is possible to dimension inductances L.sub.M and L.sub.0.

(103) For example, inductance L.sub.0 is typically sized according to the current ripple ΔI.sub.L0 which is desired at the output, as if it was a Buck converter.

(104) Therefore, by knowing L.sub.p and L.sub.0, it is possible to solve the following equation in order to calculate the value of L.sub.M:

(105) $L_P=\frac{\left(L_M*n^2*L_0\right)}{\left(L_M+n^2*L_0\right)}$

(106) Finally, the resonance time Tr=π√{square root over (L.sub.RC.sub.R)} limits the maximum duty cycle. Therefore, by reducing time Tr a higher duty cycle can be obtained, and the output voltage may vary more. For this reason, with the previously described sizing, such a time should be lower than the minimum time during which switch S.sub.1 is off, i.e.:
Tr=π√{square root over (L.sub.RC.sub.R)}≦(1−D.sub.max)T.sub.s  (17)
wherein D.sub.max is the maximum duty cycle.

(107) However, by reducing duration Tr, the current peak in diode D increases. In this context, the inventor has observed that a reasonable value for duration Tr is:

(108) $\begin{array}{cc}\mathrm{Tr}=\frac{1}{4}{T}_s& \left(18\right)\end{array}$
wherein T.sub.s is the switching period of the converter, i.e. the duration between two subsequent times t0 in which switch S.sub.1 is switched on.

(109) Finally, in order to enable a switching of switch S.sub.2 at time t5 by switching off diode D at zero current, the value of capacitance C.sub.R may be calculated as:

(110) $\begin{array}{cc}{C}_R\le \frac{{\mathrm{Tr}}^2}{{\pi }^2{L}_R}& \left(19\right)\end{array}$

(111) For example, if input voltage V.sub.in is 400 VDC, the output current is between 0 and 2 A, and the switching frequency fs is between 20 and 100 kHz, the components may have the following values: a capacitance C.sub.eq up to 1.5 nF; an inductance L.sub.p between 200 pH and 3 mH.

(112) Therefore, with the previously described dimensioning and considering a supply of 60 W, it is possible to use MOSFETs with a capacity of about 100 pF, wherein an additional capacitor with a capacity up to 400 pF may be connected in parallel with each switch. In fact, in this case, the equivalent capacity C.sub.eq in the switching node may therefore be seen as a capacity of about 1000 pF.

(113) Accordingly, by sizing the various components in a suitable way, the previously described driving method may therefore operate switches S.sub.1 and S.sub.2 of the half bridge at zero voltage. Such a zero voltage switching may also be obtained for a wide interval of possible duty cycles/output voltages. Moreover, also the diode of the ZETA converter is switched at zero current. As a consequence, the switches of the half bridge may have a reduced size, and also the electromagnetic interferences are reduced.

(114) Generally, in this way, the converter may be operated with a fixed switching frequency, wherein the output inductance L.sub.0 may be operated both in the CCM mode and in the DCM mode.

(115) While the disclosed embodiments have been particularly shown and described with reference to specific embodiments, it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the disclosed embodiments as defined by the appended claims. The scope of the disclosed embodiments is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced.