Dynamic maneuvering configuration for multiple control modes in a unified servo system

Abstract

Systems and methods that provide control circuits having multiple sub-control inputs that control operation of a power electronics device (e.g., a power converter). Each of the multiple sub-control inputs are output from a separate sub-control circuit that includes a feedback circuit having an input tied to a common control node. The common control node is coupled to an input of a controller (e.g., a PWM controller). Outputs of each of the sub-control circuits are coupled to the common control node by a respective switch (e.g., diode, transistor, etc.) so that each of the sub-control circuits may be selectively coupled to the common control node to provide a control signal to a controller. Since components of each of the feedback compensations circuits are biased at a regulation voltage instead of a higher power supply voltage, the control circuit may switch between control modes with minimal delay.

Claims

1. A control circuit to control the operation of a power electronics device, the control circuit comprising: a common control node that in operation provides a regulation voltage to the power electronics device; and a plurality of sub-control circuits, each of the plurality of sub-control circuits includes an output selectively coupled to the common control node via a respective one of a plurality of switches, one of plurality of switches closes at a time, and each of the sub-control circuits includes a capacitive feedback compensation circuit which provides AC compensation for the sub-control circuit, the feedback compensation circuit having a capacitor directly electrically connected to the common control node to bias the capacitor at the regulation voltage of the common control node such that, during a transition of control from a first one of the plurality of sub-control circuits to a second one of the plurality of sub-control circuits, the capacitor for the second one of the plurality of sub-control circuits discharges from the regulation voltage of the common control node.

2. The control circuit of claim 1, further comprising: a first reference voltage supply coupled to an input of a first one of the plurality of sub-control circuits; and a second reference voltage supply coupled to an input of a second one of the plurality of sub-control circuits.

3. The control circuit of claim 2 wherein the first reference voltage supply provides a voltage indicative of a reference output voltage for the power electronics device, and the second reference voltage supply provides a voltage indicative of a reference output current for the power electronics device.

4. The control circuit of claim 1, further comprising: a controller that includes a control input, the control input electrically coupled to the common control node.

5. The control circuit of claim 1, further comprising: a first parameter sense circuit that includes an output indicative of a first parameter of the power electronics device, the output coupled to an input of a first one of the plurality of sub-control circuits; and a second parameter sense circuit that includes an output indicative of a second parameter of the power electronics device, the output coupled to an input of a second one of the plurality of sub-control circuits.

6. The control circuit of claim 5 wherein at least one of the first parameter or the second parameter includes an output voltage, an output current, or a temperature of a component of the power electronics device.

7. The control circuit of claim 1 wherein at least one of the plurality of switches is in the form of a diode or a transistor.

8. A method of controlling a power electronics device, the method comprising: providing a common control node that in operation provides a regulation voltage; coupling the common control node to a controller of the power electronics device; and for each of a plurality of sub-control circuits, coupling an output of the sub-control circuit to the common control node via a switch; and connecting a capacitor of a capacitive feedback compensation circuit directly to the common control node to bias the capacitor at the regulation voltage of the common control node such that, during a transition of control from a first one of the plurality of sub-control circuits to a second one of the plurality of sub-control circuits, the capacitor for the second one of the plurality of sub-control circuits discharges from the regulation voltage of the common control node.

9. The method of claim 8, further comprising: providing a first control signal from a first one of the sub-control circuits to the controller via the common control node by closing a first one of the switches associated with the first one of the sub-control circuits; opening the first one of the switches associated with the first one of the sub-control circuits; and closing a second one of the switches associated with a second one of the plurality of sub-control circuits to provide a second control signal from the second one of the plurality of sub-control circuits to the controller via the common control node.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

(1) In the drawings, identical reference numbers identify similar elements or acts. The sizes and relative positions of elements in the drawings are not necessarily drawn to scale. For example, the shapes of various elements and angles are not drawn to scale, and some of these elements are arbitrarily enlarged and positioned to improve drawing legibility. Further, the particular shapes of the elements as drawn, are not intended to convey any information regarding the actual shape of the particular elements, and have been solely selected for ease of recognition in the drawings.

(2) FIG. 1 is a block diagram of a conventional power converter.

(3) FIG. 2 is a block diagram of a power converter that includes two control inputs that dynamically control a servo system, and control circuitry to accelerate handoff between the two control inputs, according to at least one illustrated embodiment.

(4) FIG. 3A is a graph of an output voltage (V.sub.CA) for a current control amplifier of the conventional power converter of FIG. 1, an output voltage (V.sub.EA) for a voltage control amplifier of the conventional power converter, and a common control node voltage (V.sub.CONTROL) of the power converter during a transition from a constant voltage control mode to a constant current control mode.

(5) FIG. 3B is a graph of an output voltage (V.sub.CA) for a current control amplifier of the power converter of FIG. 2, an output voltage (V.sub.EA) for a voltage control amplifier of the power converter, and a common control node voltage (V.sub.CONTROL) of the power converter during a transition from a constant voltage control mode to a constant current control mode.

(6) FIG. 4 is a block diagram of a control circuit that controls the operation of a power electronics device, according to at least one illustrated embodiment.

(7) FIG. 5 is a flow diagram showing a method for controlling a power electronics device, according to at least one illustrated embodiment.

DETAILED DESCRIPTION

(8) In the following description, certain specific details are set forth in order to provide a thorough understanding of various disclosed embodiments. However, one skilled in the relevant art will recognize that embodiments may be practiced without one or more of these specific details, or with other methods, components, materials, etc. In other instances, well-known structures associated with power electronics have not been shown or described in detail to avoid unnecessarily obscuring descriptions of the embodiments.

(9) Unless the context requires otherwise, throughout the specification and claims that follow, the word “comprise” and variations thereof, such as, “comprises” and “comprising” are to be construed in an open, inclusive sense, that is as “including, but not limited to.”

(10) Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

(11) As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” include plural referents unless the content clearly dictates otherwise. It should also be noted that the term “or” is generally employed in its broadest sense, that is, as meaning “and/or” unless the content clearly dictates otherwise.

(12) The headings and Abstract of the Disclosure provided herein are for convenience only and do not interpret the scope or meaning of the embodiments.

(13) Embodiments of the present disclosure are directed to systems and methods for facilitating accelerated handover time between servo control modes for power electronics devices, such as DC/DC power converters, AC/DC power converters, etc. One or more embodiments disclosed herein reduce or eliminate high transient input current that would otherwise occur during overcurrent conditions, such as short circuit conditions. One or more embodiments may also reduce or eliminate excessive input current ripple and output voltage ripple during startup of a power converter, especially when providing power to a capacitive load, which tends to otherwise cause overshoot or “ringing” at startup.

(14) FIG. 2 shows a power converter 100 that exhibits significantly improved behavior by minimizing transients appearing at the input and output when control of the power converter changes from one control mode to another. In the illustrated embodiment, the power converter 100 operates by repeatedly opening and closing a power switch 102. The switch 102 may, for example, take the form of a metal oxide semiconductor field-effect transistor (MOSFET), a bipolar junction transistor (BJT), one or more diodes, etc. In some embodiments, the power converter 100 may include a plurality of switches 102 (e.g., two switches used in a push-pull converter). The power converter 100 may take the form of a boost converter, buck converter, buck-boost converter, flyback converter, or any other DC/DC, AC/DC, DC/AC, or AC/AC circuits.

(15) In some implementations, closing the switch 102 causes a current to flow from a direct current (DC) input source 104 through a winding of a magnetizable part 106, such as a primary winding of transformer or through an inductor. In one example, a rough DC voltage is present between two terminals of the switch 102. In another example, an alternating current (AC) line voltage may, for example, be rectified by a bridge rectifier (not shown) and an associated smoothing capacitor (not shown) to provide rectified and smoothed rough DC voltage to the terminals of the switch 102.

(16) When the switch 102 is closed, the current that flows through the magnetizable part 106 causes energy to be stored in the magnetizable part. The switch 102 is then opened. When the switch 102 is opened, energy stored in magnetizable part 106 is transferred to an output node 108 of the power converter 100 in the form of current that flows through a rectifier and output filter 110 (e.g., a diode and a capacitor). The current may charge the output filter 110. In steady state operation in a constant voltage (CV) mode, the switch 102 may be switched to open and close rapidly and in such a manner that an output voltage V.sub.OUT on the output filter 110 at the output node 108 remains substantially constant.

(17) The power converter 100 includes a controller 112 that controls the opening and closing of the switch 102. The controller 112 may be coupled to a switch driver (not shown). In some embodiments, the controller 112 is a pulse width modulation (PWM) controller, for example. PWM is a modulation technique that controls the width of a control pulse based on modulator signal information. The average value of voltage (and current) fed to a load at the output node 108 is controlled by turning the switch 102 between the DC input source 104 and a load (i.e., the circuit or device that receives the power from the power converter) ON and OFF at a fast pace. Generally, the longer the switch 102 is ON compared to the OFF periods, the higher the power supplied to the load. The switching frequency is generally much faster than what would affect the load. Typical switching frequencies for power converters range from the tens to hundreds of kilohertz (kHz), for example 50-600 kHz.

(18) An advantage of PWM control is that power loss in the switching devices is very low. When a switch is OFF there is practically no current, and when it is ON, there is almost no voltage drop across the switch. Power loss, being the product of voltage and current, is thus in both cases close to zero.

(19) In the CV operational mode, the output voltage V.sub.OUT is sensed by a voltage sense circuit 114 (e.g., a resistor divider). An output node 116 of the voltage sense circuit 114 is coupled to an inverting input terminal of a voltage control amplifier 118. The voltage control amplifier 118 may be coupled to a positive power supply and a negative power supply (e.g., V.sub.CC and ground, +V.sub.CC and −V.sub.CC, etc.). The voltage control amplifier 118 compares the voltage at the output node 116 of the voltage sense circuit 114 to a reference voltage V.sub.REF1 coupled to a non-inverting input terminal and outputs the result of the comparison onto an output terminal of the voltage control amplifier 118 at a node 119 (V.sub.EA).

(20) A feedback compensation circuit 120 is coupled between the inverting input terminal of the voltage control amplifier and a common control node 122. In this illustrated example, the feedback compensation circuit 120 includes a compensation or feedback capacitor 124 and a feedback resistor 126 connected together in series. An input node 128 of the feedback compensation circuit 120 is coupled to the common control node 122 of the power converter 100 and an output node 130 of the feedback compensation circuit is coupled to the inverting input terminal of the voltage control amplifier 118. In other embodiments, different resistor-capacitor (RC) feedback compensation circuits may be utilized to achieve a desired feedback transfer function.

(21) If the comparison of the voltage control amplifier 118 inverting input is lower than its non-inverting input (i.e., V.sub.OUT is below regulation), then the output voltage of the amplifier 118 will increase to the required voltage at the common control node 122 to maintain regulation of V.sub.OUT. If the comparison of the amplifier 118 inverting input is greater than its non-inverting input (i.e., V.sub.OUT is above regulation), then the output voltage of amplifier 118 will decrease to the required voltage at the common control node 122 to maintain regulation of V.sub.OUT. In both cases, this error voltage (V.sub.CONTROL) at the common control node 122 is indicative of the output voltage V.sub.OUT. Pull-up resistor 132 provides the sourcing current for the amplifier 118. A control input of the controller 112 is coupled to the common control node 122 and, based on the received error voltage, the controller 112 controls the on/off duty cycle of the switch 102 to regulate the output voltage V.sub.OUT at the output node 108.

(22) In the constant-current (CC) operational mode, the current I.sub.OUT being supplied by the power converter 100 is sensed by a current sense circuit 136 (e.g., a sense resistor). The voltage on an output node 138 of the current sense circuit 136 is coupled to an inverting input terminal of a current control amplifier 140. The current control amplifier 140 may be coupled to a positive power supply and a negative power supply (e.g., V.sub.CC and ground, +V.sub.CC and −V.sub.CC, etc.). The current control amplifier 140 compares the voltage at the output node 138 of the current sense circuit 136 to a reference voltage V.sub.REF2 coupled to a non-inverting input terminal and outputs the result of the comparison onto an output terminal of the current control amplifier at a node 141 (V.sub.CA).

(23) A feedback compensation circuit 142 is coupled between the inverting input terminal of the current control amplifier and the common control node 122. The feedback compensation circuit 142 includes a compensation or feedback capacitor 144 and a feedback resistor 146 connected together in series. An input node 148 of the feedback compensation circuit 142 is coupled to the common output node 122 of the power converter 100 and an output node 150 of the feedback compensation circuit is coupled to the inverting input terminal of the current control amplifier 140. In other embodiments, different RC feedback compensation circuits may be utilized to achieve a desired feedback transfer function.

(24) If the voltage output by the current sense circuit 136 is greater than a predetermined value, then the current control amplifier 140 causes the voltage on an output terminal thereof to decrease to a relatively low voltage as necessary at the common control node 122 (V.sub.CONTROL) to maintain the predetermined limit of the output load I.sub.OUT. Pull-up resistor 132 provides the sourcing current for the amplifier 140. The voltage sensed by the controller 112 is therefore indicative of the magnitude of the output current I.sub.OUT. Based on the common control node 122 voltage, the controller 112 controls the on/off duty cycle of switch to regulate output current I.sub.OUT.

(25) In this example, the blocking diodes 134 and 152 are configured as switches such that a minimum error signal is selected and provided to the controller 112. Thus, the diodes may be referred to as being in an “ORed” or “ORing” configuration. Other passive or active components may be used to achieve the same switching functionality. For example, one or more transistors (e.g., FETs, BJTs, etc.), integrated circuits (e.g., ideal diode circuits), or the like may be used to provide the switching functionality. The control of such switches may be automatic, as in the illustrated embodiment, or one or more switches may be controlled one or more control circuits or control logic.

(26) In the illustrated example, the power converter 100 operates either in the constant voltage mode or in the constant current mode, depending on the loading condition. In one example, if the output current I.sub.OUT exceeds a specified current (e.g., a short circuit condition), then the power converter 100 operates in the constant current (CC) mode. Otherwise, the power converter 100 operates in the constant voltage (CV) mode. Thus, in some embodiments the CC mode is used as a current limiter or protection circuit, while the CV mode is used as a “normal” operating mode.

(27) Depending on design/safety requirements, the power converter 100 may contain an isolation mechanism, such as opto-couplers or magnetizable components, to isolate the DC input source from the load.

(28) In the power converter 100 of FIG. 2, the input nodes 128 and 148 of the feedback compensation circuits 120 and 142, respectively, are coupled to the common control node 122, which is coupled to a control input of the controller 112. As discussed below, this configuration dynamically controls the servo signal applied to the common control node 122 dependent on the inputs to the voltage control amplifier 118 and the current control amplifier 140. In some embodiments, the power converter 100 is operative to transition between the CV control mode and the CC control mode within about one clock cycle (e.g., approximately 1.8 microseconds at a 550 kHz clock cycle) opposed to tens of clock cycles (e.g., 90-100 microseconds) required for conventional control circuits.

(29) When the power converter 100 operates in the CV mode, the voltage control amplifier 118 is operating in its linear region and regulating the output voltage (V.sub.EA) at the output terminal at a relatively low regulation point V.sub.CONTROL-CV (e.g., one or two volts). The output voltage (V.sub.CA) of the current control amplifier 140, which is not in control in the CV mode, is very close to the positive power supply rail V.sub.CC (e.g., five volts). Since the feedback capacitors 124 and 144 are both coupled to the common control node 122, each of the feedback capacitors is charged to approximately V.sub.EA (e.g., the voltage V.sub.CONTROL at the common control node 122 equals V.sub.EA plus any voltage drop across the blocking diode 134).

(30) When control switches from the voltage control amplifier 118 to the current control amplifier 140, for example, due to a short circuit condition, the output voltage V.sub.CA of the current control amplifier swing downs from near V.sub.CC toward a regulation voltage V.sub.CONTROL-CC (i.e., V.sub.REF2) until the blocking diode 152 is conducting and begins to discharge the feedback capacitor 144 while beginning to control the voltage V.sub.CONTROL at the common control node 122. This is due to the increase in the voltage at the output node 138 of the current sense circuit 136 caused by the increase in output current I.sub.OUT. Unlike conventional control circuits wherein the feedback capacitor 144 is charged fully to V.sub.CC, prior to the mode transition the feedback capacitor 144 is only charged to the regulation voltage V.sub.CONTROL at the common control node (e.g., approximately the output voltage V.sub.EA). This allows the feedback capacitor 144 to be discharged much more rapidly (e.g., within about one clock cycle at a 550 kHz clock cycle).

(31) During the transition from the CV mode to the CC mode, the output voltage V.sub.EA of the voltage control amplifier 118 swings up from V.sub.EA to V.sub.CC, thereby reverse biasing the blocking diode 134. Thereafter the output load current I.sub.OUT is controlled by the output voltage V.sub.CA at the output terminal of the current control amplifier 140.

(32) During recovery from an overcurrent condition (e.g., a short circuit condition is removed), the output voltage V.sub.CA of the current control amplifier 140 begins to swing to V.sub.CC. The output voltage V.sub.EA of the voltage control amplifier 118 begins to swing down from V.sub.CC to a regulation voltage V.sub.CONTROL-CV (i.e., V.sub.REF1). The transition from the CC mode to the CV mode provides a full “soft startup” such that the output voltage does not overshoot during startup or recovery from an overcurrent condition.

(33) FIG. 3A shows a graph 300 of the current control output voltage 47 (V.sub.CA) for the conventional power converter 10 (FIG. 1), the voltage control output voltage 29 (V.sub.EA) for the conventional power converter, and the common control node voltage 38 (V.sub.CONTROL) for the power converter during a transition from the CV mode to the CC mode that occurs at a time t.sub.1. FIG. 3B shows a graph 302 of the current control output voltage 141 (V.sub.CA) for the power converter 100 (FIG. 2), the voltage control output voltage 119 (V.sub.EA) for the power converter, and the common control node voltage 122 (V.sub.CONTROL) for the power converter during a transition from the CV mode to the CC mode that occurs at a time t.sub.1.

(34) As shown in FIG. 3B, when control switches from the voltage control amplifier 118 (FIG. 2) to the current control amplifier 140 at time t.sub.1, the output voltage 141 (V.sub.CA) of the current control amplifier 140 swing downs from near V.sub.CC to a regulation voltage V.sub.CONTROL-CC to control the voltage (V.sub.CONTROL) at the common control node 122 (FIG. 2). During the transition, the output voltage 119 (V.sub.EA) of the voltage control amplifier 118 swings up from V.sub.CONTROL-CV to near V.sub.CC.

(35) Prior to the mode transition, the feedback capacitor 144 is charged to the voltage V.sub.CONTROL at the common control node 122, which is approximately the regulation voltage of the voltage control amplifier V.sub.CONTROL-CV (FIG. 3B). After the transition, the feedback capacitor 144 is discharged to the output voltage 141 (V.sub.CA) of the current control amplifier 140, which in this example is slightly lower than the output voltage of the voltage control amplifier 118, V.sub.CONTROL-CV. As shown, since the feedback capacitor 144 is only discharged from the voltage regulation point V.sub.CONTROL-CV to the current regulation point V.sub.CONTROL-CC, the feedback capacitor is discharged by time t.sub.2, which may be less than a few clock cycles (e.g., one clock cycle, or less).

(36) In contrast, as shown in FIG. 3A, the voltage across a feedback capacitor of a conventional feedback compensation circuit that has been charged to V.sub.CC prior to the mode transition may not be discharged until a later time t.sub.3, which is substantially longer than the time required to discharge the feedback capacitor (i.e., t.sub.3−t.sub.1 versus t.sub.2−t.sub.1). Thus, the current control output voltage 47 (V.sub.CA) takes a relatively long time to fall from V.sub.CC down to V.sub.CONTROL-CC. As noted above, the time required to discharge a feedback capacitor in a conventional feedback compensation circuit may be on the order of tens of clock cycles (e.g., 90-100 microseconds for a 550 kHz clock). By substantially reducing the change in voltage across the feedback capacitor 144 that occurs during transitions between control modes, the power converter 100 operates “uncontrolled” for a relatively short duration, which significantly reduces undesirable transient inrush current and transient output voltages.

(37) FIG. 4 shows a block diagram of a control circuit 400 that may be utilized to provide multiple control inputs to a power electronics device or system, such as a power converter, etc. The control circuit 400 includes a common control node 402 that may be coupled to an input of a controller, such as the controller 112 of FIG. 2.

(38) The control circuit 400 also includes N sub-control circuits SCC.sub.1-N (generally “SCC”). Each of the sub-control circuits SCC.sub.1-N includes a respective amplifier A.sub.1-N, such as an operational amplifier, comparator, transistors, etc. Generally, each of the sub-control circuits SCC may include a forward control circuit (e.g., amplifiers A.sub.1-N). A first input terminal of each of the amplifiers A.sub.1-N is coupled to respective reference voltages V.sub.REF1-N. A second input terminal of each of the amplifiers A.sub.1-N is coupled to a respective input voltage signal V.sub.IN-1 . . . V.sub.IN-N. The input voltage signals V.sub.IN may provide a signal indicative of one or more parameters of a device including, but not limited to, output voltage, output current, output power, input voltage, input current, input power, temperature of a component (e.g., critical junction temperature), and the like.

(39) An output terminal of each of the amplifiers A.sub.1-N is coupled to a first terminal of respective switches SW.sub.1-N. A second terminal of each of the switches SW.sub.1-N is coupled to the common control node 402, such that each of the output terminals of the amplifiers A.sub.1-N may be selectively coupled to the common control node when the switch SW.sub.1-N associated with the amplifier is closed. The switches SW.sub.1-N may be formed from one or more diodes (see FIG. 2), one or more MOSFETS, one or more BJTs, one or more integrated circuits, or any other active or passive components.

(40) Each of the sub-control circuits SCC.sub.1-N further include respective feedback networks or circuits FB.sub.1-N that have input terminals 404 coupled to the common control node 402 and output terminals 406 coupled to an input terminal of the respective amplifier A.sub.1-N. The feedback circuits FB.sub.1-N may each include at least one capacitive element, such as the feedback capacitors 124 and 144 of FIG. 2.

(41) In operation, one of the switches SW.sub.1-N is closed at a particular time so that its respective sub-control circuit SCC.sub.1-N controls the voltage on the common control node 402 that is provided as a control signal to the controller (see FIG. 2). The control circuit 400 may transition between control modes by opening the one of the switches SW that is closed and closing another of the switches so that its respective sub-control circuit SCC may control the voltage on the common control node 402. Since the input nodes 404 of each of the feedback circuits FB.sub.1-N are tied to the common control node 402, the components (e.g., capacitors) of the feedback circuits are biased to a regulation voltage instead of a power rail voltage. Thus, as discussed above with reference to FIGS. 2 and 3, the time required to handover from one sub-control circuit SCC to another is minimized since the change in voltage across the components is greatly reduced. As discussed above, by tying the input nodes 404 of the feedback circuits FB.sub.1-N to the common control node 402, transitions between control modes may be implemented within a very short duration, such as a few clock cycles, or less.

(42) FIG. 5 shows a method 500 for operating a control circuit to provide multiple control inputs for a power electronics system, such as a power converter. The method 500 begins at 502.

(43) At 504 and 506, a common control node is coupled to a control input of a controller, such as a PWM controller for a power converter. At 508, outputs of multiple sub-control circuits are coupled to the common control via switches that may be selectively opened or closed. As discussed above, the switches may operate autonomously or may be controlled by one or more control circuits or logic. The sub-control circuits may output one or more signals indicative of a device parameter, such as voltage, current, temperature, or the like.

(44) At 510, inputs of capacitive feedback circuits associated with each of the sub-control circuits are each coupled to the common control node. Thus, the components of each of the capacitive feedback circuits are each charged to a common voltage (e.g., the regulation voltage at the common control node).

(45) At 512, a first switch associated with a first one of the sub-control circuits may be closed such that the output of the first sub-control circuit is provided to the controller via the common control node. The controller may utilize the output signal from the first sub-control circuit to control the power electronics system in a first control mode.

(46) At 514, the first switch is opened. At 516, a second switch associated with a second one of the sub-control circuits may be closed such that the output of the second sub-control circuit is provided to the controller via the common control node. The controller may utilize the output signal from the second sub-control circuit to control the power electronics system in a second control mode.

(47) The method 500 terminates at 518. The method 500 repeats continuously or may be executed intermittently. One or more acts of the method 500 may be repeated to dynamically provide multiple control inputs to an electronics system. As discussed above, by coupling inputs of feedback circuits of multiple sub-control circuits to a common control node, the control circuit may rapidly transition between multiple control modes, thereby reducing or eliminating undesirable transients that may occur during the mode transitions.

(48) Advantageously, unlike other methods of accelerating the handover time between control modes, the configuration of the control circuits disclosed herein do not change the gain-phase characteristics of the feedback compensation circuits. For example, modifying the feedback compensation circuits to provide faster response times has proved to cause instability. Further, modifying the feedback compensation circuits to provide faster response times may cause problems during startup, especially when power is delivered to a capacitive load, which tends to cause overshoot or ringing at the output during startup.

(49) Moreover, the control circuits disclosed herein reduce or eliminate inrush current during the incursion of an overcurrent condition and while an electronics device remains in an overcurrent condition. Further, the control circuits disclosed herein provide a full soft startup process for an electronics device that does not produce an overshoot on the output voltage (e.g., V.sub.OUT of FIG. 2).

(50) The foregoing detailed description has set forth various embodiments of the devices and/or processes via the use of block diagrams, schematics, and examples. Insofar as such block diagrams, schematics, and examples contain one or more functions and/or operations, it will be understood by those skilled in the art that each function and/or operation within such block diagrams, flowcharts, or examples can be implemented, individually and/or collectively, by a wide range of hardware, software, firmware, or virtually any combination thereof. In one embodiment, the present subject matter may be implemented via Application Specific Integrated Circuits (ASICs). However, those skilled in the art will recognize that the embodiments disclosed herein, in whole or in part, can be equivalently implemented in standard integrated circuits, as one or more computer programs running on one or more computers (e.g., as one or more programs running on one or more computer systems), as one or more programs running on one or more controllers (e.g., microcontrollers) as one or more programs running on one or more processors (e.g., microprocessors), as firmware, or as virtually any combination thereof, and that designing the circuitry and/or writing the code for the software and or firmware would be well within the skill of one of ordinary skill in the art in light of this disclosure.

(51) Those of skill in the art will recognize that many of the methods or algorithms set out herein may employ additional acts, may omit some acts, and/or may execute acts in a different order than specified.

(52) In addition, those skilled in the art will appreciate that the mechanisms taught herein are capable of being distributed as a program product in a variety of forms, and that an illustrative embodiment applies equally regardless of the particular type of nontransitory signal bearing media used to actually carry out the distribution. Examples of nontransitory signal bearing media include, but are not limited to, the following: recordable type media such as floppy disks, hard disk drives, CD ROMs, digital tape, and computer memory.

(53) The various embodiments described above can be combined to provide further embodiments. Aspects of the embodiments can be modified, if necessary, to employ systems, circuits and concepts of the various patents, applications and publications to provide yet further embodiments.

(54) These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.

(55) U.S. patent application Ser. No. 14/333,705, filed Jul. 17, 2014 is incorporated herein by reference in its entirety.