METHOD FOR OPERATING A SILICON CARBIDE (SIC) MOSFET ARRANGEMENT AND DEVICE

Abstract

A method for operating a silicon carbide (SiC) MOSFET arrangement, The arrangement includes two or more SiC MOSFETs, which are set up such that they are connected electrically in parallel with one another, and is arranged in a device. The method comprises the step of switching on the SiC MOSFETs while avoiding overloading individual ones of the SiC MOSFETs. A device is also described which includes a SiC MOSFET arrangement that includes two or more SiC MOSFETs, which are set up such that they are connected electrically in parallel with one another, and a switch unit that is set up for switching the SiC MOSFET arrangement. The switch unit is set up for switching on the SiC MOSFETs while avoiding overloading individual ones of the SiC MOSFETs.

Claims

1-10. (canceled)

11. A method for operating a silicon carbide (SiC) MOSFET arrangement that includes two or more SiC MOSFETs which are connected electrically in parallel with one another, and arranged in a device, the method comprising: switching on the SiC MOSFETs while avoiding overloading individual ones of the SiC MOSFETs.

12. The method as recited in claim 11, further comprising: balancing out differences in a switch-on resistance between the SiC MOSFETs to avoid overload at a time of switching on.

13. The method as recited in claim 11, further comprising: switching off each of the SiC MOSFETs at a respective established negative switch-off voltage that differs from a respective established negative switch-off voltage of each of the other SiC MOSFETs, to avoid overload at a time of subsequently switching on the SiC MOSFETs.

14. The method as recited in claim 13 further comprising: establishing the respective negative switch-off voltage for each respective SiC MOSFET of the SiC MOSFETs depending on a threshold voltage of the respective SiC MOSFET.

15. The method as recited in claim 14, further comprising: establishing the respective negative switch-off voltage for each respective SiC MOSFET such that a decreasing switch-off voltage is allocated to the respective SiC MOSFETs in an order of their increasing threshold voltage.

16. The method as recited in claim 11, further comprising: electrically symmetrical switching on the SiC MOSFETs.

17. The method as recited in claim 11, wherein operation of the SiC MOSFET arrangement is performed by a switch unit.

18. A device, comprising: a silicon carbide (SiC) MOSFET arrangement that includes two or more SiC MOSFETs which are connected electrically in parallel with one another, and a switch unit configured to switch the SiC MOSFET arrangement, wherein the switch unit is configured to switching on the SiC MOSFETs while avoiding overloading individual ones of the SiC MOSFETs.

19. The device as recited in claim 18, wherein the switch unit is configured to switch off each of the SiC MOSFETs at a respective established negative switch-off voltage that differs from a respective established negative switch-off voltage of each of the other SiC MOSFETs, to avoid overload at a time of subsequently switching on the SiC MOSFETs.

20. The device as recited in claim 18, wherein the switch unit is configured to switch the SiC MOSFETs on electrically symmetrically.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Specific exemplary embodiments of the present invention are explained in more detail with reference to the figures and the description below.

[0023] FIG. 1 shows a device according to a first example embodiment of the present invention.

[0024] FIG. 2 shows a method according to the first example embodiment of the present invention.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0025] FIG. 1 shows a device 1 that includes a silicon carbide (SiC) MOSFET arrangement 2 that includes two or more SiC MOSFETs 3a, 3b, 3c, which are set up such that they are connected electrically in parallel with one another, and a switch unit 4 that is set up for switching SiC MOSFET arrangement 2. Switch unit 4 is a programmed control unit, which is connected by way of a respective electrical connection 5 to each of SiC MOSFETs 3a, 3b, 3c at their respective gate terminal (not shown) in order to switch SiC MOSFET arrangement 2. Here, SiC MOSFET arrangement 2 comprises, by way of example, three SiC MOSFETs 3a, 3b, 3c connected in parallel, but in other embodiments only two or indeed more than three SiC MOSFETs 3a, 3b, 3c are provided. For the sake of simplifying the illustration, details of the circuit in which SiC MOSFET arrangement 2 is contained are not presented in more detail, since the present invention relates to operation of SiC MOSFET arrangement 2, and in principle can be used in any device 1 in which such SiC MOSFETs 3a, 3b, 3c connected in parallel with one another are utilized. Here, device 1 is a converter (such as an inverter for electrical drives).

[0026] Switch unit 4 is set up to switch on SiC MOSFETs 3a, 3b, 3c while avoiding overloading individual ones of SiC MOSFETs 3a, 3b, 3c, as explained below. For this purpose, switch unit 4 is set up to switch off each SiC MOSFET 3a, 3b, 3c at a respectively established negative switch-off voltage that differs from the voltage of the other SiC MOSFETs 3a, 3b, 3c, in order to avoid overload at the time of subsequently switching on by switch unit 4. Further, switch unit 4 is set up to switch SiC MOSFETs 3a, 3b, 3c on electrically symmetrically after switching off.

[0027] FIG. 2 shows a specific embodiment of a method for operating a silicon carbide (SiC) MOSFET arrangement 2 that includes two or more SiC MOSFETs 3a, 3b, 3c that are set up such that they are connected electrically in parallel with one another. Switch unit 4 in FIG. 1 is set up to perform the illustrated method.

[0028] In a step S21, differences in a switch-on resistance between SiC MOSFETs 3a, 3b, 3c are balanced out in order to avoid overload at the time of switching on. In a first sub-step U21a of step S21, a respective negative switch-off voltage is established depending on a threshold voltage of the respective SiC MOSFET 3a, 3b, 3c. This establishing may be performed by determining the respective threshold voltage and, depending on this, programming control unit 4 accordingly. Here, the respective switch-off voltage is established such that a decreasing switch-off voltage—that is to say a switch-off voltage of less than zero volts, increasing in numerical terms—is allocated to SiC MOSFETs 3a, 3b, 3c in the order of their increasing threshold voltage. This means that the greater the threshold voltage or switch-on resistance of a SiC MOSFET 3a, 3b, 3c, the lower—that is to say the further away from zero and the larger in numerical terms—the negative switch-off voltage selected. In a table in switch unit 4, there would then be allocated to the SiC MOSFET 3a, 3b, 3c with the highest threshold voltage the negative switch-off voltage that is largest in numerical terms—that is to say the negative switch-off voltage furthest away from zero. By contrast, the smallest negative switch-off voltage in numerical terms—that is to say the negative switch-off voltage closest to zero—would be allocated to the SiC MOSFET 3a, 3b, 3c with the lowest threshold voltage. The other SiC MOSFETs 3a, 3b, 3c would be fit into the table between these two extreme values, in the order of their threshold voltage. In the present example from FIG. 1, the left-hand SiC MOSFET 3a has the highest threshold voltage, and switch unit 4 allocates to it the highest negative switch-off voltage—that is to say the negative switch-off voltage with the highest numerical value. The right-hand SiC MOSFET 3c has the lowest threshold voltage, and switch unit 4 allocates to it the lowest negative switch-off voltage, which lies closer to zero than that of the left-hand SiC MOSFET 3a. The middle SiC MOSFET 3b has a threshold voltage between the other two SiC MOSFETs 3a, 3c, and so switch unit 4 also allocates to the middle SiC MOSFET 3b an individual negative switch-off voltage, which lies between those of the other two SiC MOSFETs 3a, 3c.

[0029] In a second sub-step U21b of step S21, each SiC MOSFET 3a, 3b, 3c is switched off at the respectively established negative switch-off voltage, which differs from the negative switch-off voltage of the other SiC MOSFETs 3a, 3b, 3c, in order to avoid overload at the time of subsequently switching on SiC MOSFETs 3a, 3b, 3c.

[0030] Then, in a step S22, SiC MOSFETs 3a, 3b, 3c are switched on electrically symmetrically by switch unit 4, and thus SiC MOSFETs 3a, 3b, 3c are switched on while avoiding overloading individual ones of the SiC MOSFETs 3a, 3b, 3c. As a result of the previous adaptation of the respective negative switch-off voltages to the individual switch-on resistances of SiC MOSFETs 3a, 3b, 3c in step S21, switching on is performed electrically symmetrically.

[0031] As illustrated by FIGS. 1 and 2, the present invention thus exploits a property of SiC MOSFET 3a, 3b, 3c in order to be able to switch on symmetrically a plurality of semiconductors—that is to say, SiC MOSFETs 3a, 3b, 3c—connected in parallel and having different threshold voltages and switch-on resistances. Thus, the service life of SiC MOSFETs 3a, 3b, 3c can be extended in a simple manner, since overloading of individual SiC MOSFETs 3a, 3b, 3c at the time of switching on is avoided.