Enhanced equalization based on a combination of reduced complexity MLSE and linear equalizer for heavily ISI-induced signals

Abstract

A system for digitally equalizing a data channel with heavily ISI-induced signals received after passing a data communication channel using a combination of a linear equalizer and a nonlinear equalizer, which comprises an ADC, for sampling a received signal and converting it to a digital form; a Linear Equalizer for pre-processing said received signal, said Linear Equalizer is adapted to pre-process a first group consisting of echoes/channel taps of the induced ISI, which are not equalized by said nonlinear equalizer, by eliminating the echoes/channel taps of said first group; pre-process a second group consisting of the combination of the entire echoes/channel taps of the induced ISI, by eliminating the echoes/channel taps of said second group; and a nonlinear equalizer for receiving the signals preprocessed by said Linear Equalizer and for further processing said preprocessed signals and eliminating the echoes/channel taps of the induced ISI to be equalized by said nonlinear equalizer, thereby compensating for the entire ISI induced by said channel.

Claims

1. A system for digitally equalizing a data communication channel with heavily Inter Symbol Interference (ISI)-induced signals received after passing said data communication channel using a combination of a linear equalizer and a nonlinear equalizer, the system comprising: a) an Analog to Digital Converter (ADC), for sampling a received signal and converting said received signal to a digital form; b) a Linear Equalizer for pre-processing said received signal, said Linear Equalizer is adapted to modify an impulse response of said data communication channel by: pre-process some channel taps of the induced Inter Symbol Interference (ISI) signals, which are less effective taps but having a level above a noise level of said data communication channel, and eliminate said less effective channel taps redistributing energy of said less effective channel taps among the remaining channel taps and totally eliminate said less effective taps having a level below the noise level of said data communication channel, without redistributing their energy among the remaining channel taps; c) a nonlinear equalizer for receiving the ISI induced signals preprocessed by said Linear Equalizer and for further processing said preprocessed signals and eliminating the channel taps of the induced Inter Symbol Interference (ISI) signals to be equalized by said nonlinear equalizer; and d) a linear feedback circuitry for continuously adapting filter taps of said Linear Equalizer by constructing an error signal according to a relation between i) samples of the signal received by said data communication channel, ii) an output of the nonlinear equalizer, and iii) an output of the Linear Equalizer, such that an input to said nonlinear equalizer includes only taps that are covered by said nonlinear equalizer, thereby compensating for the entire Inter Symbol Interference signals induced by said channel.

2. The system according to claim 1, wherein the linear feedback circuitry comprises: a) a channel estimation block for receiving the received signal at one input and decoded symbols from an output of the nonlinear equalizer at another input, to estimate a channel's impulse response signal; a Finite Impulse Response (FIR) block for: a.1) receiving a signal which includes the channel taps that are covered by said nonlinear equalizer, from said channel estimation block; a.2) receiving the decoded symbols from the output of said nonlinear equalizer; a.3) constructing an output signal at its output; b) an adder for generating the error signal being a difference between the ISI induced signals at an output of said Linear Equalizer and the output of said FIR block; and c) a tap adaptation block for minimizing said error signal, such that an input to said nonlinear equalizer includes only taps which are covered by said nonlinear equalizer.

3. The system according to claim 1, in which the nonlinear equalizer is a Reduced Complexity Maximum Likelihood Sequence Estimation (RC-MLSE).

4. The system according to claim 1, being adapted to equalize received signals with high order modulations, including: Pulse Amplitude Modulation (PAM)-2; PAM-4; PAM-8; PAM-16; Optical Dual Binary (ODB) modulation; Quadrature Phase Shift Keying (QPSK); Quadrature Amplitude Modulation (QAM)-8; and QAM- 16.

5. The system according to claim 1, being adapted to perform digital equalization of data channels in data networks, including: data center intra-connection; data center interconnection; metropolitan point-to-point connection; and metropolitan Wavelength-Division Multiplexing (WDM).

6. A method for digitally equalizing a data communication channel with heavily Inter Symbol Interference (ISI)-induced signals received after passing a data communication channel, the method comprising: a) sampling a received signal and converting said received signal to a digital form; b) modifying an impulse response of said data communication channel by pre-processing, using a Linear Equalizer, some channel taps of the induced Inter Symbol Interference (ISI) signals, which are less effective taps but having a level above a noise level of said data communication channel; c) eliminate, by using a Linear Equalizer, said less effective channel taps by redistributing energy of said less effective channel taps among the remaining channel taps; d) totally eliminate said less effective taps having a level below the noise level of said data communication channel, without redistributing their energy among the remaining channel taps; e) receiving signals preprocessed by said Linear Equalizer by a nonlinear equalizer; f) continuously adapting, by a linear feedback circuitry, filter taps of the Linear Equalizer according to a relation between i) samples of the signal received by said data communication channel, ii) an output of the nonlinear equalizer, and iii) an output of the Linear Equalizer, such that an input to said nonlinear equalizer includes only taps that are covered by said nonlinear equalizer; and g) compensating for the entire Inter Symbol Interference (ISI) induced by said channel by further processing, by said nonlinear equalizer, said preprocessed signals and eliminating the channel taps of the induced Inter Symbol Interference (ISI) signals to be equalized by said nonlinear equalizer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The above and other characteristics and advantages of the invention will be better understood through the following illustrative and non-limitative detailed description of preferred embodiments thereof, with reference to the appended drawings, wherein:

(2) FIG. 1 (prior art) illustrates an example of the impulse response of a typical data channel with reduced bandwidth;

(3) FIG. 2 illustrates a block diagram of the equalization system proposed by the present invention;

(4) FIG. 3 illustrates the impulse response of a data channel with reduced bandwidth after performing a decoding process, based on a combined processing using a Linear Equalizer and a reduced complexity MLSE (RC-MLSE), as proposed by the present invention;

(5) FIG. 4 is a block diagram of the equalization system of FIG. 2, with continuous adaptation capability of filter taps of the Linear Equalizer, according to the present invention; and

(6) FIG. 5 illustrates comparison results of the Symbol Error Rate (SER) between a receiver scheme which includes an RC-MLSE receiver only and a receiver scheme which includes a combination of an LE and an RC-MLSE.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

(7) The present invention suggests a digital equalization mechanism, which is combined with a Maximum Likelihood Sequence Estimator (MLSE) in digital communication links. The proposed equalization mechanism includes a receiver, which uses a combination of an LE and a Reduced Complexity MLSE (RC-MLSE) to implement a receiver with low implementation complexity and lower noise enhancement. The advantage is that an RC-MLSE requires less computations and less power and is more simple to implement than a regular MLSE.

(8) The Relation Between Reduced Bandwidth and ISI

(9) Generally, channels with reduced bandwidth introduce ISI. If the transmitted signal is given by:
y(t)=Σ.sub.kα.sub.k.Math.δ(t−k.Math.T.sub.sym)  [Eq. 1]
where a.sub.k—The transmitted symbol k—The symbol index δ—The Dirac delta-function t—The continuous time T.sub.sym—The baud interval (Sec)

(10) Then the received signal (before sampling) could be written as:
r(t)=y(t)*h(t)+w(t)[Eq.2] w(t)—The additive noise h(t)—The overall impulse response from transmitter (before DAC) to receiver (after ADC)
r(t)=Σ.sub.k.Math.α.sub.k.Math.h(t−k.Math.T.sub.sym)+w(t)  [Eq. 8]

(11) Assuming perfect timing reconstruction, the sampling instances will be:
t=n.Math.T.sub.sym

(12) Under these conditions, the sampled version of the received signal could be written as:

(13) $\begin{array}{cc}{r}_n=r\left(t=n.Math.T_{\mathrm{sym}}\right)r_n=\underset{k}{.Math.}{a}_k.Math.h\left(n.Math.T_{\mathrm{sym}}-k.Math.T_{\mathrm{sym}}\right)+w\left(n.Math.T_{\mathrm{sym}}\right)r_n=\underset{k}{.Math.}{a}_k.Math.h\left(\left(n-k\right).Math.T_{\mathrm{sym}}\right)+w\left(n.Math.T_{\mathrm{sym}}\right)r_n=a_n.Math.h\left(0\right)+\underset{k\ne n}{.Math.}{a}_k.Math.h\left(\left(n-k\right).Math.T_{\mathrm{sym}}\right)+w_n& \left[\mathrm{Eq}.4\right]\end{array}$
where,

(14) a.sub.n.Math.h(0) is the desired part of the signal

(15) Σ.sub.k≠nα.sub.k.Math.h((n−k).Math.T.sub.sym) is the inter symbol interference (ISI) term

(16) w.sub.n is the additive noise.

(17) FIG. 1 shows an example of the response of a typical reduced bandwidth channel. In this case, the channel includes four effective echoes (unwanted signals) 11-14 (in this example, for Unit Intervals (UIs) =−2, −1, 1, 2, where the UI is the symbol duration time), while the rest are zero and therefore, do not add anything to the received signal. The envelop 15 represents the analog channel impulse response.

(18) A Linear Equalizer based on the Minimum Mean Squared Error (MMSE) criteria tries to minimize the error caused by both the residual ISI and by the (enhanced) noise. On the other hand, an MLSE decoder does not try to invert the channel (i.e., to zero the ISI) but rather, it uses the echoes as a wanted signal for decoding the transmitted symbol sequence (the echoes are ‘wanted signals’ for consecutive symbols). An MLSE decoder that uses the echoes as wanted signals is required to implement decoding functionality which is proportional to:
C∝M.sup.(N.sup.ISI.sup.+1)  [Eq. 5]
where M is the symbol modulation order (i.e., for PAM-4, M=4 etc.) and N.sub.ISI is the number of echoes used for sequence decoding.

(19) If an RC-MLSE decoder implementation uses N.sub.ISI which is smaller than the channel unwanted ISI (to save implementation complexity), then the residual ISI will reduce the performance of the decoding algorithm.

(20) For the example of FIG. 1, the channel ISI is represented by 5 echoes (including the wanted signal 10 and un-wanted ISI 11-14). If the RC-MLSE decoder implementation uses only N.sub.ISI=2, then only two unwanted echoes and the wanted echo will be used in the RC-MLSE decoding algorithm, while the other (remaining) two unwanted echo's will reduce the decoding performance since they are not taken into the decoding considerations.

(21) FIG. 2 illustrates a block diagram of the equalization system proposed by the present invention, in which the receiver 20 includes an ADC 21 for sampling the received signal x(t) and a combination of an LE 23, followed by a Reduced Complexity MLSE (RC-MLSE) 23 to implement the receiver 20 with low complexity and lower noise enhancement.

(22) The decoding process is based on the following combined processing: At the first step, the echoes/channel taps of the induced ISI are reduced by using a Linear Equalizer 22, in order not to be covered by the reduced complexity MLSE (RC-MLSE) 23. At the next step, the signal at the linear equalizer's output is decoded (using standard decoding) by the RC-MLSE 23. This decoding process is described in FIG. 3 (in time domain).

(23) In the example of FIG. 3, it is assumed that the number of echoes handled by the RC-MLSE is N.sub.ISI=2 (the wanted signal 10 and its two neighboring echoes 12-13). The envelop 15 represents the analog channel impulse response. Taps (echoes) 11 and 14 represent the taps which are equalized by the linear equalizer 22. Taps echoes) 10, 12 and 13 represent the (N.sub.ISI+1) taps which are used by the RC-MLSE 23 to decode the symbol sequence. The Linear Equalizer 22 is used to preprocess the less effective taps (echoes) 11 and 14 by eliminating them and redistributing their energy among the remaining taps 10, 12 and 13 (which are the most substantial), to be processed by the RC-MLSE 23. Despite the fact that the channel is non-linear, the LE 22 assumes linearity of the channel and therefore, performs only linear operations which are less complex (that the operations of the RC-MLSE 23 which are nonlinear). The redistribution scheme is based on the number of taps that RC-MLSE 23 will be required to further process. For example, if the level of the less effective taps (echoes) is below the noise level, the LE 23 will be adapted to totally eliminate them (without redistributing their energy among the remaining taps), such that only taps with energy level which is above the noise level will be redistributed. By doing so, the LE 22 effectively modifies (reshapes) the impulse response of the channel, to include only three taps (10, 12 and 13), thereby “shortening” the channel and saving from the processing effort that will be required from the RC-MLSE 23.

(24) According to the present invention, the filter taps of Linear Equalizer are continuously adapted by constructing an error signal for the LE tap adaptation.

(25) FIG. 4 is a block diagram of the equalization system (of FIG. 2) with continuous adaptation capability of filter taps of Linear Equalizer 22 using a linear feedback circuitry 44, as proposed by the present invention.

(26) The received signal r.sub.n an after sampling (at point 1) could be written as:
r.sub.n=Σ.sub.ka.sub.k.Math.h.sub.(n−k)+w.sub.n  [Eq. 6]

(27) The channel estimation block 41 receives the received signal r.sub.n (point 1) at one input and the decoded symbols from the output of the RC-MLSE 23 (point 3) at the other input, to estimate the channel's impulse response signal h[n].

(28) The channel estimation block 41 provides to the FIR block 42 a signal (point 4) which includes the channel taps that are covered by the RC-MLSE 23: h.sub.k(k∈MLSE Taps). The FIR block 42 also receives the decoded symbols from the output of the RC-MLSE 23 (point 3) and from the output of the channel estimation block 41 (point 4), constructs the signal at the output of the FIR block 42 (point 5) which is given by:
x5.sub.n=ρ.sub.k∈MLSETapsa.sub.k.Math.h.sub.(n−k)  [Eq. 7]

(29) The signal at point 6, which is the difference between the signals at the output of Linear Equalizer 22 (point 2) and the output of the FIR block 42 (point 5), represents the error signal x6.sub.n (at point 6):
x6.sub.n=x2.sub.n−x5.sub.n  [Eq. 8]

(30) The tap adaptation block 43 receives the error signal at point 6 and minimizes it. When this will happen (while neglecting the noise and assuming the minimal value is zero), the signal at point 2 will be equal to the signal at point 5 so the signal at point 2 could be written as:
x2.sub.n=Σ.sub.k∈MLSETapsa.sub.k.Math.h.sub.(n−k)+{tilde over (w)}.sub.n  [Eq. 9]

(31) In such a case (steady state), the input to the RC-MLSE 23 includes only taps which are covered by the RC-MLSE 23.

(32) In practice, FIR block 42 is fed by the channel estimation block 41, which represents the linear model (assumption) of the channel. Therefore, FIR block 42 will have a reshaped impulse response, which generates the error signal (at point 6), according to which the tap adaptation block 43 updates the taps of the LE 22.

(33) The implementation of the linear feedback circuitry 44 of FIG. 4 actually uses only linear (and relatively simple) operations, in order to simplify the implementation

(34) FIG. 5 illustrates a comparison between a receiver scheme which includes an RC-MLSE receiver 23 only and a receiver scheme which includes a combination of an LE 22 and an RC-MLSE 23.

(35) In this example, the channel impulse response was:

(36) h=[0.00011351 0.021874 0.23321 0.46527 0.25063 0.030095 −0.0014694];

(37) Graph 51 represents the Symbol Error Rate (SER) for a hard slicer decoder over an Additive white Gaussian noise (AWGN) channel with no ISI. Graph 52 represents receiver performance over the ISI channel, which uses only a nonlinear equalization of the RC-MLSE 23 (N.sub.ISI=2). Graph 53 represents the receiver performance over the ISI channel, using the combination of an LE 22 and an RC-MLSE 23. It can be seen that the SER obtained by using the proposed combination of an LE 22 for linear preprocessing and an RC-MLSE 23 for nonlinear processing provides a reasonable SER, with much less implementation complexity.

(38) The above examples and description have of course been provided only for the purpose of illustration, and are not intended to limit the invention in any way. As will be appreciated by the skilled person, the invention can be carried out in a great variety of ways, employing more than one technique from those described above, other than used in the description, all without exceeding the scope of the invention.