System and method for controlling excess bias of single photon avalanche photo diode

Abstract

A system for controlling excess bias of a single photon avalanche photo diode (SPAD) is provided. The system includes a power supply, a SPAD, a control circuit and a load. The power supply generates a supply voltage. The SPAD has a first terminal receiving the supply voltage and a second terminal generating an output voltage signal. The control circuit is connected to the second terminal of the SPAD. The load has a first terminal connected to the second terminal of the SPAD, and a second terminal connected to the control circuit for receiving a reset level. The control circuit is capable of monitoring a swing of the output voltage level and generating the reset level in response to the excess bias level and the swing of the output voltage level.

Claims

1. A system for controlling an excess bias of a single photon avalanche photo diode (SPAD), comprising: a power supply generating a supply voltage; a SPAD having a first terminal and a second terminal, the first terminal receiving the supply voltage, the second terminal generating an output voltage signal; a control circuit connected to the second terminal of the SPAD, wherein the control circuit obtains a reset level according to a swing of the output voltage signal and an excess bias level which is inputted to the control circuit; and a load having a first terminal and a second terminal, the first terminal of the load connected to the second terminal of the SPAD, the second terminal of the load connected to the control circuit for receiving the reset level.

2. The system for controlling the excess bias according to claim 1, wherein a cathode terminal of the SPAD receives the supply voltage, and an anode terminal of the SPAD generates the output voltage signal.

3. The system for controlling the excess bias according to claim 2, wherein the control circuit comprises: a sampling and holding circuit obtaining an extreme voltage level according to the swing of the output voltage signal, the extreme voltage level being taken as a quenching level; and a level shifter receiving the excess bias level and subtracting the excess bias level from the quenching level to obtain the reset level.

4. The system for controlling excess bias according to claim 3, wherein the control circuit includes a voltage regulator receiving the reset level and enhancing an output driving ability of the control circuit, such that the second terminal of the load quickly settles at the reset level.

5. The system for controlling the excess bias according to claim 2, wherein the control circuit comprises: a level shifter receiving the output voltage signal and the excess bias level, and subtracting the excess bias level from the output voltage signal to obtain a first voltage signal; and a sampling and holding circuit obtaining an extreme voltage level according to the swing of the first voltage signal, the extreme voltage level being taken as the reset level.

6. The system for controlling excess bias according to claim 5, wherein the control circuit includes a voltage regulator receiving the reset level and enhancing an output driving ability of the control circuit, such that the second terminal of the load quickly settles at the reset level.

7. The system for controlling the excess bias according to claim 1, wherein an anode terminal of the SPAD receives the supply voltage, and a cathode terminal of the SPAD generates the output voltage signal.

8. The system for controlling the excess bias according to claim 7, wherein the control circuit comprises: a sampling and holding circuit obtaining an extreme voltage level according to the swing of the output voltage signal, the extreme voltage level being taken as a quenching level; and a level shifter receiving the excess bias level and adding the quenching level and the excess bias level together to obtain the reset level.

9. The system for controlling excess bias according to claim 8, wherein the control circuit includes a voltage regulator receiving the reset level and enhancing an output driving ability of the control circuit, such that the second terminal of the load quickly settles at the reset level.

10. The system for controlling the excess bias according to claim 7, wherein the control circuit comprises: a level shifter receiving the output voltage signal and the excess bias level, and adding the output voltage signal and the excess bias level together to obtain a first voltage signal; and a sampling and holding circuit obtaining an extreme voltage level according to a swing of the first voltage signal, the extreme voltage level being taken as the reset level.

11. The system for controlling excess bias according to claim 10, wherein the control circuit includes a voltage regulator receiving the reset level and enhancing an output driving ability of the control circuit, such that the second terminal of the load quickly settles at the reset level.

12. The system for controlling the excess bias according to claim 1, further comprising a quenching reset circuit, wherein the quenching reset circuit receives the output voltage signal and controls the first terminal of the load and the second terminal of the load to be opened.

13. The system for controlling excess bias according to claim 12, wherein the control circuit includes a voltage regulator receiving the reset level and enhancing an output driving ability of the control circuit, such that the second terminal of the load quickly settles at the reset level.

14. A method for controlling an excess bias of a single photon avalanche photo diode (SPAD), comprising: controlling a SPAD being operating at a Geiger mode, wherein a first terminal of the SPAD is connected to a power supply, a second terminal of the SPAD generates an output voltage signal, a first terminal of a load is connected to the second terminal of the SPAD, and a second terminal of the load receives a reset level; inputting an excess bias level; monitoring a swing of the output voltage signal and obtaining the reset level according to the swing of the output voltage signal and the excess bias level, when the SPAD induces a sensing current; and providing the reset level to the second terminal of the load.

15. The method for controlling the excess bias according to claim 14, further comprising: monitoring the swing of the output voltage signal generated by the SPAD, and obtaining an extreme voltage level being taken as a quenching level; and adding the quenching level and the excess bias level together to obtain the reset level.

16. The method for controlling the excess bias according to claim 14, further comprising: adding the output voltage signal generated by the SPAD and the excess bias level together to obtain a first voltage signal; and monitoring a swing of the first voltage signal, and obtaining an extreme voltage level taken as the reset level.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 (prior art) illustrates a bias operating region and an optical gain of varied photoelectric detectors.

(2) FIG. 2 (prior art) illustrates a relationship between a load current and the excess bias level of a SPAD.

(3) FIG. 3 (prior art) illustrates a relationship between a temperature and the excess bias level of the SPAD.

(4) FIG. 4 (prior art) illustrates a bias adjusting circuit of an ordinary SPAD.

(5) FIG. 5 (prior art) illustrates a temperature compensated and control circuit of the ordinary SPAD.

(6) FIG. 6 (prior art) illustrates a temperature and load compensated method performed in the SPAD.

(7) FIGS. 7A and 7B (prior art) illustrate an ordinary high dynamic photo detector and an operating method thereof.

(8) FIG. 8 (prior art) illustrates an environment light detecting system and a method thereof.

(9) FIGS. 9A to 9C illustrate a SPAD detecting circuit and signals thereof.

(10) FIGS. 10A and 10B illustrate a system for controlling an excess bias of a SPAD and a signal thereof according to a first embodiment.

(11) FIG. 11 illustrates a system for controlling an excess bias of a SPAD according to a second embodiment.

(12) FIG. 12 illustrates a system for controlling an excess bias of a SPAD according to a third embodiment.

(13) FIG. 13 illustrates a system for controlling an excess bias of a SPAD according to a fourth embodiment.

(14) FIG. 14 illustrates a system for controlling an excess bias of a SPAD according to the fifth embodiment.

(15) FIG. 15 illustrates a detail circuit diagram according to the fifth embodiment.

(16) FIG. 16 illustrates a method for controlling an excess bias of a SPAD.

(17) In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed embodiments. It will be apparent, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are schematically shown in order to simplify the drawing.

DETAILED DESCRIPTION

(18) Please referring to FIGS. 9A to 9C, which illustrate a SPAD detecting circuit and signals thereof. The SPAD detecting circuit includes a power supply 310, a SPAD and a load R. The power supply 310 can output a supply voltage V.sub.op. A cathode terminal of the SPAD receives the supply voltage V.sub.op. When the SPAD receives photons, the anode terminal outputs an output voltage signal V.sub.anode. A first terminal of the load is connected to the anode terminal of the SPAD. A second terminal of the load is connected to a ground voltage Gnd.

(19) If the SPAD is operated at the Geiger mode, the supply voltage V.sub.op=V.sub.bd+V.sub.e. V.sub.bd is a breakdown voltage and V.sub.e is an excess bias level. When the SPAD does not receive any photon, a sensing current I (or a load current) is quiescent. At this time period, the SPAD is off, and the output voltage signal V.sub.anode of the anode terminal is kept at the Gnd level.

(20) At time t1, the SPAD receives the photons and the sensing current I is increased. At this time point, the SPAD is on and the sensing current I flows through the load which results in a voltage drop (I×R), such that the output voltage signal V.sub.anode of the anode terminal is increased from the Gnd level. When the output voltage signal V.sub.anode of the anode terminal is increased to a quenching level, i.e., the voltage drop of the SPAD is decreased to the breakdown voltage level V.sub.bd, the current of the SPAD is gradually to be cut-off and consequently the output voltage signal V.sub.anode of the anode terminal is decreased to the Gnd level at time t2.

(21) When the SPAD receives the photons again, the operation from the time t1 to the time t2 is repeated.

(22) FIG. 10A illustrates a system for controlling an excess bias of a SPAD according to a first embodiment. The system for controlling the excess bias of the SPAD includes a power supply 350, a SPAD, a load 352 and a control circuit 360. The control circuit 360 includes a sampling and holding circuit 362 and a level shifter 364.

(23) The power supply 350 can output a supply voltage V.sub.op. A cathode terminal of the SPAD receives the supply voltage V.sub.op. After receiving photons, the anode terminal outputs related events at the output voltage signal V.sub.anode. A first terminal of the load 352 is connected to the anode terminal of the SPAD. The sampling and holding circuit 362 receives the output voltage signal V.sub.anode from the anode terminal and outputs a quenching level V.sub.q. The level shifter 364 receives the excess bias level V.sub.e and transfers the quenching level V.sub.q to be a reset level V.sub.r, such that a second terminal of the load 352 receives the reset level V.sub.r. The reset level V.sub.r is equal to a value obtained by subtracting the quenching level V.sub.q from the excess bias level V.sub.e. The power supply 350 can be a charge pump circuit and the load 352 can be a resistor.

(24) The supply voltage V.sub.op from the power supply 350 and the breakdown voltage level V.sub.bd of the SPAD may shift with the conditions of the environment. In the present embodiment, the sampling and holding circuit 362 accurately obtains the quenching level V.sub.q of the SPAD. The level shifter 364 adds the excess bias level V.sub.e and the quenching level V.sub.q together to obtain the reset level V.sub.r. The second terminal of the load 352 receives the reset level V.sub.r.

(25) Please refer to FIG. 10B, which illustrates a signal of the system for controlling the excess bias of the SAPD. At time t1, the SPAD receives photons and is triggered on. A sensing current I is induced, such that the level of the output voltage signal V.sub.anode at the anode terminal is increased and reached the quenching level V.sub.q. At this time point, the quenching level V.sub.q is equal to a value obtained by subtracting the breakdown voltage level V.sub.bd from the supply voltage V.sub.op
V.sub.q=V.sub.op−V.sub.bd  (1)

(26) The extreme voltage level of the output voltage signal V.sub.anode obtained from the anode terminal by the sampling and holding circuit 362 is the quenching level V.sub.q. When the output voltage signal V.sub.anode of the anode terminal reaches the quenching level V.sub.q, the SPAD is turned off and the output voltage signal V.sub.anode of the anode terminal is gradually decreased to the Gnd level at time t2.

(27) When the sampling and holding circuit 362 provides the quenching level V.sub.q to the level shifter 364, the level shifter 364 adds the excess bias level V.sub.e and the quenching level V.sub.q together to obtain the reset level V.sub.r, such that the second terminal of the load 352 receives the reset level V.sub.r. The reset level V.sub.r is equal to a value obtained by subtracting the excess bias level V.sub.e from the quenching level V.sub.q.
V.sub.r=V.sub.q−V.sub.e  (2)

(28) According to the equations (1) and (2), an equation “V.sub.op−V.sub.r=V.sub.bd+V.sub.e” can be obtained. That is to say, when the SPAD is off, the voltage drop of the SPAD is a value obtained by adding the breakdown voltage level V.sub.bd and the excess bias level V.sub.e.

(29) Based on the above, no matter how much the supply voltage V.sub.op provided from the power supply 350 and the breakdown voltage level V.sub.bd of the SPAD are shifted, the quenching level will shift upon the variations and keeps the excess bias level of the SPAD always equal to V.sub.e. Therefore, the SPAD of the first embodiment can accurately provide the excess bias level V.sub.e. Furthermore, the excess bias level V.sub.e received by the level shifter 364 can be tuned to adjust a Photon Detection Probability (PDP) of the SPAD, such that the system of the first embodiment is widely dynamic.

(30) Please refer to FIG. 11, which illustrates a system for controlling an excess bias of a SPAD according to a second embodiment. The system for controlling the excess bias of the SPAD includes a power supply 400, a SPAD, a load 402 and a control circuit 420. The control circuit 420 includes a level shifter 422 and a sampling and holding circuit 426.

(31) The difference between the first embodiment and the second embodiment is in the control circuit 420. The level shifter 422 adds the excess bias level V.sub.e and the output voltage signal V.sub.anode together to obtain a first voltage signal V.sub.q′ (V.sub.q′=V.sub.anode+V.sub.e). The extreme voltage level of the first voltage signal V.sub.q′ obtained by the sampling and holding circuit 426 is taken as the reset level V.sub.r. Similarly, an equation “V.sub.op−V.sub.r=V.sub.bd+V.sub.e” can be also obtained. When the SPAD is off, the voltage drop of the SPAD is a value obtained by adding the breakdown voltage level V.sub.bd and the excess bias level V.sub.e together.

(32) Please refer to FIG. 12, which illustrates a system for controlling an excess bias of a SPAD according to a third embodiment. The system for controlling the excess bias of the SPAD includes a power supply 450, a SPAD, a load 452 and a control circuit 460. The control circuit 460 includes a sampling and holding circuit 462 and a level shifter 464.

(33) The power supply 450 can generate a supply voltage V.sub.op. The anode terminal of the SPAD receives the supply voltage V.sub.op. The cathode terminal receives photons and outputs the events at the output voltage signal V.sub.cathode. The first terminal of the load 452 is connected to the cathode terminal of the SPAD. The sampling and holding circuit 462 receives the output voltage signal V.sub.cathode of the cathode terminal and generates the quenching level V.sub.q. The level shifter 464 receives the excess bias level V.sub.e and adds the quenching level V.sub.q and the excess bias level V.sub.e to obtain the reset level V.sub.r, such that the second terminal of the load 452 receives the reset level V.sub.r. The reset level V.sub.r is equal to a value obtained by adding the quenching level V.sub.q and the excess bias level V.sub.e, i.e., V.sub.r=V.sub.q+V.sub.e. The power supply 450 can be a charge pump circuit and the load 452 can be a resistor.

(34) Similarly, as the SPAD receives a photon and induces the sensing current I, the level of the output voltage signal V.sub.cathode from the cathode terminal is decreased to the quenching level V.sub.q. At this time point, the extreme voltage level of the output voltage signal V.sub.cathode obtained from the cathode terminal by the sampling and holding circuit 462 is taken as a quenching level V.sub.q. At this time point, the reset level V.sub.r is a value obtained by adding the supply voltage V.sub.op and the breakdown voltage level V.sub.bd.
V.sub.q=V.sub.op+V.sub.bd  (3)

(35) When the sampling and holding circuit 462 provides the quenching level V.sub.q to the level shifter 464, the level shifter 464 add the excess bias level V.sub.e and the quenching level V.sub.q together to obtain the reset level V.sub.r, such that a second terminal of the load 452 receives the reset level V.sub.r. The reset level V.sub.r is equal to a value obtained by adding the quenching level V.sub.q and the excess bias level V.sub.e.
V.sub.r=V.sub.q+V.sub.e  (4)

(36) According to the equations (3) and (4), an equation “V.sub.r−V.sub.op=V.sub.bd+V.sub.e can be obtained. When the SPAD is off, the voltage drop of the SPAD is a value obtained by adding the breakdown voltage level V.sub.bd and the excess bias level V.sub.e.

(37) Please refer to FIG. 13, which illustrates a system for controlling an excess bias of a SPAD according to a fourth embodiment. The system for controlling the excess bias of the SPAD includes a power supply 500, a SPAD, a load 502 and a control circuit 520. The control circuit 520 includes a level shifter 522 and a sampling and holding circuit 524.

(38) The difference between the third embodiment and the fourth embodiment is in the control circuit 520. The level shifter 522 adds the excess bias level V.sub.e and the output voltage signal V.sub.cathode of a cathode terminal to obtain the first voltage signal V.sub.q′ (V.sub.q′=V.sub.cathode+V.sub.e). The sampling and holding circuit 524 obtains the extreme voltage level of the first voltage signal V.sub.q′ to output the reset level V.sub.r. Similarly, an equation “V.sub.op−V.sub.r=V.sub.bd+V.sub.e” can be also obtained. That is to say, when the SPAD is off, the voltage drop of the SPAD is a value obtained by adding the breakdown voltage level V.sub.bd and the excess bias level V.sub.e.

(39) Please refer to FIG. 14, which illustrates a system for controlling an excess bias of a SPAD according to the fifth embodiment. The system for controlling the excess bias of the SPAD includes a power supply 600, a SPAD, a load 602 and a control circuit 620. The load 602 includes a transistor M.sub.1 and a quenching reset circuit 606. The control circuit 620 includes a sampling and holding circuit 622, a level shifter 624 and a voltage regulator 626. The power supply 600 can be a charge pump circuit.

(40) The power supply 600 can generate a supply voltage V.sub.op. A cathode terminal of the SPAD receives the supply voltage V.sub.op. The anode terminal generates the output voltage signal V.sub.anode. A first terminal of the load 602 is connected to the anode terminal of the SPAD. The sampling and holding circuit 622 receives the output voltage signal V.sub.anode of the anode terminal and outputs the quenching level V.sub.q. The level shifter 624 receives the excess bias level V.sub.e and adds the quenching level V.sub.q and the excess bias level V.sub.e together to obtain the reset level V.sub.r. The voltage regulator 626 receives the reset level V.sub.r and outputs a regulating voltage V.sub.reg. The second terminal of the load 602 receives the regulating voltage V.sub.reg. The reset level V.sub.r is equal to a value obtained by subtracting the excess bias level V.sub.e from the quenching level V.sub.q. The reset level V.sub.r is equal to the regulating voltage V.sub.reg.

(41) The voltage regulator 626 of the control circuit 620 can enhance an output driving ability, such that the second terminal of the load 602 can quickly settle at the reset level V.sub.r. The voltage regulator 626 includes an operational amplifier 628. The positive input terminal of the operational amplifier 628 receives the reset level V.sub.r. The negative input terminal of the operational amplifier 628 generates the regulating voltage V.sub.reg. In the transistor M.sub.2, a source receives a supply voltage V.sub.DD, a drain is connected to the negative input terminal of the operational amplifier 628, and a gate is connected to an output terminal of the operational amplifier 628. The transistor R is connected between the negative terminal of the operational amplifier 628 and the ground voltage Gnd. In the fifth embodiment, the quenching reset circuit 606 of the load 602 generates a control signal for that the sampling and holding circuit 622 can accurately obtains the quenching level V.sub.q. The operations are described as below.

(42) When the SPAD receives photons and is triggered on, the sensing current I is induced. The output voltage signal V.sub.anode of the anode terminal is increased to the quenching level V.sub.q. At this time point, the quenching reset circuit 606 generates a controlling signal Ctrl to a gate (control terminal) of the transistor M.sub.1 for turning off the transistor M.sub.1, such that a path on the anode terminal of the SPAD is opened. Therefore, the quenching level V.sub.q will be kept for a long time. The sampling and holding circuit 622 can accurately obtain the quenching level V.sub.q.

(43) In other words, the voltage regulator 626 of the fifth embodiment is used to enhance an output driving ability of the control circuit 620. The second terminal of the load 602 receives the regulating voltage V.sub.reg (i.e. the reset level V.sub.r). The quenching reset circuit 606 of the fifth embodiment is used to keep the quenching level V.sub.q for a longer time, such that the sampling and holding circuit 622 can accurately obtain the quenching level V.sub.q. When the SPAD is off, the voltage drop of the SPAD is a value obtained by adding the breakdown voltage level V.sub.bd and the excess bias level V.sub.e (i.e. V.sub.op−V.sub.r=V.sub.bd+V.sub.e).

(44) Please refer to FIG. 15, which illustrates a detail circuit diagram according to the fifth embodiment. The sampling and holding circuit 622 and the level shifter 624 can be used in the first embodiment to the fifth embodiment.

(45) The quenching reset circuit 606 includes a comparator 712, an inverter 714, an inverter 716, a NOR 718, a capacitor C.sub.1, a transistor M.sub.8 and a transistor M.sub.3. A negative terminal of the comparator 712 receives the output voltage signal V.sub.anode of an anode terminal. A positive terminal of the comparator 712 receives a reference threshold voltage level V.sub.th1. An output terminal of the comparator 712 outputs the controlling signal Ctrl. When the SPAD receives photons and is triggered on, the sensing current I is induced, such that the output voltage signal V.sub.anode of the anode terminal raises across the threshold voltage V.sub.th1. The comparator 712 generates the controlling signal Ctrl to the gate of the transistor M.sub.1 to turn off the transistor M.sub.1, such that the path of the anode terminal of the SPAD is opened.

(46) The inverter 714, the capacitor C1, and the transistor M.sub.8 in the quenching reset circuit 606 realize a monostable circuit. When the controlling signal Ctrl is induced, the transistor M.sub.8 generates a pulse signal and the output terminal of the inverter 716 outputs a control signal SH to the sampling and holding circuit 622. A gate of the transistor M.sub.8 receives a control voltage to adjust the current and correspondingly the width of the pulse signal. The output terminal of the NOR 718 is used for controlling the transistor M.sub.3. At a specific time, the transistor M.sub.3 is turned on to reset the voltage level of the anode terminal of the SPAD to the Gnd level.

(47) The sampling and holding circuit 622 includes an inverter 722, an inverter 724, a transmission gate, and a capacitor C.sub.2. The transmission gate includes a transistor M.sub.4 and a transistor M.sub.5. When the control signal SH is high, the transmission gate is turned on and the extreme voltage level of the output voltage signal V.sub.anode of the anode terminal is sampled and hold in the capacitor C.sub.2. In other words, the voltage of the capacitor C.sub.2 is equal to the quenching level V.sub.r.

(48) The level shifter 624 includes a transistor M.sub.6 and a transistor M.sub.7 which realize a source follower. A gate of the transistor M.sub.6 receives the quenching level V.sub.q, and a gate of the transistor M.sub.7 receives the excess bias level V.sub.e and an output terminal generates the reset level V.sub.r. The reset level V.sub.r is equal to a value obtained by subtracting the excess bias level V.sub.e from the quenching level V.sub.q.

(49) The voltage regulator 626 includes the operational amplifier 628. A positive terminal of the operational amplifier 628 receives the reset level V.sub.r, the negative terminal of the operational amplifier 628 connects to the regulating voltage V.sub.reg. A gate of the transistor M.sub.2 is connected to the output terminal of the operational amplifier 628. A source of the transistor M.sub.2 receives the supply voltage V.sub.DD. The drain of the transistor M.sub.2 and the negative terminal of the operational amplifier 628 are connected to a resistor R.sub.2. A resistor R.sub.1 is connected between the negative terminal of the operational amplifier 628 and the ground level Gnd. The voltage regulator 626 can enhance an output driving ability, such that the second terminal of the load 602 can quickly settle at the reset level V.sub.r.

(50) The drain of the transistor M.sub.2 can generate a threshold voltage V.sub.th1 to the quenching reset circuit 606. V.sub.th1=V.sub.reg (1+R.sub.2/R.sub.1). The threshold voltage can be adjusted by tuning the ratio of R2 and R1 and optimized to reduce timing jitter of SPADs.

(51) Please refer to FIG. 16, which illustrates a method for controlling an excess bias of a SPAD. A first terminal of the SPAD is connected to a power supply for receiving a supply voltage V.sub.op. A second terminal of the SPAD can generate an output voltage signal. A first terminal of a load is connected to a second terminal of the SPAD. A second terminal of the load receives a reset level. The method includes the following steps.

(52) In step S810, the SPAD is operated at a Geiger mode. In step S820, when the SPAD induces a sensing current, the swing of the output voltage signal is monitored and a reset level is obtained according to the swing of the output voltage signal and an excess bias level. In step S830, the reset level is provided to a second terminal of the load.

(53) In step S820, the swing of the output voltage signal from a second terminal of the SPAD is sampled to obtain an extreme voltage level which is defined and taken as a quenching level. The quenching level and the excess bias level are summed together to obtain the reset level.

(54) Or, in step S820, the output voltage signal and the excess bias level are summed together to obtain a first voltage signal. The swing of the first voltage signal is monitored to obtain an extreme voltage level which is defined and taken as a reset level.

(55) Or, in step S820, the excess bias is divided into a plurality of small excess biases. The step of adding the output voltage signal and the excess bias together can be performed by adding the output voltage signal and the small excess biases several times.

(56) Based on the above, no matter how much the supply voltage V.sub.op provided from the power supply and the breakdown voltage level V.sub.bd of the SPAD drift, a voltage drop of the SPAD can be accurately controlled at a value obtained by adding the breakdown voltage level V.sub.bd and the excess bias level V.sub.e.

(57) Because the excess bias level of the SPAD can be accurately controlled, the excess bias level V.sub.e received by the level shifter can be tuned to obtain a high dynamic range controlling system.

(58) It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed embodiments. It is intended that the specification and examples be considered as exemplary only, with a true scope of the disclosure being indicated by the following claims and their equivalents.