High-gain quasi-resonant DC-DC converter based on voltage doubling rectifier circuit

Abstract

The present invention relates to the technical field of high-gain DC-DC converters, and disclosed is a high-gain quasi-resonant DC-DC converter based on a voltage doubling rectifier circuit. On the basis of a half-bridge quasi-resonant high-gain circuit topology and by combining a bidirectional positive and negative voltage doubling rectifier circuit, the present invention provides a high-gain DC-DC converter. The converter can further improve output voltage gain and reduce output voltage ripples, and can improve the system efficiency while reducing the number of turns of a high-frequency transformer; moreover, the converter can achieve soft-switching control, thereby having the advantages of low voltage and current stress, high efficiency, and the like.

Claims

1. A high-gain quasi-resonant DC-DC converter based on a voltage doubling rectifier circuit, comprising a booster circuit, a clamping circuit, a series resonance loop, a bidirectional positive and negative voltage doubling rectifier circuit and a load; wherein the booster circuit comprises a first power switching tube and an input inductor connected in series, and a first anti-parallel diode is connected in parallel to the first power switching tube; the clamping circuit comprises a second power switching tube and a second capacitor connected in parallel, and a second anti-parallel diode is connected in parallel to the second power switching tube; the series resonance loop comprises a leakage inductance inductor and a first capacitor; and the bidirectional positive and negative voltage doubling rectifier circuit comprises a first diode, a second diode, a third diode, a fourth diode, a first output capacitor, a second output capacitor, a third output capacitor, and a fourth output capacitor; operating mode 1: at time t.sub.0, the second power switching tube is switched off, and a current difference between the leakage inductance current i.sub.Lk and an input inductor current i.sub.LB passes through the first anti-parallel diode of the first power switching tube, the first power switching tube is switched on at zero voltage, and a current in the first anti-parallel diode of the first power switching tube is zero; operating mode 2: at time t.sub.1, a direction of a current in the first power switching tube is changed, a power supply charges the input inductor through the first power switching tube, a primary coil winding, the first capacitor and the leakage inductance inductor constitute the series resonance loop, the second diode and the third diode of an output circuit are switched on, a voltage of a secondary coil winding is converted to that of the primary coil winding as u.sub.o/n, wherein n is a turns ratio of the converter, under a combined action of the voltage converted to the primary coil winding, from the secondary coil winding and a first capacitance, the leakage inductance current i.sub.Lk is gradually decreased to zero, and a mathematical model of the circuit under this mode is shown as Equation (1), $\begin{array}{cc}\left[\begin{array}{c}\frac{{\mathrm{di}}_{\mathrm{Lk}}}{\mathrm{dt}}\\ \frac{{\mathrm{du}}_{C2}}{\mathrm{dt}}\end{array}\right]=\left[\begin{array}{cc}0& -\frac{1}{L_k}\\ \frac{1}{C_2}& 0\end{array}\right]\left[\begin{array}{c}{i}_{Lk}\left(t\right)\\ u_{\mathrm{C2}}\left(t\right)\end{array}\right]+\left[\begin{array}{c}-\frac{1}{L_k}\\ -\frac{1}{C_2}\end{array}\right]\left[\begin{array}{c}\frac{u_o}{n}\\ i_{\mathrm{LB}}\end{array}\right]& \left(1\right)\end{array}$ wherein C.sub.1 is the first capacitor, U.sub.C1 is a voltage at both ends of the first capacitor, L.sub.k is the leakage inductance inductor, and u.sub.o is a voltage at both ends of the load; operating mode 3: at time t.sub.2, the leakage inductance inductor and the first capacitor resonate, a direction of the leakage inductance current i.sub.Lk changes, a direction of a primary current changes, followed by a change in a direction of a secondary current of a transformer, such that the second diode and the third diode are switched off, and the first diode and the fourth diode are switched on, the voltage doubling rectifier circuit of the output circuit continues to charge the load, and a sum of a voltage on the first output capacitor and a voltage on the fourth output capacitor is still u.sub.o/n after being converted to the primary side, formulas for calculating the primary current and a voltage of the transformer are as follows: $\begin{array}{cc}{i}_{Lk}\left(t\right)=\frac{u_o/n-u_{C1}\left(t_0\right)}{\sqrt{L_k/C_1}}\sin w_r\left(t-t_2\right)& \left(2\right)\end{array}$ $\begin{array}{cc}{u}_{C1}\left(t\right)=u_{C1}\left(t_0\right)\cos w_r\left(t-t_2\right)& \left(3\right)\end{array}$ wherein U.sub.C1 represents a voltage of the first capacitor, w.sub.r represents a resonance frequency, w.sub.r=1/√{square root over (L.sub.kC.sub.1)}, t represents a time variable; operating mode 4: at time t.sub.3, the leakage inductance current i.sub.Lk resonates to zero and the converter enters a switch-off state, wherein during this stage, the power supply keeps charging the input inductor L.sub.B such that the input inductor current i.sub.LB remains constant, a current in the output circuit is zero, the first diode, the second diode, the third diode and the fourth diode are switched off, the second output capacitor and the fourth output capacitor directly supply power to the load, and the leakage inductance current i.sub.Lk of the transformer at this stage can be obtained as:
i.sub.Lk(t)=0 wherein a sum of a voltage of a primary winding of the transformer and the voltage of the first capacitor C.sub.1 is U.sub.N, and a principle of volt-second balance is applied as: $\begin{array}{cc}{d}_1{U}_1+d_3{U}_3=d_2{U}_2& \left(5\right)\end{array}$ $\begin{array}{cc}{U}_3=\frac{d_2{U}_2-d_1{U}_1}{d_3}& \left(6\right)\end{array}$ in the Equations, U.sub.1, U.sub.2 and U.sub.3 are sums of the voltage of the primary winding of the transformer and the voltage of the first capacitor in mode 1, mode 2 and mode 3, respectively; d.sub.1 represents a duty ratio of the DC-DC converter in operating mode 1 and operating mode 2; d.sub.2 represents a duty ratio of the DC-DC converter in operating mode 3; and d.sub.3 represents a duty ratio of the DC-DC converter in operating mode 4; operating mode 5: at time t.sub.4, the first power switching tube is switched off, the current difference between an input current and a transformer current flows through the second anti-parallel diode of the second power switching tube, the second capacitor is discharged, the first capacitor is charged, a current flowing through the second power switching tube changes from negative to zero, a zero-voltage-switching condition is created such that the second power switching tube is switched on at zero voltage, the second diode and the third diode are switched on, the first diode and the fourth diode are switched off, and this phase ends when the current i.sub.S2 through the second power switching tube reaches zero; and operating mode 6: at time t.sub.5, a current of the second anti-parallel diode of the second power switching tube reaches zero, a direction of the current i.sub.S2 flowing through the second power switching tube changes, the direction of the leakage inductance current i.sub.Lk remains unchanged and the leakage inductance current i.sub.Lk increases linearly, the second diode and the third diode are switched on, during time period t.sub.4-t.sub.6 the input inductor current flows through the primary winding of the transformer and charges the first capacitor all the time, and a mathematical model during this time period t.sub.4-t.sub.6 is shown as Equation (7): $\begin{array}{cc}\left[\begin{array}{c}\frac{{\mathrm{di}}_{\mathrm{Lk}}}{\mathrm{dt}}\\ \frac{{\mathrm{du}}_{C2}}{\mathrm{dt}}\end{array}\right]=\left[\begin{array}{cc}0& \frac{1}{L_k}\\ \frac{1}{C_2}& 0\end{array}\right]\left[\begin{array}{c}{i}_{Lk}\left(t\right)\\ u_{C2}\left(t\right)\end{array}\right]+\left[\begin{array}{c}-\frac{1}{L_k}\\ -\frac{1}{C_2}\end{array}\right]\left[\begin{array}{c}\frac{u_o}{n}\\ i_{LB}\end{array}\right]& \left(7\right)\end{array}$ wherein C.sub.2 is the second capacitor.

2. The high-gain quasi-resonant DC-DC converter based on the voltage doubling rectifier circuit according to claim 1, wherein when a switch-on control signal is applied to the first power switching tube, the second power switching tube is controlled to be switched off, the first anti-parallel diode is switched on, current and voltage resonance occurs in the series resonance loop, and an alternating current and voltage are generated in the primary coil winding; a first-stage voltage boost is completed on a secondary coil winding side by the transformer; at the same time, the second diode and the third diode, and the first diode and the fourth diode, in the secondary coil winding are switched on in turn during a positive half-cycle and negative half-cycle of an alternating-current (AC), so as to complete AC voltage doubling rectification on the secondary coil winding side of the transformer, and thus achieve a voltage boost on the secondary coil winding side on the basis of a voltage boost on a primary coil winding side; finally, direct current with a high voltage gain is obtained on the load, the first power switching tube is then switched on at zero voltage, the power supply charges the input inductor, and currents of other branches are zero; the third output capacitor and the fourth output capacitor maintain a load supply current; and when the switch-on control signal is applied to the second power switching tube, the first power switching tube is controlled to be switched off; first, the second anti-parallel diode is switched on, the input current charges the second capacitor through the second anti-parallel diode, when a voltage of the capacitor is higher than a voltage of the power supply, the second power switching tube is switched on at zero voltage, and the second capacitor discharges, and charges the leakage inductance inductor in series and the first capacitor to store energy for a next stage of series resonance.

3. The high-gain quasi-resonant DC-DC converter based on the voltage doubling rectifier circuit according to claim 1, wherein duty ratios of the first power switching tube and the second power switching tube are D and 1-D, respectively.

4. The high-gain quasi-resonant DC-DC converter based on the voltage doubling rectifier circuit according to claim 1, wherein a resonant capacitor is adopted as the first capacitor.

5. The high-gain quasi-resonant DC-DC converter based on the voltage doubling rectifier circuit according to claim 1, wherein the primary coil winding of the converter is N1, the secondary coil winding of the converter is N2, and the turns ratio of the converter is n=N.sub.2/N.sub.1.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows a topology of a high-gain quasi-resonant DC-DC converter;

(2) FIG. 2 shows a schematic diagram illustrating main operating waveforms of a high-gain quasi-resonant DC-DC converter;

(3) FIG. 3a shows an equivalent circuit diagram of a converter under an operating mode 1;

(4) FIG. 3b shows an equivalent circuit diagram of a converter under an operating mode 2;

(5) FIG. 3c shows an equivalent circuit diagram of a converter under an operating mode 3;

(6) FIG. 3d shows an equivalent circuit diagram of a converter under an operating mode 4;

(7) FIG. 3e shows an equivalent circuit diagram of a converter under an operating mode 5;

(8) FIG. 3f shows an equivalent circuit diagram of a converter under an operating mode 6;

(9) FIG. 4 shows an equivalent model diagram illustrating the high-gain topology steady state;

(10) FIG. 5 shows a simulation comparison diagram illustrating output voltage gains;

(11) FIG. 6 shows a schematic relation diagram illustrating voltage gains M and duty ratios D under different leakage inductances;

(12) FIG. 7a shows a schematic diagram illustrating output voltage ripples of a traditional voltage-quadruple rectifier circuit;

(13) FIG. 7b shows a schematic diagram illustrating high-gain voltage-quadruple output voltage ripples of the converter;

(14) FIG. 8a shows a schematic diagram illustrating triggering pulse of a switching tube;

(15) FIG. 8b shows a schematic diagram illustrating driving dead zone waveforms;

(16) FIG. 9 shows a zero-voltage-switching diagram of a first power switching tube;

(17) FIG. 10 shows a zero-voltage-switching diagram of a second power switching tube;

(18) FIG. 11 shows an efficiency analysis diagram of a high-gain DC-DC converter.

DETAILED DESCRIPTION OF THE EMBODIMENTS

(19) The specific implementations of the present disclosure will be further described below with reference to the accompanying drawings and specific examples.

(20) As shown in FIGS. 1 and 2, a high-gain quasi-resonant DC-DC converter based on a voltage doubling rectifier circuit includes a booster circuit, a clamping circuit, a series resonance loop and a bidirectional positive and negative voltage doubling rectifier circuit:

(21) where the booster circuit includes a first power switching tube S.sub.1 and an input inductor L.sub.B connected in parallel, and a first anti-parallel diode D.sub.s1 is connected in parallel to the first power switching tube and

(22) the clamping circuit includes a second power switching tube S.sub.2 and a second capacitor C.sub.2 connected in parallel, and a second anti-parallel diode D.sub.s2 connected in parallel to the second power switching tube S.sub.2; and duty ratios of the first power switching tube S.sub.1 and the second power switching tube S.sub.2 are D and 1-D, respectively.

(23) The series resonance loop includes a leakage inductance inductor L.sub.k and a first capacitor C.sub.1, and a resonant capacitor is adopted as the first capacitor C.sub.1.

(24) The bidirectional positive and negative voltage doubling rectifier circuit includes a first output diode D.sub.1, a second output diode D.sub.2, a third output diode D.sub.3, a fourth output diode D.sub.4, a first output capacitor C.sub.o1, a second output capacitor C.sub.o2, a third output capacitor C.sub.03, a fourth output capacitor C.sub.o4 and a load resistor R.sub.L.

(25) A primary coil winding of the converter is N1, a secondary coil winding of the converter is N2, and a turns ratio of the converter is n=N.sub.1/N.sub.1.

(26) When a switch-on control signal is applied to the first power switching tube, the second power switching tube is controlled to be switched off, the first anti-parallel diode is switched on, current and voltage resonance occurs in the series resonance loop, and an alternating current and voltage are generated in a primary coil winding; a first-stage voltage boost is completed on a secondary coil winding side by a high frequency transformer; a second output diode and a third output diode, and a first output diode and a fourth output diode in the secondary coil winding are switched on at the same time in turn during a positive half-cycle and negative half-cycle of an alternating-current (AC), so as to complete AC voltage doubling rectification on the secondary coil winding side of the transformer, and thus achieves a voltage boost on the secondary coil winding side on the basis of a voltage boost on a primary coil winding side; finally, direct current with a high voltage gain is obtained on a circuit load, the first power switching tube is then switched on at zero voltage, a direct-current power supply charges the input inductor, and currents of other branches are zero; the third output capacitor and the fourth output capacitor maintain a load supply current; and

(27) when a switch-on control signal is applied to the second power switching tube, the first power switching tube is controlled to be switched off; first, the second anti-parallel diode is switched on, an input current charges the second capacitor through the second anti-parallel diode, when a voltage of the capacitor is higher than a voltage of the power supply, the second power switching tube is switched on at zero voltage, and the second capacitor discharges, and charges the leakage inductance inductor in series and the first capacitor to store energy for a next stage of series resonance.

(28) The following assumptions are made prior to analysis.

(29) (1) The input inductance L.sub.B is ideal and large enough, and the inductive current is approximately constant during a switching cycle.

(30) (2) Diodes and MOSFET switching tubes are all ideal devices, of which on-resistance is ignored.

(31) (3) Transformer is ideally linear, of which loss is ignored.

(32) (4) A voltage doubling rectifier circuit has a zero voltage drop inside, and the output capacitance are exactly the same.

(33) During a stable operation of a high-gain quasi-resonant DC-DC converter, main operating waveforms are shown in FIG. 2. The switching cycle includes six operating modes, as shown in FIGS. 3a-3f:

(34) operating mode 1 [t.sub.0-t.sub.1]: as shown in FIG. 3a, at time t.sub.0, the second power switching tube S.sub.2 is switched off, and a difference between the leakage inductance current i.sub.Lk and the input inductor current i.sub.LB passes through the first anti-parallel diode D.sub.s1 of the first power switching tube S.sub.1, the first power switching tube S.sub.1 is switched on at zero voltage, and the current in the first anti-parallel diode D.sub.s1 is zero;

(35) operating mode 2 [t.sub.1-t.sub.2]: as shown in FIG. 3b, at time t.sub.1, a direction of the current in the first power switching tube S.sub.1 is changed, an input power supply charges the input inductor L.sub.B through the first power switching tube S.sub.1, a primary coil winding, the first capacitor and the leakage inductance inductor constitute the series resonance loop, the second output diode D.sub.2 and the third diode D.sub.3 of an output circuit are switched on, a voltage of the secondary coil winding is converted to that of the primary coil winding as u.sub.o/n, under a combined action of the voltage converted to the primary coil winding from the secondary coil winding and the first capacitance, the leakage inductance current i.sub.Lk is gradually reduced to zero, and a mathematical model under this mode is shown as Equation (1),

(36) $\begin{array}{cc}\left[\begin{array}{c}\frac{{\mathrm{di}}_{\mathrm{Lk}}}{\mathrm{dt}}\\ \frac{{\mathrm{du}}_{C1}}{\mathrm{dt}}\end{array}\right]=\left[\begin{array}{cc}0& -\frac{1}{L_k}\\ \frac{1}{C_1}& 0\end{array}\right]\left[\begin{array}{c}{i}_{Lk}\left(t\right)\\ u_{C1}\left(t\right)\end{array}\right]+\left[\begin{array}{c}-\frac{1}{L_k}\\ 0\end{array}\right]\left[\begin{array}{c}\frac{u_o}{n}\\ 0\end{array}\right];& \left(1\right)\end{array}$

(37) operating mode 3 [t.sub.2-t.sub.3]: as shown in FIG. 3c, at time t.sub.2, the leakage inductance inductor L.sub.k and the first capacitor C.sub.1 resonate, the direction of the leakage inductance current i.sub.Lk changes, the direction of primary current changes, followed by a change in a direction of a secondary current of the transformer, such that the second output diode D.sub.2 and the third output diode D.sub.3 are switched off, and the first output diode D.sub.1 and the fourth output diode D.sub.4 are switched on, a voltage doubling rectifier circuit of the output circuit continues to charge a load, and a sum of voltages on the first output capacitor C.sub.o1 and the fourth output capacitor C.sub.o4 is still u.sub.o/n after being converted to the primary side, Equations for calculating the primary current and voltage of the transformer are as follows:

(38) $\begin{array}{cc}{i}_{Lk}\left(t\right)=\frac{u_o/n-u_{C1}\left(t_0\right)}{\sqrt{L_k/C_1}}\sin w_r\left(t-t_2\right)& \left(2\right)\end{array}$$\begin{array}{cc}{u}_{C1}\left(t\right)=u_{C1}\left(t_0\right)\cos w_r\left(t-t_2\right)& \left(3\right)\end{array}$

(39) where U.sub.C1 represents a voltage of the first capacitor, w.sub.r represents resonance frequency, and w.sub.r=1/√{square root over (L.sub.kC.sub.1)};

(40) operating mode 4 [t.sub.3-t.sub.4]: as shown in FIG. 3d, at time t.sub.3, the leakage inductance current i.sub.Lk resonates to zero and the converter enters a switch-off state, where during this stage, a power supply keeps charging the input inductor L.sub.B such that the input inductor current i.sub.LB remains constant, current in the output circuit is zero, all the output diodes D.sub.1-D.sub.4 are switched off, the output capacitors C.sub.o2 and C.sub.o4 directly supply power to the load, and the leakage inductance current i.sub.Lk of the high-frequency transformer at this stage can be obtained as:
i.sub.Lk(t)=0  (4)

(41) a sum of a voltage of a primary winding of the transformer and the voltage of the first capacitor C.sub.1 is U.sub.N, and the principle of volt-second balance is applied:

(42) $\begin{array}{cc}{d}_1{U}_1+d_3{U}_3=d_2{U}_2& \left(5\right)\end{array}$$\begin{array}{cc}{U}_3=\frac{d_2{U}_2-d_1{U}_1}{d_3}& \left(6\right)\end{array}$

(43) in the Equations, U.sub.1, U.sub.2 and U.sub.3 are sums of the voltage of the primary winding of the transformer and the voltage of the first capacitor in mode 1, model 2 and mode 3, respectively;

(44) operating mode 5 [t.sub.4-t.sub.5]: as shown in FIG. 3e, at time t.sub.4, the first power switching tube S.sub.1 is switched off, the current difference between an input current and a transformer current flows through the second anti-parallel diode D.sub.s2, the second capacitor C.sub.2 discharges, the first capacitor C.sub.1 is charged, a current flowing through the second power switching tube S.sub.2 changes from negative to zero, a zero voltage switch-on (ZVS) condition is created such that the second power switching tube D.sub.2 is zero voltage switched on, a second output diode D.sub.2 and a third output diode D.sub.3 are switched on, a first output diode D.sub.1 and a fourth output diode D.sub.4 are switched off, and this phase ends when the current i.sub.S2 of the second power switching tube reaches zero; and

(45) operating mode 6 [t.sub.5-t.sub.6]: as shown in FIG. 3f, at time t.sub.5, a current of the second anti-parallel diode D.sub.s2 reaches zero, a direction of the current i.sub.S2 flowing through the second power switching tube S.sub.2 changes, the direction of the leakage inductance current i.sub.Lk remains unchanged and the leakage inductance current i.sub.Lk increases linearly, the second output diode D.sub.2 and the third output diode D.sub.3 are switched on, during time period t.sub.4-t.sub.6, the input inductor current flows through the primary winding of the transformer and charges the first capacitor C.sub.1 all the time, and a mathematical model during this time period t.sub.4-t.sub.6 is shown as Equation (7):

(46) $\begin{array}{cc}\left[\begin{array}{c}\frac{{\mathrm{di}}_{\mathrm{Lk}}}{\mathrm{dt}}\\ \frac{{\mathrm{du}}_{C2}}{\mathrm{dt}}\end{array}\right]=\left[\begin{array}{cc}0& \frac{1}{L_k}\\ \frac{1}{C_2}& 0\end{array}\right]\left[\begin{array}{c}{i}_{Lk}\left(t\right)\\ u_{C2}\left(t\right)\end{array}\right]+\left[\begin{array}{c}-\frac{1}{L_k}\\ -\frac{1}{C_2}\end{array}\right]\left[\begin{array}{c}\frac{u_o}{n}\\ i_{LB}\end{array}\right].& \left(7\right)\end{array}$

(47) As shown in FIG. 1, the output voltage on the secondary side of the transformer is converted to the primary side, and the voltage on the inductor is zero in a steady state. An equivalent model diagram when the circuit is in a steady state is shown in FIG. 4.

(48) The voltage on the inductor is zero in a steady state, and according to the Kirchhoff Voltage Law (KVL), it can be known that:
U.sub.in+U.sub.C1=U.sub.o/n  (8)

(49) The relationship between the voltage on the first capacitor C.sub.1 and the input voltage when the circuit is in a steady state can be obtained by establishing a mathematical model:

(50) $\begin{array}{cc}{U}_{C1}=\frac{D}{\left(1-D\right)}{U}_{\mathrm{in}}& \left(9\right)\end{array}$

(51) As can be seen from Equations (8) and (9), an output voltage gain of an improved high-gain quasi-resonant DC-DC converter under an ideal condition can be obtained as:

(52) 0$\begin{array}{cc}M=\frac{n}{\left(1-D\right)}.& \left(10\right)\end{array}$

(53) Upon simulation comparison by MATLAB software, as shown in FIG. 5, it can be seen that with the same parameters, the high-gain quasi-resonant DC-DC converter has advantages of high voltage gain and fast dynamic response.

(54) With different values of leakage inductance L.sub.k of the high-frequency transformer considered, the relationship between the output voltage gain M and the duty ratio D can be obtained by using MATLAB simulation software, as shown in FIG. 6. As can be seen from the figure, when the duty ratio is D∈(0.1,0.5), the output voltage gain M and duty ratio D strictly increase monotonically; when the duty ratio is D∈(0.4,0.6), the maximum output voltage gain value is reached; under the same duty ratio, the smaller the value of leakage inductance L.sub.k of the transformer, the higher the output voltage gain, the better the voltage boost performance of the converter.

(55) As shown in FIG. 3a, at time t.sub.0, the second power switching tube S.sub.2 is switched off, and the current difference between the input current and leakage current i.sub.Lk flows through the first anti-parallel diode D.sub.s1 of the first power switching tube S.sub.1. The input current, namely the current flowing through the input inductor L.sub.B, from the point of view of energy exchange, needs to satisfy the following relationship:

(56) $\begin{array}{cc}\frac{1}{2}{L_B\left(I_{\mathrm{LB}}\right)}^2=\frac{1}{2}{L\left(I_{\mathrm{in}}\right)}^2>\frac{1}{2}{C_s\left(\frac{U_m}{1-D}\right)}^2& \left(11\right)\end{array}$

(57) In Equation (11), I.sub.in represents the average value of the input current, I.sub.LB is the current flowing through the input inductor L.sub.B, and the capacitance C.sub.S is the sum of the parasitic capacitances of the first power switching tube S.sub.1 and the second power switching tube S.sub.2. The first power switching tube S.sub.1 can realize ZVS conduction within a full load range, provided that Equation (11) is satisfied.

(58) According to operating mode 5: at time t.sub.4, the first power switching tube S.sub.1 is switched off, input inductor current flows through the second anti-parallel diode D.sub.s2 of the second power switching tube S.sub.2, at the same time, a parasitic parallel capacitor of the first power switching tube S.sub.1 is charged, and a parasitic parallel capacitor of the second power switching tube S.sub.2 is discharged. Therefore, in order to realize the ZVS conduction condition of the second power switching tube S.sub.2, the following KCL equation must be satisfied at point B:
i.sub.S2(t.sub.4.sub.)=i.sub.Lk(t.sub.4.sub.)−i.sub.in(t.sub.4.sub.)=I.sub.in  (12)

(59) In Equation (12), i.sub.in represents an instantaneous value of input current. At time t.sub.4, the current through the second anti-parallel diode D.sub.s2 is always I.sub.in, which can prove that the second power switching tube S.sub.2 can achieve ZVS conduction within the full load range.

(60) To sum up, when the DC-DC converter simultaneously satisfies Equations (11) and (12), the two power switching tubes simultaneously achieve ZVS conduction, which will greatly reduce the loss of the switching tubes.

(61) An output voltage ripple refers to the difference between the maximum output voltage and the minimum output voltage when the input changes. The output voltage ripple ΔU=U.sub.o,max−U.sub.o,min is an important index for the design of a high-gain DC-DC converter.

(62) As shown in FIG. 1, a high-gain circuit output stage has a circuit structure with a bidirectional positive and negative voltage doubling rectifier circuit. According to the operating characteristics of the bidirectional positive and negative voltage doubling rectifier circuit, a formula of the output voltage ripples can be obtained:

(63) $\begin{array}{cc}\Delta U=\frac{I_{\circ }}{f_s{C}_o}.Math.\frac{k}{2}& \left(13\right)\end{array}$

(64) In Equation (13), k represents an order of the bidirectional positive and negative voltage doubling rectifier circuit. According to Equation (13), the output voltage ripple is related to an output current, a switching frequency and an output capacitance, where the output voltage ripple is inversely proportional to the switching frequency and capacitance value, but directly proportional to the order of the voltage doubling rectifier circuit and the output current.

(65) FIGS. 7a and 7b show the comparison between output voltage ripple waveforms of the traditional voltage-quadruple high-gain topology and the high-gain topology proposed herein.

(66) It can be seen from FIGS. 7a and 7b that with the same parameters, the high-gain converter proposed herein has an output voltage ripple waveform of 5V, and a ripple coefficient of 1.15%, which is far lower than the 3% as required for the ripple coefficient. However, the traditional voltage-quadruple high-gain topology has an output voltage waveform of 8V and a ripple coefficient of 4%.

(67) Driving waveforms of the switching tubes are shown in FIGS. 8a and 8b, the duty ratio of the first power switching tube S.sub.1 is 62%, the duty ratio of the second power switching tube S.sub.2 is 33%, and the two switching tubes have complementary driving waveforms. In order to avoid false triggering during inversions of control signals of the two switching tubes, a dead time is set during an experiment, and it can be seen from FIG. 8b that there is a dead time 1.2 μs between the two switching tubes.

(68) When the input voltage is 24V, it can be seen from FIG. 8a that the output voltage can reach 290V in a steady state, which verifies that the improved topology has a good voltage boost performance and can better meet the requirements of a high-gain DC-DC converter.

(69) FIG. 9 shows a ZVS conduction diagram of the first power switching tube S.sub.1. It can be seen that before the first power switching tube S.sub.1 is switched on, the current flows through its first anti-parallel diode D.sub.s1, and the current i.sub.S1 changes from negative to zero, such that a condition under which the voltage of the first power switching tube S.sub.1 is zero is created to enable the first power switching tube S.sub.1 to achieve ZVS conduction, which is consistent with the theoretical analysis.

(70) FIG. 10 shows a ZVS conduction diagram of the second power switching tube S.sub.2. When the first power switching tube S.sub.1 is switched off, a current difference between the input current i.sub.LB and the leakage inductance current i.sub.Lk flows through the second anti-parallel diode D.sub.s2, and when the current flowing through the second power switching tube S.sub.2 changes from negative to zero, the second power switching tube S.sub.2 realizes ZVS conduction.

(71) The loss of the high-gain DC-DC converter includes four parts: a loss of switching tubes, an on-state loss of output diodes, a copper loss and iron loss of the high-frequency transformer, where an expression of a total loss is as follows:
P.sub.loss=P.sub.S+P.sub.do+P.sub.Cu+P.sub.core

(72) When the load power is 170 W, the efficiency of the high-gain DC-DC converter is:

(73) ${\eta }_T=\frac{P_o}{P_o+P_{Loss}}=\frac{170}{170+19.18}=89.9\%$

(74) FIG. 11 shows an efficiency analysis diagram of a high-gain DC-DC converter, where when input voltage is 24V, the load power P.sub.0 is 100 W, 120 W, 150 W and 170 W, respectively. As can be seen from FIG. 11, when the load power is 100 W and 120 W, the high-gain DC-DC converter has a low efficiency, given that under low-power load, the loss of the high-frequency transformer and loss of the switching tubes in the high-gain DC-DC converter account for a high proportion, leading to a low power transmission efficiency of the high-gain DC-DC converter. When the load power is greater than or equal to 170 W, the effective value of current in the DC-DC converter is larger, which leads to a rapid increase of the on-state loss of switches and diodes, and lowers the efficiency of the DC-DC converter.

(75) The loss of the high-frequency transformer accounts for the largest proportion of the loss of the whole converter, with a proportion of 57.6%; the more the number of turns of the transformer is, the greater the copper loss of the transformer is; the iron loss of the transformer is mainly related to the volume of the transformer; and the hard switch-off of the switching tube also brings about greater loss. Therefore, the following measures can be further taken to reduce the loss of the high-gain converter:

(76) (1) reducing the number of turns of the transformer and increasing the order of the bidirectional positive and negative voltage doubling rectifier circuit to achieve a high gain;

(77) (2) in consideration of a large ratio of magnetic dispersion loss in the transformer loss, reasonably reducing the transformer parameters, e.g., the transformer volume, and adopting a planar transformer or relatively thin copper foil to reduce the transformer iron loss and magnetic dispersion loss;

(78) (3) for the loss of the MOSFET switching tubes, reducing the input current or using the switching tubes with a lower on-state loss to reduce the on-state losses of the switching tubes, for example, adopting novel switching tubes such as IPW60R045CPA;

(79) (4) considering that with the increase of the order of voltage doubling rectifier circuit, the number of output diodes increases, adopting output diodes with a lower on-state resistance; and

(80) (5) since in a loss analysis, the energy storage element is regarded as an ideal element, and there is also loss of capacitance and inductance in the actual circuit, reducing the parasitic parameters of energy storage components such as capacitors and inductors when designing a hardware circuit.

(81) On the basis of a half-bridge resonant high-gain circuit topology and by combining a bidirectional positive and negative voltage doubling rectifier circuit, a high-gain DC-DC converter is provided. The converter has the following advantages: the input current ripple is reduced by adopting large inductance in an input circuit; and the series resonance of a leakage inductance of a high-frequency transformer and a capacitor allows for continuous voltage boost of the converter. The converter can achieve a high-gain voltage conversion, and meanwhile, the switching tubes achieve soft switching, which significantly reduces system loss, and is particularly suitable for application in new-energy distributed power generation, electronic ballasts, and the like.

(82) It should be noted that relational terms herein such as first and second are only used to distinguish one entity or operation from another entity or operation without necessarily requiring or implying any such actual relationship or order between such entities or operations.

(83) It should be noted that the above description is not intended to limit the present disclosure, and the present disclosure is not limited to the above examples. Changes, modifications, additions or replacements made by those of ordinary skill in the art within the essential range of the present disclosure should fall within the protection scope of the present disclosure.