Method and apparatus for the decomposition of signals with varying envelope into offset components

Abstract

A method and apparatus for decomposition of signals with varying envelope into offset components are disclosed here, that sample the time variant envelope of a single carrier (SC) or a multi-carrier (MC) band limited signal, quantizes the sampled value using N.sub.b quantization bits and decomposes the sample into N.sub.b in-phase and quadrature components that are combined in pairs and modulated to generate a set of N.sub.b offset signals. The pulse shape applied in each offset signal is selected according to the spectral mask needed for the signal and to minimize envelope fluctuations in each offset signal from the set of N.sub.b components.

Claims

1. A method for decomposition of signals with varying envelope into offset components comprising the following steps: receiving a clock signal for reference of an oversampling rate f.sub.s=1/T.sub.s, according with a bandwidth B of an input signal s(t) to be sampled, wherein T.sub.s denotes the sampling period; receiving the input signal s(t), that can be a modulated single-carrier (SC) signal, a modulated multi-carrier (MC) signal, a baseband single-carrier (SC) signal or baseband multi-carrier (MC) signal, and processing in a phase splitter to obtain as output an in-phase component s.sub.I(t) and a quadrature component s.sub.q(t) from the input signal s(t); sampling the in-phase component s.sub.I(t) and the quadrature component s.sub.q(t) at the sampling rate f.sub.s=1/T.sub.s, with a time offset γT.sub.s between sample times nT.sub.s to generate samples s.sub.nI and s.sub.nQ of the in-phase and quadrature components, respectively; quantizing the in-phase samples s.sub.nI in a quantizer with N.sub.bq quantization bits (β.sub.nI.sup.(N.sup.bq.sup.), β.sub.nI.sup.(N.sup.bq.sup.−1), . . . , β.sub.nI.sup.(1)) and a quantization error ${\mathrm{.Math.}}_q=\frac{\Delta }{2},$  with Δ denoting a minimum quantization interval, to generate a set of N.sub.bq quantization bits corresponding to each quantized in-phase sample taken from a finite in-phase alphabet of quantized values I; quantizing the quadrature samples s.sub.nQ in a quantizer with N.sub.bq quantization bits (β.sub.nQ.sup.(N.sup.bq.sup.), β.sub.nQ.sup.(N.sup.bq.sup.−1), . . . , β.sub.nQ.sup.(1)) and a quantization error ${\mathrm{.Math.}}_q=\frac{\Delta }{2},$  with Δ denoting the minimum quantization interval, to generate the set of N.sub.bq quantization bits corresponding to each quantized quadrature sample taken from a finite quadrature alphabet of quantized values Q; mapping the quantization bits of the in-phase component in a mapper to generate N.sub.bq in-phase polar components given by
s.sub.nI,qt.sup.L=2.sup.L−1Δα.sub.nI,lδ(t−nT.sub.s),L=1,2, . . . , N.sub.bq, in which the quantized in-phase samples can be decomposed, and where α.sub.nI,L=b.sub.nI.sup.(L)=(−1)β.sub.nI.sup.(L)=±1, and where δ denotes a Dirac function; mapping the quantization bits of the quadrature component in a mapper to generate N.sub.bq quadrature polar components given by
s.sub.nQ,qt.sup.L=2.sup.L−1Δα.sub.nQ,lδ(t−nT.sub.s−γT.sub.s),L=1,2, . . . ,N.sub.bq, in which the quantized quadrature samples can be decomposed, and where α.sub.nQ,L=b.sub.nQ.sup.(L)=(−1)β.sub.nQ.sup.(L)=±1, and where δ denotes the Dirac function; filtering the N.sub.bq polar in-phase and quadrature components s.sub.nI,qt.sup.L and s.sub.nQ,qt.sup.L by a filter having a bandwidth of B<f.sub.s comprising an impulsive response r(t) and a frequency response for cancelation of a first replica of the spectrum of the sampled signal, to generate N.sub.bq filtered in-phase signal components
s.sub.nq,qt,F.sup.L=s.sub.nI,qt.sup.L*r(t),L=1,2, . . . ,N.sub.bq, and N.sub.bq filtered quadrature signal components
s.sub.nI,qt,F.sup.L=s.sub.nQ,qt.sup.L*r(t),L=1,2, . . . ,N.sub.bq where * denotes convolution; and combining the filtered in-phase and quadrature components a same amplitude, to generate N.sub.bq offset signals
s.sub.n,qt,F.sup.L=s.sub.nI,qt,F.sup.L+s.sub.nQ,qt,F.sup.L,L=1,2, . . . ,N.sub.bq, in which the input signal is decomposed.

2. The method of claim 1, wherein said step of receiving said input signal carrying the information comprises: receiving a band limited signal with time varying envelope or receiving in-phase and quadrature phase components of a band limited signal with time varying envelope or receiving the samples of in-phase and quadrature components of a band limited signal with time varying envelope or comprises receiving the samples of a band limited signal with time varying envelope.

3. The method of claim 1, wherein the order of said step of processing in the phase splitter the input signal and said step of sampling are reversed, with the input s(t) signal being firstly sampled and the sampled input s(t) signal being processed by the phase splitter to obtain as output an in-phase sampled component s.sub.I(t) and a quadrature sampled component s.sub.q(t) from the sampled input signal s(t), with a delay block in an output associated to the sampled quadrature component to introduce the time offset γT.sub.s between the in-phase and quadrature sampled components.

4. The method of claim 1, wherein said step of quantization comprises: two quantizers in parallel, where one quantizes each sample of in-phase component and generates N.sub.bq quantization bits that correspond to the quantized version of the in-phase sample and another quantizer that quantizes each sample of quadrature component to generate N.sub.bq quantization bits that correspond to the quantized version of the sample of quadrature component.

5. The method of claim 1, wherein said step of quantizing the in-phase samples s.sub.nI and said step of quantizing the quadrature samples s.sub.nQ comprises only one quantizer with 2N.sub.bq quantization bits, with N.sub.bq bits for the quantization of in-phase samples and N.sub.bq quantization bits for the quadrature samples.

6. The method of claim 1, wherein said step of processing the quantization bits comprises: processing in-phase samples s.sub.nI involves processing the N.sub.bq in-phase quantization bits in the mapper to generate the corresponding polar components for each quantization bit that are associated to the decomposition of the quantized value of s.sub.nI into polar components; processing the quantization bits quadrature samples s.sub.nQ involves processing the N.sub.bq quadrature quantization bits in the mapper to generate the corresponding polar components for each quantization bit that are associated to the decomposition of the quantized value of s.sub.nQ into polar components.

7. The method of claim 1, wherein said step of quantizing the in-phase samples s.sub.nI in the quantizer and said step of processing the quantization bits to generate the polar components by a single mapper-quantizer circuitry that quantizes and maps directly the quantized sample into the corresponding polar components and wherein said step of quantizing the quadrature samples s.sub.nQ in the quantizer to generate the quantization bits and said step of processing the quantization bits to generate the polar components by a single mapper-quantizer circuitry that quantizes and maps directly the quantized sample into the corresponding polar components.

8. An apparatus for decomposition of signals with varying envelope into offset components comprising: an input circuitry for receiving an input signal s(t) carrying information bits; an input circuitry for receiving a clock signal for reference of an oversampling rate f.sub.s=1/T.sub.s, according to a bandwidth B of the input signal; a phase splitter circuitry for processing said input signal and generating in-phase and quadrature components s.sub.I(t) and s.sub.q(t) from the input signal s(t); a sampling circuitry for sampling, with a time offset γT.sub.s between sample instant nT.sub.s, said in-phase component and said quadrature component of the input signal in accordance with said sampling rate to generate samples s.sub.nI of the in-phase and samples s.sub.nQ of the quadrature components with the time offset; a quantizer circuitry coupled to the sampling circuitry for quantizing the in-phase samples s.sub.nI and generating N.sub.bq in-phase quantization bits (β.sub.nI.sup.(N.sup.bq.sup.), β.sub.nI.sup.(N.sup.bq.sup.−1), . . . , β.sub.nI.sup.(1)) that correspond to each quantized in-phase sample taken from a finite in-phase alphabet of quantized values I; a quantizer circuitry coupled to the sampling circuitry for quantizing the quadrature samples s.sub.nQ and generating N.sub.bq quadrature quantization bits (β.sub.nI.sup.(N.sup.bq.sup.), β.sub.nQ.sup.(N.sup.bq.sup.−1), . . . , β.sub.nQ.sup.(1)) that correspond to each quantized quadrature sample taken from a finite quadrature alphabet of quantized values Q; an in-phase polar mapper circuitry coupled to the quantizer circuitry of in-phase component for processing the N.sub.bq in-phase quantization bits to generate N.sub.bq in-phase polar components given by
s.sub.nI,qt.sup.L=2.sup.L−1Δα.sub.nI,lδ(t−nT.sub.s),L=1,2, . . . ,N.sub.bq, in which the quantized in-phase samples are decomposed, and where α.sub.nI,L=b.sub.nI.sup.(L)=(−1)β.sub.nI.sup.(L)=±1, and where δ denotes a Dirac function; a quadrature polar mapper circuitry coupled to the quantizer circuitry of quadrature component for processing the N.sub.bq quadrature quantization bits to generate N.sub.bq quadrature polar components given by
s.sub.nQ,qt.sup.L=2.sup.L−1Δα.sub.nQ,lδ(t−nT.sub.s−γT.sub.s),L=1,2, . . . ,N.sub.bq, in which the quantized quadrature samples are decomposed, and where α.sub.nQ,L=b.sub.nQ.sup.(L)=(−1)β.sub.nQ.sup.(L)=±1, and where δ denotes a Dirac function; a filter circuitry for filtering each one of said N.sub.bq in-phase polar signal components by N.sub.bq filters with impulsive response r(t) and a bandwidth B<f.sub.s to generate N.sub.bq filtered in-phase signal components
s.sub.nq,qt,F.sup.L=s.sub.nI,qt.sup.L*r(t),L=1,2, . . . ,N.sub.bq, where * denotes convolution; a filter circuitry for filtering each one of said N.sub.bq quadrature polar signal components by N.sub.bq filters with impulsive response r(t) and a bandwidth B<f.sub.s to generate N.sub.bq filtered quadrature signal components
s.sub.nI,qt,F.sup.L=s.sub.nQ,qt.sup.L*r(t),L=1,2, . . . ,N.sub.bq where * denotes convolution; and a combining circuitry for combining the filtered in-phase and quadrature signals by summing pairs of in-phase components and quadrature filtered components with same amplitude to generate N.sub.bq offset signals
s.sub.n,qt,F.sup.L=s.sub.nI,qt,F.sup.L+s.sub.nQ,qt,F.sup.L,L=1,2, . . . ,N.sub.bq, in which the input signal is decomposed.

9. The apparatus of claim 8, wherein said sampling circuitry is placed before said phase splitter circuitry for processing said input signal and generating the in-phase and quadrature components.

10. The apparatus of claim 8, wherein said sampling circuitry is arranged to sample, in same instants, said in-phase component and said quadrature component of the input signal in accordance with the said sampling rate f.sub.s to generate the samples of the in-phase and quadrature component, and the apparatus further comprising an output branch coupled to a delay circuitry for introducing a time offset in the samples of the quadrature component.

11. The apparatus of claim 8, comprising one quantizer with 2N.sub.bq bits connected to two mappers for the quantization of samples of in-phase and quadrature components, that generate N.sub.bq in-phase polar components and N.sub.bq quadrature polar components.

12. The apparatus of claim 8, comprising mappers for the quantization and mapping of the quantized bits by directly making the conversion in-phase samples s.sub.nI and quadrature samples s.sub.nQ into corresponding sets of N.sub.bq in-phase polar components and N.sub.bq quadrature polar components, respectively.

13. The apparatus of claim 8, wherein the sampling circuitry, the quantizer circuitry and the mapper circuitry is implemented by field programmable gate arrays (FPGA), microprocessors, or digital signal processors (DSPs) with look up tables.

14. The apparatus of 8, wherein said filters for filtering each polar signal component are impulse response (FIR) filters, analogue filters, digital filters or analog-to-digital converters (ADC).

Description

BRIEF DESCRIPTION OF THE FIGURES

(1) The various aspects of embodiments of the present invention will be described with reference to the accompanying drawings, wherein generally similar reference numbers indicate identical or functionally similar elements. The various aspects of embodiments disclosed here, including features and advantages of the present invention outlined above are described more fully in the detailed description in conjunction with the drawings in which:

(2) FIG. 1 is a process flowchart embodiment according to the decomposition of signals with varying envelope into offset components method.

(3) FIG. 2 is a block diagram that illustrates an exemplary embodiment of an apparatus for decomposition of signals with varying envelope into offset components.

(4) FIG. 3 is a block diagram that illustrates a second exemplary embodiment for the in-phase and quadrature offset sampler block 209 of FIG. 2.

(5) FIG. 4 is a block diagram that illustrates a third exemplary embodiment for the in-phase and quadrature offset sampler block 209 of FIG. 2.

DETAILED DESCRIPTION OF THE INVENTION

(6) Table of Contents

(7) 1. Introduction

(8) 2. Methods for decomposition of signals with varying envelope into offset components

(9) 3. Apparatus and systems for decomposition of signals with varying envelope into offset components

(10) 4. Summary

(11) 5. Conclusions

1. Introduction

(12) Methods, apparatuses and systems for decomposition of signals with varying envelope into offset components (DSVEOC) are disclosed herein. High-level description of DSVEOC method and systems according to embodiments of the present invention will be provided in sections 2 and 3.

(13) Some definitions are provided in this section only for convenience purposes and are not limiting. The meaning of these terms will be apparent for a person skilled in the art based on the entirety of the teachings provided herein.

(14) Modulated signals can be described by s(t)=s.sub.I(t)cos(2πf.sub.ct)−s.sub.q(t)sin(2πf.sub.ct), where w.sub.c=2πf.sub.c denotes the angular frequency, f.sub.c denotes the carrier frequency, and s.sub.I(t) and s.sub.Q(t) denote the in-phase and the quadrature component, respectively. The signal can also be described by s(t)=Re{{tilde over (s)}(t)e.sup.jw.sup.c.sup.t}, where {tilde over (s)}(t)=s.sub.I(t)+js.sub.Q(t) denotes the complex envelope, s.sub.I(t) denotes the in phase component, s.sub.Q(t) denotes the quadrature component, with the signal envelope given by e(t)=√{square root over ((s.sub.I(t)).sup.2+(s.sub.Q(t)).sup.2)}. When e(t) is invariant along time the signal is said to be a constant envelope signal. Time varying envelope signal refers to a signal where e(t) varies with time. Having both non-constant envelope and phase, s(t) is said to be a time-varying complex envelope signal. The dynamic range (DR) of the envelope represents the range of values between which the signal's envelope varies. The dynamic range of the in-phase component (DRi) represents the range of values between which the in-phase component varies. The dynamic range of the quadrature component (DRq) represents the range of values between which the quadrature component varies.

(15) For purposes of convenience, and not limitation, time varying complex envelope signals are sometimes referred to herein as time varying envelope signals.

(16) Let us consider the input signal s(t) that is submitted to a phase splitter to obtain the output the in-phase component s.sub.I(t) and quadrature component s.sub.q(t). Both components are sampled at a sampling rate f.sub.s=1/T.sub.s, higher that the double of the bandwidth of the input signal, with a time offset of γT.sub.s between the sampling instants of in-phase and quadrature components. The sampling process results, for the in-phase component, in the sampled signal
s.sub.n,I(t)=Σ.sub.n=0.sup.+∞s.sub.I(nT.sub.s)δ(t−nT.sub.s),
where δ(t−nT.sub.s) denotes the Dirac pulse at instant nT.sub.s and for the quadrature component results in the sampled signal
s.sub.n,Q(t)=Σ.sub.n=0.sup.+∞s.sub.Q(nT.sub.s+γT.sub.s)δ(t−nT.sub.s−γT.sub.s),
where δ(t−nT.sub.s−γT.sub.s) denotes the Dirac pulse at instant nT.sub.s+γT.sub.s.

(17) Let us denote as s(nT.sub.s)=s.sub.n the time domain sample of the time-varying envelope signal at the sample instant nT.sub.s and s.sub.nI(nT.sub.s)=s.sub.nI and s.sub.nQ(nT.sub.s+γT.sub.s)=s.sub.nQ the corresponding samples of in-phase and quadrature components. The dynamic ranges of s.sub.nI and s.sub.nQ are DRi and DRq respectively. For purposes of convenience, but not a limitation, it is assumed that DRi=DRq.

(18) Through quantization, the time domain sample s.sub.nI of the in-phase component can be transformed into a quantized symbol s.sub.nI,q taken from a finite alphabet of 2.sup.N.sup.bq possible quantization symbols I={s.sub.I,0, s.sub.I,1, . . . , s.sub.I,N.sub.QL.sub.−1}. Also, trough a quantization the time domain sample s.sub.nQ of the quadrature component can be transformed into a quantized symbol s.sub.nQ,q taken from a finite alphabet of 2.sup.N.sup.bq possible quantization symbols Q={s.sub.Q,0, s.sub.Q,1, . . . , s.sub.Q,N.sub.QL.sub.−1}. The N.sub.bq quantization bits and N.sub.QL=2.sup.N.sup.bq quantization levels applied in each component are defined in terms of the maximum quantization error

(19) ${\mathrm{.Math.}}_{\mathrm{Iq}}=\frac{\mathrm{DRi}}{2\times 2^{N_{\mathrm{bq}}}}=\frac{\Delta i}{2}\mathrm{and}{\mathrm{.Math.}}_{\mathrm{Qq}}=\frac{\mathrm{DRq}}{2\times 2^{N_{\mathrm{bq}}}}=\frac{\Delta q}{2},$
where Δi and Δq represent the quantization interval for the in-phase component and quadrature component, respectively. Since DRi=DRq, ε.sub.Iq=ε.sub.Qq and Δi=Δq=Δ. For each component N.sub.bq quantization bits (β.sub.nI.sup.(N.sup.bq.sup.), β.sub.nI.sup.(N.sup.bq.sup.−1), . . . , β.sub.nI.sup.(1)) and (β.sub.nq.sup.(N.sup.bq.sup.), β.sub.nq.sup.(N.sup.bq.sup.−1), . . . , β.sub.nq.sup.(1)) are employed in the quantizers. The polar representations of the quantization bits (b.sub.nI.sup.(N.sup.b.sup.), b.sub.nI.sup.(N.sup.b.sup.−1), . . . , b.sub.nI.sup.(1)) and (b.sub.nQ.sup.(N.sup.bq.sup.), b.sub.nQ.sup.(N.sup.bq.sup.−1), . . . , b.sub.nQ.sup.(1)) are related with the quantization bits by b.sub.nI.sup.(m)=(−1).sup.β.sup.nI.sup.(m) and b.sub.nq.sup.(m)=(−1).sup.β.sup.nq.sup.(m), respectively.

(20) Thus, the in-phase sample s.sub.nI is transformed into a quantized value taken from the finite alphabet of quantized values I, that can be represented as a sum of N.sub.bq polar components by
s.sub.nI,qt=Σ.sub.L=1.sup.N.sup.bq2.sup.L−1Δα.sub.nI,L,
with α.sub.nI,L=b.sub.nI.sup.(L−1)=±1 and 2.sup.L−1Δα.sub.nI,L representing the polar component corresponding to the L-th quantization bit.

(21) The quadrature component of each symbol from the finite alphabet of quantized values Q, can be represented as a sum of N.sub.mQ≤N.sub.bq polar components, that are the result of the decomposition of quantization value s.sub.nq,QT into polar components given by
s.sub.nQ,qt=Σ.sub.L=1.sup.N.sup.bq2.sup.L−1Δα.sub.nQ,L,
with α.sub.nQ,L=b.sub.nQ.sup.(L−1)=±1 and 2.sup.L−1Δα.sub.nQ,L representing the polar component corresponding to the L-th quantization bit.

(22) Thus, after the decomposition into polar components results for the in-phase component
s.sub.nI,qt(t)=Σ.sub.n=0.sup.+∞Σ.sub.L=1.sup.N.sup.bq2.sup.L−1Δα.sub.nI,Lδ(t−nT.sub.s)=Σ.sub.n=0.sup.+∞Σ.sub.L=1.sup.N.sup.bqs.sub.nI,qt.sup.L,
where s.sub.nI,qt.sup.L=2.sup.L−1Δα.sub.nI,Lδ(t−nT.sub.s) denotes the polar representation of L-th quantization bit of the sample of in-phase component taken at instant nT.sub.s and for the quadrature component
s.sub.nQ,qt(t)=Σ.sub.n=0.sup.+∞Σ.sub.L=1.sup.N.sup.bq2.sup.L−1Δα.sub.nQ,Lδ(t−nT.sub.s−γT.sub.s)=Σ.sub.n=0.sup.+∞Σ.sub.L=1.sup.N.sup.bqs.sub.nQ,qt.sup.L,
with s.sub.nQ,qt.sup.L=2.sup.L−1Δα.sub.nQ,Lδ(t−nT.sub.s−γT.sub.s) denoting the polar representation of L-th quantization bit of the sample of quadrature component taken at instant nT.sub.s+γT.sub.s. Each signal in each set of N.sub.bq polar components is submitted to a filter with an impulsive response r(t) and a frequency response that achieves the cancelation of the first replica of the spectrum of the sampled signal, i. e. a filter with a bandwidth B<f.sub.s. Since for each sample there are N.sub.bq in-phase signal components, then the N.sub.bq filters output the set of in-phase filtered components
s.sub.nI,qt,F.sup.L=s.sub.nI,qt.sup.L*r(t)=2.sup.L−1Δα.sub.nI,Lδ(t−nT.sub.s)*r(t),L=1,2, . . . ,N.sub.bq,
where the operator * denotes the convolution.

(23) For the quadrature component after the N.sub.bq filters, we have the set of N.sub.bq quadrature filtered components
s.sub.nQ,qt,F.sup.L=2.sup.L−1Δα.sub.nI,Lδ(t−nT.sub.s−γT.sub.s)*r(t),L=1,2, . . . ,N.sub.bq.

(24) In-phase and quadrature pairs components with same amplitude are combined to generate N.sub.bq offset signals that summed generate the quantized version of the complex envelope of the original signal given by
s.sub.nqt(t)=Σ.sub.n=0.sup.+∞[Σ.sub.L=0.sup.N.sup.bq2.sup.L−1Δα.sub.nI,Lr(t−nT.sub.s)+j2.sup.L−1Δα.sub.nQ,Lr(t−nT.sub.s−γT.sub.s)].

2. Methods for Decomposition of Signals with Time Varying Envelope into Offset Components

(25) DSVEOC methods according to embodiments of the present invention rely on the ability to decompose signals with time varying envelope into several offset signal components, that when summed generate a quantized version of the original signal.

(26) In the following descriptions, each embodiment is first presented conceptually using a mathematical derivation of underlying concepts of the embodiment. One embodiment of a method of operation of the DSVEOC is presented, followed by various system embodiments.

(27) In all embodiments for purposes of convenience, and not limitation, the same quantization rule is assumed for both in-phase and quadrature components of input signal. It is noted that two identical quantizers with N.sub.bq bits are employed in these embodiments. It is also assumed DRi=DRq and the same number of quantization bits for in-phase and quadrature components for purposes of illustration, and not limitation. The scope of the invention covers the use of one quantizer for both in-phase and quadrature component, as well as the use of different quantizers and DRi≠DRq, and the implementation of such variations will be apparent to persons skilled in the art based on the teachings contained herein.

(28) Accordingly, in one embodiment of the DSVEOC method the input signal s(t) that is submitted to a phase splitter to obtain the in-phase component s.sub.J(t) and quadrature component s.sub.q(t). Both components are sampled at a sampling rate f.sub.s=1/T.sub.s, with a time offset between sample times to generate the sampled versions s.sub.nI and s.sub.nQ of the in-phase and quadrature component, respectively. For purposes of convenience, and not limitation it is assumed that DRi=DRq. Each sampled signal component is submitted to a quantizer with N.sub.bq bits. This means, that the in-phase samples s.sub.nI are submitted to a quantizer to generate the set of quantization bits corresponding to the quantized value taken from the finite alphabet of quantized values I. This also means that the quadrature component samples s.sub.nQ are submitted to a quantizer to generate the N.sub.bq quantization bits that correspond to the quantized value taken from a finite alphabet Q. Next, the quantization bits of the in-phase component are submitted to a mapper to generate the N.sub.bq polar components given by
s.sub.nI,qt.sup.L=2.sup.L−1Δα.sub.nI,lδ(t−nT.sub.s),L=1,2, . . . ,N.sub.bq,
in which the quantized value can be decomposed.

(29) Also, the quantization bits of the quadrature component are submitted to a mapper to generate the N.sub.bq polar components given by
s.sub.nQ,qt.sup.L=2.sup.L−1Δα.sub.nQ,lδ(t−nT.sub.s−γT.sub.s),L=1,2, . . . ,N.sub.bq,
in which the quantized value can be decomposed.

(30) Each signal in each set of N.sub.bq polar components is submitted to a filter with an impulsive response r(t) and a frequency response that achieves the cancelation of the first replica of the spectrum of the sampled signal, i.e., a fitter with a bandwidth B<f.sub.s. Since for each sample there are N.sub.bq in-phase polar components and N.sub.bq quadrature polar components, then the N.sub.bq filters output the set of N.sub.bq in-phase signal components
s.sub.nI,qt,F.sup.L=s.sub.nI,qt.sup.L*r(t),L=1,2, . . . ,N.sub.bq,
and the set of N.sub.bq quadrature signal components
s.sub.nQ,qt,F.sup.L=s.sub.nQ,qt.sup.L*r(t),L=1,2, . . . ,N.sub.bq.

(31) Next, after the filter, the in-phase and quadrature pairs of components with same amplitude are combined to generate N.sub.bq offset signals
s.sub.n,qt,F.sup.L=s.sub.nI,qt,F.sup.L+s.sub.nQ,qt,F.sup.L,L=1,2, . . . ,N.sub.bq.

(32) These signals can be delivered to an amplification stage, where nonlinear amplifiers are employed.

(33) It is important to mention that the sum of the N.sub.bq offset signal generates the quantized version of the complex envelope of the original signal given by
s.sub.nqt(t)=Σ.sub.n=0.sup.+∞[Σ.sub.L=0.sup.N.sup.bqs.sub.nI,qt,F.sup.L+s.sub.nQ,qt,F.sup.L].

(34) The operation of the DSVEOC embodiment shall be described further with reference to the flowchart of FIG. 1. Optional components are illustrated with dashed lines. The process starts at step 101, which includes receiving the signal s(t) carrying the information, that will be decomposed into quantized offset components. In another embodiment this involves receiving the baseband signal carrying the information. In another embodiment this involves receiving the signal s(t) carrying the information in the intermediate frequency. In another embodiment this involves receiving the in-phase and quadrature components of the signal carrying the information.

(35) Step 102 includes receiving a clock signal set according to the signal frequency of the input signal.

(36) Step 103 includes receiving a clock signal set according to a desired sample rate of the input signal. It is important to mention that as understood by a person skilled in the art the sampling rate may vary according to the bandwidth of the input signal and the desired time resolution of the sampling process.

(37) Step 104 includes submitting the input signal to a phase splitter to generate the in-phase and quadrature components of the input signal.

(38) Step 105a includes sampling the in-phase component in accordance with the sampling rate defined by the clock received in step 103. In the embodiment example of FIG. 1, step 105a is implemented by a sampling circuit or a sample and hold (S/H) circuit.

(39) Step 105b includes sampling the quadrature component in accordance with the sampling rate defined by the clock received in step 103. In the embodiment example of FIG. 1, step 105b is implemented by a sampling circuit or a sample and hold (S/H) circuit. In some embodiments with multicarrier signals steps 105a and 105b can be implemented by a Fast Fourier transform (FFT) with a higher time resolution.

(40) Step 106 includes processing the quadrature samples by a delay circuit to generate a time offset between the samples of the in-phase component and the samples of quadrature component.

(41) Step 107 includes processing in one quantizer the samples of in-phase component and processing in another quantizer the samples of quadrature component to generate the quantization bits that correspond to the quantized value of each sample of in-phase component and the quantization bits that correspond to the quantized value of each sample of quadrature component, respectively. As understood by a person skilled in the art based on the teaching herein, step 107 can be performed by a block using a single quantizer for samples of both components. Also, as understood by a person skilled in the art based on the teaching herein, step 107 can be performed by a comparator and a LUT with the corresponding quantization bits of the quantized values.

(42) Step 108a includes processing individually in an in-phase mapper the quantization bits of the quantized value of sample of in-phase component, also denoted as quantized in-phase sample, to generate the polar signals in which the quantized value is decomposed according to s.sub.nI,qt=Σ.sub.L=1.sup.N.sup.bq 2.sup.L−1Δα.sub.nI,L. Step 108b includes processing individually in a quadrature mapper the quantization bits of the quantized value of sample of quadrature component, also denoted as quantized quadrature sample, to generate the polar components in which the quantized value is decomposed according to s.sub.nQ,qt=Σ.sub.L=1.sup.N.sup.bq 2.sup.L−1Δα.sub.nQ,L. As understood by a person skilled in the art based on the teaching herein, step 108b can be performed by a comparator and a LUT with the corresponding amplitudes and phases of the quantization bits for quantized values of both components' samples. It is important to note that in certain embodiments of the present invention steps 107, 108a and 108b can be performed by a block that quantizes and generates directly the quantization bits and the corresponding polar signals for the in-phase and quadrature components.

(43) Step 109A includes processing the polar in-phase components by filtering each polar in-phase component by a filter with the desired spectral shape and a bandwidth lower than the sampling frequency.

(44) Step 109B includes processing the polar quadrature components by filtering each polar quadrature component signal by a filter with the desired spectral shape and bandwidth lower than the sampling frequency.

(45) Step 110 includes processing the in-phase signals and quadrature signals by summing pairs of signals with same amplitude to generate a set of N.sub.bq offset signals that summed are equal to a quantized version of the input signal.

3. Apparatus and Systems for Decomposition of Signals with Varying Envelope into Offset Components

(46) Block diagram 200 of FIG. 2 is an example that illustrates a possible embodiment of the DSVEOC system implementing the process flowchart 100 of FIG. 1. In the example of FIG. 2, optional components are illustrated with dashed lines. In other embodiments, additional components may be optional. In this example, a data signal with time varying envelope 201 is received, a clock reference signal 201a for the sampling process is also received as input. In another embodiment, the signal 201 can be the in-phase and quadrature components of a time-varying envelope signal and the phase splitter 202 is not required. In another embodiment the signal 201 can be the in-phase and quadrature samples of a time-varying envelope signal and the phase splitter 202 and samplers 205 and 206 are not required. In other embodiments signal 201 can be a baseband signal, or IF signal.

(47) The clock reference signal 201a can be used by the sampling blocks 205 and 206, by the quantizers 210 and 211 and mappers 214 and 215. The common clock signal 201a is used to ensure that the outputs of the quantizers 212-{1, . . . , N.sub.bq} and 213-{1, . . . , N.sub.bq} are time aligned, to ensure that the outputs of mappers 214 and 215 are time synchronized and the outputs 216-{1, . . . , N.sub.bq} and 217-{1, . . . , N.sub.bq} are also synchronized. It can be understood by a person skilled in the art that the choice of the clock reference signal is made according the bandwidth of the input signal and the desired sampling rate. In this embodiment the in-phase and quadrature offset sampler block 209 is composed by phase splitter 202, the samplers 205 and 206 and may have an optional delay block at the output of the quadrature sampler 206. Signals 207 and 208 are the outputs of 209, that are delivered to the quantizers of offset component generator 224.

(48) The phase splitter 202 generates the in-phase component 203 and the quadrature component 204 of the input signal 201. Still referring to FIG. 2, the in-phase and quadrature components are sampled by the samplers 205 and 206 with a sampling rate of f.sub.s and a time offset between the sampling instants of 205 and 206, respectively. In another embodiment, an optional delay block is employed at the output of the sampler 206 to ensure the time offset between the samples of both components and samplers 205 and 206 are time aligned.

(49) Still referring to FIG. 2, signal 207, corresponding to the in-phase sampled signal s.sub.n,I(t), and signal 208, corresponding to the sampled quadrature signal s.sub.n,Q(t), are sent to the offset component generator, 224, where each sample of each component is converted by a N.sub.bq bit quantizer. In block 224, each in-phase sample is quantized in 210 into a set of N.sub.bq quantization bits 212-{1, . . . , N.sub.bq}. Also, each quadrature sample is quantized in 211 into a set of N.sub.bq quantization bits 213-{1, . . . , N.sub.bq}. The quantization bits 212-{1, . . . , N.sub.bq} and 213-{1, . . . , N.sub.bq} are processed individually in two polar component mappers 214 and 215, to generate the set of N.sub.bq signals 216-{1, . . . , N.sub.bq} with the polar signals s.sub.nI,qt.sup.L related with the in-phase component and to generate the set of N.sub.bq signals 217-{1, . . . , N.sub.bq} with the polar signals s.sub.nQ,qt.sup.L related with the quadrature component, respectively. In 218-{1, . . . , N.sub.bq}, the in-phase polar signals s.sub.nI,qt.sup.L are filtered by a set of N.sub.bq filters with the same impulsive response and a bandwidth lower than the sampling rate f.sub.s. The filtering operation of the set of quadrature polar signals s.sub.nQ,qt.sup.L 218-{1, . . . , N.sub.bq} is done by the set of N.sub.bq filters 219-{1, . . . , N.sub.bq} with the same impulsive response of the filters employed in the filtering of the in-phase signals.

(50) The pairs of in-phase filtered signals 220-{1, . . . , N.sub.bq} and filtered quadrature signals 221-{1, . . . , N.sub.bq} with same amplitude are combined in 223-{1, . . . , N.sub.bq} to generate a set 223-{1, . . . , N.sub.bq} of N.sub.bq offset signals s.sub.n,qt,F.sup.L=s.sub.nI,qt,F.sup.L+s.sub.nQ,qt,F.sup.L, L=1, 2, . . . , N.sub.bq, with constant or quasi-constant envelope. Blocks 220a.sub.1-220a.sub.Nbq are optional delay blocks that can be used to introduce a time offset between in-phase and quadrature components.

(51) In another embodiment the two quantizers can be replaced by one quantizer with 2N.sub.bq quantization bits and as inputs the samples of the in-phase component and the samples of the quadrature component. In this quantizer a subset of N.sub.bq quantization bits is employed in the quantization of in-phase samples and another set of N.sub.bq bits is assigned to the quantization of the quadrature samples.

(52) Block diagram 300 of FIG. 3 is an example that illustrates a second embodiment of the block 209 of FIG. 1, with only one sampler as shown in block 308. In the example of FIG. 3, optional components are illustrated with dashed lines. In this example a data signal with time varying envelope 301, and a clock reference signal 301a for the sampling process are received as inputs.

(53) The clock reference signal 301a can be used by the phase splitter 302, and by the sampling block 305. The common clock signal 301a is used to ensure that the outputs of 302 are time aligned, and to ensure that the outputs of block 305 are synchronized. It can be understood by a person skilled in the art that the choice of the clock reference signal is made according to the bandwidth of the input signal and the desired output signal. The input signal 301 is processed in 302 to generate the in-phase component 303 and the quadrature component 304 of the input signal. Both components 303 and 304 are the inputs of the sampling block that originates the sampled signals s.sub.n,I(t) and s.sub.n,Q(t) of both components at the sampling rate f.sub.s and with a time offset of γT.sub.s. In another embodiment the sampling block may generate time aligned samples for both components, being the time offset introduced by an optional delay block 307a connected to the output 307 of the sampler that corresponds to the signal with the samples of the quadrature component. The outputs of the sampling block 306 and 307 (or signal 307b when the delay block is used) are the inputs of the offset component generator 224 of FIG. 2.

(54) Block diagram 400 of FIG. 4 is an example that illustrates a third embodiment of the block 209 of FIG. 1, with a sampler followed by a phase splitter as shown in block 407. In the example of FIG. 4, optional components are illustrated with dashed lines. In other embodiments, additional components may be optional. In this example a data signal with time varying envelope 401, and a clock reference signal 401a for the sampling process are received as inputs.

(55) The clock reference signal 401a can be used by the sampler 402, and by the phase splitter 404. The common clock signal 401a is used to ensure that the outputs of 404 are synchronized. It can be understood by a person skilled in the art that the choice of the clock reference signal is made according to the bandwidth of the input signal and the desired output signal. The input signal 401 is sampled at a rate of f.sub.s in 402 to generate the sampled signal s.sub.n(t). The samples of input signal 403 are processed in the phase splitter 404 that originates the in-phase and quadrature components s.sub.n,I(t) and s.sub.n,Q(t) that are the output signals 405 and 406 of block 404. In another embodiment a time offset can be applied to the signal 406 by an optional delay block 406a. The outputs 405 and 406 (or optionally the signal 406b) of the phase splitter block 404 are the inputs of the offset component generator 224.

(56) It can be understood by a person skilled in the art that the choice of the clock reference signal is made according to the bandwidth of the input signal and the desired output signal. As understood by a person skilled in the art other reference clock signals and different reference clock signals may be used by the different blocks. It is noted that two quantizers are employed together with two mappers for purposes of illustration, and not limitation. The scope of the invention covers the use of one quantizer and two mappers or different number of mappers, and implementation of such variations will be apparent to persons skilled in the art based on the teachings contained herein. In another exemplary embodiment, the offset component generator 224 may include a FPGA and lookup tables and the sampling of quadrature component may add the time offset between the in-phase and quadrature samples.

(57) While preferred embodiments of the present disclosure have been described above, the present disclosure is not limited to the specific configurations described above. Various variations and modifications may be made without departing from the scope of the present disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

4. SUMMARY

(58) Mathematical basis for a new concept related to the decomposition of non offset signals into offset components is provided herein. These new concepts allow arbitrary signals to be constructed from sums of offset components using novel techniques not available commercially, not taught or found in literature or related art. Furthermore, the blend of various techniques and circuits provided in the disclosure provide unique aspects of the invention which permits superior linearity of the amplifiers applied to each offset component. Embodiments of the invention can be implemented by a blend of hardware, software and firmware. Both digital and analog techniques can be used with or without microprocessors and DSP's or with or without FPGAs. Embodiments of the invention can be implemented for communications systems and electronics in general.

5. Conclusions

(59) The present invention has been described above with the aid of functional building blocks illustrating the functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed. Any such alternate boundaries are thus within the scope and spirit of the claimed invention. One person skilled in the art will recognize that these functional building blocks can be implemented by discrete components, processors executing appropriate software and the like and combinations thereof.

(60) While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. Thus, the breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments but should be defined only in accordance with the following claims and their equivalents.