ELECTRICAL SHIELDING USING BAR VIAS AND ASSOCIATED METHODS
20170318664 ยท 2017-11-02
Assignee
Inventors
- Laurent Marechal (Bures Sur Yvette, FR)
- Richard Rembert (Quaix En Chartreuse, FR)
- Jerome Lopez (Saint-Joseph-De-Riviere, FR)
Cpc classification
H05K1/0222
ELECTRICITY
International classification
H05K3/10
ELECTRICITY
H05K1/11
ELECTRICITY
Abstract
An electronic device disclosed herein includes a first conductor layer, a first nonconducting layer, and a second conductor layer in a stacked arrangement. A signal carrying conductive via is formed in the first nonconducting layer and extends between the first conductor layer and the second conductor layer. A shielding conductive via is formed in the first nonconducting layer, is not electrically coupled to the signal carrying conductive via, and substantially completely surrounds the signal carrying conductive via in spaced apart relation thereto.
Claims
1. An electronic device, comprising: a first conductor layer, a first nonconducting layer, and a second conductor layer in a stacked arrangement; a signal carrying conductive via formed in the first nonconducting layer and extending between the first conductor layer and the second conductor layer; a shielding conductive via formed in the first nonconducting layer, not electrically coupled to the signal carrying conductive via, and substantially completely surrounding the signal carrying conductive via in spaced apart relation thereto.
2. The electronic device of claim 1, wherein the shielding conductive via has a height no greater than a height of the signal carrying conductive via.
3. The electronic device of claim 1, further comprising a signal carrying conductive trace formed in the first conductor layer; wherein the signal carrying conductive via is electrically coupled to the signal carrying conductive trace; and wherein the shielding conductive via also substantially completely surrounds the signal carrying conductive trace in spaced apart relation thereto.
4. The electronic device of claim 1, further comprising a first signal carrying conductive trace formed in the first conductor layer, and a second signal carrying conductive trace formed in the second conductor layer; wherein the first and second signal carrying conductive traces are electrically coupled to the signal carrying conductive via; and wherein the shielding conductive substantially partially surrounds the first and second signal carrying conductive traces in spaced apart relation therefrom.
5. The electronic device of claim 1, wherein the shielding conductive via forms an arcuate shape about the signal carrying conductive via.
6. The electronic device of claim 1, wherein the shielding conductive via does not extend beyond the first and second conductor layers.
7. The electronic device of claim 1, wherein the shielding conductive via does not substantially completely surround conductive structures that are not directly electrically coupled to the signal carrying conductive via.
8. The electronic device of claim 1, wherein the shielding conductive via substantially completely surrounds only conductive structures that are directly electrically coupled to the signal carrying conductive trace.
9. The electronic device of claim 1, wherein the shielding conductive via is coupled to a ground node.
10. The electronic device of claim 1, wherein the shielding conductive via is electrically floating.
11. An electronic device, comprising: a first conductor layer, a first nonconducting layer, and a second conductor layer in a stacked arrangement; first and second signal carrying structures that are not directly electrically coupled; wherein the first signal carrying structure comprises: a first signal carrying conductive trace formed in the first conductor layer, a second signal carrying conductive trace formed in the second conductor layer, a first signal carrying conductive via formed in the first nonconducting layer and coupling the first and second signal carrying conductive traces; wherein the second signal carrying structure comprises; a third signal carrying conductive trace formed in a selected one of the first conductor layer and the second conductor layer, a second signal carrying conductive via formed in the first nonconducting layer to extend between the first and second conductor layers and being electrically coupled to the third signal carrying conductive trace, a shielding conductive structure substantially completely surrounding at least a portion of the first signal carrying structure and not the second signal carrying structure.
12. The electronic device of claim 11, wherein the shielding conductive structure comprises a shielding conductive via substantially completely surrounding the first signal carrying conductive via and not the first and second signal carrying conductive traces, the shielding conductive via not being electrically coupled to the first and second signal carrying structures.
13. The electronic device of claim 12, further comprising a second shielding conductive structure comprising a second shielding conductive via substantially completely surrounding the second signal carrying conductive via and not the second signal carrying conductive trace, the second shielding conductive via not being electrically coupled to the first and second signal carrying structures.
14. A method of making an electronic device, comprising: forming a signal via extending between first and second opposed sides of a printed circuit board layer; and forming a bar via that extends between the first and second surfaces, that is not electrically connected to the signal via, and that substantially completely surrounds the signal via to form an electromagnetic shell.
15. The method of claim 14, wherein the bar via is formed by removing a portion of the printed circuit board layer and plating conductive material into a void left by the removed portion of the printed circuit board layer.
16. The method of claim 14, wherein the bar via is formed by lithography and etching.
17. The method of claim 14, wherein the signal via comprises a first signal via; further comprising forming a second signal via extending between the first and second opposed sides of the printed circuit board layer, and forming a conductive trace on the printed circuit board layer that electrically connects the first signal via and the second signal via; wherein the bar via comprises a first bar via; and further comprising forming a second bar via that extends between the first and second surfaces, that is not electrically connected to the first signal via and the second signal via, that substantially completely surrounds the first signal via to form a first electromagnetic shell, and that substantially completely surrounds the second signal via to form a second electromagnetic shell.
18. The method of claim 17, wherein the first bar via and the second bar via are not formed so as to substantially completely surround the conductive trace.
19. The method of claim 14, further comprising forming a ground node to be coupled to the bar via.
20. The method of claim 14, further comprising leaving the bar via to electrically float.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION
[0017] In the following detailed description and the attached drawings and appendices, numerous specific details are set forth to provide a thorough understanding of the present disclosure. However, those skilled in the art will appreciate that the present disclosure may be practiced, in some instances, without such specific details. In other instances, well-known elements have been illustrated in schematic or block diagram form in order not to obscure the present disclosure in unnecessary detail. Additionally, for the most part, specific details, and the like, have been omitted inasmuch as such details are not considered necessary to obtain a complete understanding of the present disclosure, and are considered to be within the understanding of persons of ordinary skill in the relevant art.
[0018] With initial reference to
[0019] A top side view of the electronic device 100 is shown in
[0020] As is perhaps best understood with reference to both
[0021] As is best understood with referent to
[0022] It should be noted from the view of
[0023] The shielding conductive bar via 115 in the embodiment shown in
[0024] Although but one conductive trace 112 and but one shielding conductive bar via 115 are illustratively shown in
[0025] Of particular note is the fact that, as shown, the conductive bar via 115 serves to shield but one signal carrying structure (the vias 300 and 302 and the interconnecting conductive trace 112). Certain prior art shielding structures function so as to shield entire areas or swaths of their respective PCB's and serve to shield multiple signal carrying conductors. By shielding one signal carrying structure (or multiple signal carrying structures, but each shielded individually and not as a unit), the conductive bar via 115 taught herein allows for greater precision in shielding problem signals, and allows the shielding of multiple signal carrying structures from one another.
[0026] As is now described with additional reference to
[0027] In addition, as shown in
[0028] From the disclosures made herein, it should be apparent that the conductive shielding bar vias may take any suitable size and shape, and may be used to shield any individual signal or component. The conductive shielding bar vias may be formed by removing all or a portion of a nonconducting layer, such as with a laser, and then plating a conductive material, such as copper along the voids formed by the laser. The conductive shielding bar vias may also additionally or alternatively be formed photo lithographically.
[0029] Although vias 300 and 302, and shielding bar vias 115 and 304 have been depicted as fully filled conductive vias, this disclosure is not intended to be limited to this particular type of vias. Partially filled conductive vias could be used instead.
[0030] Although the preceding description has been described herein with reference to particular means, materials and embodiments, it is not intended to be limited to the particulars disclosed herein; rather, it extends to all functionally equivalent structures, methods, and uses, such as are within the scope of the appended claims.