USB power supply apparatus

Abstract

A USB power supply apparatus supplies electric power to a USB power reception apparatus. A bus line connects the output of the power supply circuit and the USB power reception apparatus. A switch is provided on a path of the bus line. A feedback circuit feedback controls the power supply circuit such that the output voltage V.sub.OUT of the power supply circuit approaches a reference voltage V.sub.REF. A controller adaptively controls the reference voltage V.sub.REF based on an electrical state of the USB power supply apparatus.

Claims

1. A USB power supply apparatus that conforms to the USB (Universal Serial Bus) specification, and that supplies electric power to a USB power reception apparatus, the USB power supply apparatus comprising: a power supply circuit; a bus line structured to connect an output of the power supply circuit and the USB power reception apparatus; a switch provided on a path of the bus line; a feedback circuit structured to feedback control the power supply circuit such that the output voltage of the power supply circuit approaches a reference voltage; and a controller structured to adaptively control the reference voltage based on an electrical state of the USB power supply apparatus; wherein the controller controls the reference voltage so as to reduce an amount of a drop in voltage from a predetermined setting voltage that occurs in a bus voltage at a position that is closer to the USB power reception apparatus side than the switch; wherein the controller comprises a bus voltage detection unit structured to detect the bus voltage, wherein the controller controls the reference voltage based on a detection result obtained by the bus voltage detection unit; wherein the bus voltage detection unit compares the bus voltage with a first threshold voltage determined to be lower than the setting voltage, and generates a low voltage detection signal which is asserted when the bus voltage becomes lower than the first threshold voltage; wherein, when the low voltage detection signal is asserted, the controller raises the reference voltage by a predetermined voltage increment; wherein the bus voltage detection unit compares the bus voltage with a second threshold voltage that is set to the setting voltage or otherwise a value in the vicinity of the setting voltage; wherein the bus voltage detection unit generates a voltage return signal that is asserted when the bus voltage exceeds the second threshold voltage; and wherein, when the voltage return signal is asserted, the controller lowers the reference voltage by a predetermined voltage decrement.

2. The USB power supply apparatus according to claim 1, wherein the reference voltage is configured as a voltage obtained by superimposing a correction voltage on the setting voltage, and wherein, when the low voltage detection signal is asserted, the controller raises the correction voltage by a predetermined voltage increment.

3. The USB power supply apparatus according to claim 1, wherein the reference voltage is configured as a voltage obtained by superimposing a correction voltage on the setting voltage, and wherein, when the voltage return signal is asserted, the controller reduces the correction voltage by a predetermined voltage decrement.

4. The USB power supply apparatus according to claim 1, wherein, when the voltage return signal remains in an asserted state for a predetermined judgment time, the controller lowers the reference voltage.

5. The USB power supply apparatus according to claim 1, wherein the controller further comprises a current detection unit structured to detect a supply current which is supplied to the USB power reception apparatus via the bus line, and wherein the controller controls the reference voltage based on a detection result obtained by the current detection unit in addition to the detection result obtained by the bus voltage detection unit.

6. The USB power supply apparatus according to claim 1, wherein the controller further comprises an output voltage detection unit structured to detect an output voltage of the power supply circuit, and wherein the controller controls the reference voltage based on a detection result obtained by the output voltage detection unit in addition to the detection result obtained by the bus voltage detection unit.

7. The USB power supply apparatus according to claim 1, wherein the controller comprises a current detection unit structured to detect a supply current supplied to the USB power reception apparatus via the bus line, and wherein the controller controls the reference voltage based on a detection result obtained by the current detection unit.

8. The USB power supply apparatus according to claim 7, wherein the reference voltage is configured as a voltage obtained by superimposing a correction voltage on a predetermined setting voltage, and wherein the controller adjusts the correction voltage so as to reduce an amount of a drop in voltage from a predetermined setting voltage that occurs in a bus voltage at a position that is closer than the USB power reception apparatus side than the switch.

9. The USB power supply apparatus according to claim 8, wherein the controller further comprises a communication unit structured to communicate with the USB power reception apparatus, and wherein the controller determines the setting voltage based on negotiation with the USB power reception apparatus.

10. The USB power supply apparatus according to claim 1, wherein the controller comprises a voltage drop detection unit structured to detect a difference between an output voltage of the power supply circuit and a bus voltage at a position that is closer to the USB power reception apparatus side than the switch, and wherein the controller controls the reference voltage based on a detection result obtained by the voltage drop detection unit.

11. The USB power supply apparatus according to claim 1, that conforms to the USB-PD (Power Delivery) specification, further comprising an inductor provided at a position that is closer to the USB power reception apparatus side than the switch, wherein the controller controls the reference voltage so as to reduce an amount of voltage drop from a predetermined setting voltage that occurs in a bus voltage at a position that is closer to the USB power reception apparatus side than the inductor.

12. The USB power supply apparatus according to claim 1, that conforms to the USB-PD (Universal Serial Bus-Power Delivery) specification or otherwise the USB Type-C specification.

13. An electronic device comprising the USB power reception apparatus according to claim 1.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Embodiments will now be described, by way of example only, with reference to the accompanying drawings which are meant to be exemplary, not limiting, and wherein like elements are numbered alike in several Figures, in which:

(2) FIG. 1 is a block diagram showing a USB host that conforms to the USB-PD specification investigated by the present inventors;

(3) FIG. 2 is a block diagram showing a USB power supply apparatus according to an embodiment;

(4) FIG. 3 is a circuit diagram showing an example configuration of a bus voltage detection unit;

(5) FIG. 4 is an operation waveform diagram showing the operation of the USB power supply apparatus shown in FIG. 2;

(6) FIG. 5 is a block diagram showing a USB power supply apparatus according to a first modification;

(7) FIG. 6 is a block diagram showing a USB power supply apparatus according to a second modification;

(8) FIG. 7 is a block diagram showing a USB power supply apparatus according to a fifth modification; and

(9) FIG. 8 is a perspective view of an electronic device including a USB power supply apparatus.

DETAILED DESCRIPTION OF THE INVENTION

(10) The invention will now be described based on preferred embodiments which do not intend to limit the scope of the present invention but exemplify the invention. All of the features and the combinations thereof described in the embodiment are not necessarily essential to the invention.

(11) In the present specification, the state represented by the phrase “the member A is connected to the member B” includes a state in which the member A is indirectly connected to the member B via another member that does not substantially affect the electric connection therebetween, or that does not damage the functions or effects of the connection therebetween, in addition to a state in which the member A is physically and directly connected to the member B.

(12) Similarly, the state represented by the phrase “the member C is provided between the member A and the member B” includes a state in which the member A is indirectly connected to the member C, or the member B is indirectly connected to the member C via another member that does not substantially affect the electric connection therebetween, or that does not damage the functions or effects of the connection therebetween, in addition to a state in which the member A is directly connected to the member C, or the member B is directly connected to the member C.

(13) FIG. 2 is a block diagram showing a USB power supply apparatus 100 according to an embodiment. The USB power supply apparatus 100 conforms to the USB-PD specification. Specifically, the USB power supply apparatus 100 may be configured as a USB host or a USB charger having a host function or otherwise no host function. Alternatively, the USB power supply apparatus 100 may be configured as a USB charger mounted on a dual role terminal of a host device. A USB power reception apparatus 200 that functions as a power supply destination is connected to a receptacle (which will also be referred to as the “USB port” or “USB plug”) via a USB cable 202. Typically, the USB power reception apparatus 200 is configured as a USB device. Also, the USB power reception apparatus 200 may be configured as a dual role terminal of a host device or may be configured as a terminal having a host function. In the drawing, only a VBUS line and a GND line are shown.

(14) A power supply circuit 102 generates a DC voltage V.sub.OUT to be supplied to a USB power reception apparatus 200. A feedback circuit 104 feedback controls the power supply circuit 102 such that the output voltage V.sub.OUT of the power supply circuit 102 approaches a reference voltage V.sub.REF. A capacitor C1 smooths the output voltage V.sub.OUT of the USB power supply apparatus 100.

(15) Specifically, the feedback circuit 104 amplifies the difference between the reference voltage V.sub.REF and a detection voltage V.sub.S that corresponds to the output voltage V.sub.OUT so as to generate a feedback signal V.sub.FB, and supplies the feedback signal V.sub.FB thus generated to the power supply circuit 102. The power supply circuit 102 receives the feedback signal V.sub.FB, and adjusts the output voltage V.sub.OUT such that the difference between the output voltage V.sub.OUT and the reference voltage V.sub.REF approaches zero. The configurations of the power supply circuit 102 and the feedback circuit 104 are not restricted in particular. For example, the power supply circuit 102 may be configured as a linear regulator, a step-up or otherwise step-down DC/DC converter, or an AC/DC converter. Also, the power supply circuit 102 may be configured as a combination of these.

(16) A bus line 106 connects the output of the power supply circuit 102 and the receptacle 108. A switch SW1 and an inductor L1 are provided on the bus line 106 path such that they are arranged in series. For example, the switch SW1 includes a pair of N-channel MOSFETs arranged such that they are opposite to each other. A capacitor C2 is connected to the bus line 106 in the vicinity of the receptacle 108, so as to smooth the bus voltage V.sub.BUS.

(17) The controller 110 integrally controls the overall operation of the USB power supply apparatus 100. The controller 110 has: (i) a function of communicating with the USB power reception apparatus 200 so as to determine the setting voltage V.sub.SET; (ii) a function of controlling the power supply circuit 102; and (iii) a function of controlling the on/off state of the switch SW1.

(18) The COM terminal of the controller 110 is coupled with the bus line 106 via a capacitor C3. A communication unit 113 receives a modulation voltage V.sub.MOD superimposed on the bus voltage V.sub.BUS, demodulates the modulation voltage V.sub.MOD, and outputs the demodulated signal to a logic unit 114. The logic unit 114 determines, based on negotiation with the USB power reception apparatus 200, the voltage level (setting voltage V.sub.SET) of the bus voltage V.sub.BUS to be supplied from the USB power supply apparatus 100 to the USB power reception apparatus 200.

(19) Furthermore, with the setting voltage V.sub.SET as a base voltage, the logic unit 114 included in the controller 110 adaptively controls the reference voltage V.sub.REF used in the feedback circuit 104 according to the electrical state of the USB power supply apparatus 100.

(20) The logic unit 114 controls the on/off state of the switch SW1 according to the electrical state of the USB power supply apparatus 100 or a predetermined sequence. A driver 116 controls the switch SW1 according to a control signal S3 generated by the logic unit 114. For example, the driver 116 includes a charge pump circuit. When an instruction is received to turn on the switch SW1, the driver 116 generates a high-level voltage that is higher than V.sub.OUT, and supplies the high-level voltage thus generated to the gate of the switch SW1.

(21) An OCP (overcurrent protection) circuit 118 detects the supply current I.sub.SUPPLY, and compares the supply current I.sub.SUPPLY thus detected with an overcurrent threshold value I.sub.OCP so as to detect an overcurrent state. When such an overcurrent state is detected, the logic unit 114 switches the switch SW1 to the off state. In addition, the controller 110 may include an OVP (overvoltage protection) circuit or the like. When an overvoltage state is detected, the logic unit 114 may switch the switch SW1 to the off state.

(22) Also, the controller 110 may include a discharge circuit that discharges the charge stored in the output capacitors C1 and C2. Also, the logic unit 114 may control the discharge circuit. It should be noted that the present invention does not relate to such functions, and accordingly, description thereof will be omitted.

(23) Next, description will be made regarding the control operation for the reference voltage V.sub.REF. Specifically, the controller 110 controls the reference voltage V.sub.REF such that a voltage drop that occurs in the bus voltage V.sub.BUS from the setting voltage V.sub.SET becomes small. The bus voltage V.sub.BUS is monitored at a position that is closer to the USB power reception apparatus 200 side than the switch SW1. Preferably, the bus voltage V.sub.BUS is monitored in the vicinity of the receptacle 108.

(24) The controller 110 includes a bus voltage detection unit 112 that detects the bus voltage V.sub.BUS. The logic unit 114 included in the controller 110 controls the reference voltage V.sub.REF based on the detection result obtained by the bus voltage detection unit 112.

(25) FIG. 3 is a circuit diagram showing an example configuration of the bus voltage detection unit 112. The bus voltage detection unit 112 compares the bus voltage V.sub.BUS with a first threshold voltage V.sub.TH1 set to a value that is lower than the setting voltage V.sub.SET. The bus voltage detection unit 112 generates a low voltage detection signal S1 which is asserted (set to high level, for example) when the bus voltage V.sub.BUS becomes lower than the first threshold voltage V.sub.TH1. Such a function is provided by a first comparator 120. The first threshold voltage V.sub.TH1 is preferably set to the bus voltage V.sub.BUS lower limit voltage prescribed by the specification, or otherwise a value that is slightly higher than the lower limit voltage.

(26) Furthermore, the bus voltage detection unit 112 compares the bus voltage V.sub.BUS with a second threshold voltage V.sub.TH2 set to the setting voltage V.sub.SET or otherwise a value defined in the vicinity of the setting voltage V.sub.SET. The bus voltage detection unit 112 generates a voltage return signal S2 which is asserted (set to high level, for example) when the bus voltage V.sub.BUS exceeds the second threshold voltage V.sub.TH2. This function is provided by a second comparator 122. It should be noted that the first comparator 120 and the second comparator 122 are each configured as an analog voltage comparator. Also, after the bus voltage V.sub.BUS is converted into a digital value by means of an A/D converter, the output of the A/D converter may be compared with a digital value that corresponds to the threshold voltage.

(27) Returning to FIG. 2, when the low voltage detection signal S1 is asserted, the logic unit 114 raises the reference voltage V.sub.REF by a predetermined voltage increment ΔV1. Conversely, when the voltage return signal S2 is asserted, the logic unit 114 lowers the reference voltage V.sub.REF by a predetermined voltage decrement ΔV2. It should be noted that the voltage increment ΔV1 may be the same as the voltage decrement ΔV2. Also, the voltage increment ΔV1 may be larger than the voltage decrement ΔV2.

(28) The logic unit 114 may control the reference voltage V.sub.REF in the form of a voltage obtained by superimposing a correction voltage V.sub.CMP on the setting voltage V.sub.SET.
V.sub.REF=V.sub.SET+V.sub.CMP,

(29) The initial value of the correction voltage V.sub.CMP is set to zero. When a voltage drop that occurs at the switch SW1, the inductor L1, or an unshown current detection resistor becomes larger, and the bus voltage V.sub.BUS becomes lower than the first threshold voltage V.sub.TH1, i.e., when the low voltage detection signal S1 is asserted, the logic unit 114 may raise the correction voltage V.sub.CMP. Conversely, when a voltage drop that occurs at the switch SW1 or the inductor L1 becomes smaller, the bus voltage V.sub.BUS returns to a normal voltage level (second threshold voltage V.sub.TH2), i.e., when the voltage return signal S2 is asserted, the logic unit 114 may reduce the correction voltage V.sub.CMP. The correction voltage V.sub.CMP may be changed in a range that is equal to or greater than zero. Also, the range in which the correction voltage V.sub.CMP is to be changed may include negative values.

(30) It should be noted that the logic unit 114 preferably raises the reference voltage V.sub.REF immediately after the low voltage detection signal S1 is asserted. In contrast, the logic unit 114 preferably lowers the reference voltage V.sub.REF after the voltage return signal S2 is continuously asserted for a predetermined judgment time τ.sub.REC.

(31) The above is the configuration of the USB power supply apparatus 100. Next, description will be made regarding the operation thereof.

(32) FIG. 4 is an operation waveform diagram showing the operation of the USB power supply apparatus 100 shown in FIG. 2. It is needless to say that the switch SW1 is turned on. Before the time point t0, the supply current I.sub.SUPPLY is zero. In this stage, the reference voltage V.sub.REF is equal to the setting voltage V.sub.SET configured as an initial value. It should be noted that description will be made below assuming that there is no response delay between the power supply circuit 102 and the feedback circuit 104. That is to say, the reference voltage V.sub.REF and the output voltage V.sub.OUT of the power supply circuit 102 are represented by the same waveform.

(33) Before the time point t0, the supply current I.sub.SUPPLY is zero. Accordingly, the voltage drop V.sub.DROP that occurs between the output of the power supply circuit 102 and the receptacle 118 is substantially zero. That is to say, the relation V.sub.BUS=V.sub.OUT holds true. In the initial state, the relation V.sub.OUT=V.sub.REF=V.sub.SET holds true. Thus, the bus voltage V.sub.BUS is equal to the setting voltage V.sub.SET.

(34) At the time point t0, the supply current I.sub.SUPPLY is raised. The voltage drop V.sub.DROP rises according to an increase in the supply current I.sub.SUPPLY, and accordingly, the bus voltage V.sub.BUS drops. When the bus voltage V.sub.BUS becomes lower than the first threshold voltage V.sub.TH1 at the time point t1, the low voltage detection signal S1 is asserted. According to the assertion of this signal, the reference voltage V.sub.REF is raised by ΔV1, which raises the output voltage V.sub.OUT. Furthermore, the bus voltage V.sub.BUS is shifted toward the high voltage side by ΔV1, and accordingly, the bus voltage V.sub.BUS is returned to a level that is higher than the first threshold voltage V.sub.TH1.

(35) If the bus voltage V.sub.BUS still remains lower than the first threshold voltage V.sub.TH1 after the reference voltage V.sub.REF is shifted once toward the high voltage side, the reference voltage V.sub.REF may be shifted once again or may be shifted multiple times in increments of ΔV1 until the low voltage detection signal S1 is negated.

(36) At the time point t2, the supply current I.sub.SUPPLY transiently drops during a short period of time due to variation in the load. This temporarily reduces the voltage drop V.sub.DROP. In this state, the bus voltage V.sub.BUS rises and exceeds the second threshold voltage V.sub.TH2, which asserts the voltage return signal S2. However, the time during which the voltage return signal S2 is asserted is shorter than the judgment time τ.sub.REC. Accordingly, the reference voltage V.sub.REF is maintained at the same level.

(37) After the time point t3, the supply current I.sub.SUPPLY drops so as to steadily remain at a low level. This reduces the voltage drop V.sub.DROP. In this state, the bus voltage V.sub.BUS rises and exceeds the setting voltage V.sub.SET. In this stage, the bus voltage V.sub.BUS exceeds the second threshold voltage V.sub.TH2, and accordingly, the voltage return signal S2 is asserted. When the time during which the voltage return signal S2 is asserted is longer than the judgment time τ.sub.REC, the reference voltage V.sub.REF is shifted toward the low voltage side by ΔV2.

(38) Accordingly, the bus voltage V.sub.BUS is returned to a value in the vicinity of the setting voltage V.sub.SET.

(39) The above is the operation of the USB power supply apparatus 100.

(40) With the USB power supply apparatus 100, by adaptively controlling the reference voltage V.sub.REF, such an arrangement is capable of preventing the bus voltage V.sub.BUS from being lower than the lower limit value prescribed by the specification. Thus, such an arrangement provides the USB power supply apparatus 100 with improved load regulation.

(41) In particular, with the embodiment shown in FIG. 2, the bus voltage V.sub.BUS at a position in the vicinity of the receptacle 108 is directly monitored. Furthermore, the reference voltage V.sub.REF is controlled according to the bus voltage V.sub.BUS thus monitored. Such an arrangement is capable of detecting a drop in the bus voltage V.sub.BUS in a sure manner. Thus, the reference voltage V.sub.REF can be adjusted according to the drop in the bus voltage V.sub.BUS thus detected.

(42) Furthermore, the reference voltage V.sub.REF is controlled based on the result of the comparison between the bus voltage V.sub.BUS and the first threshold voltage V.sub.TH1. Thus, such an arrangement is capable of preventing the bus voltage V.sub.BUS from dropping lower than the first threshold voltage V.sub.TH1. In other words, the allowed drop in the bus voltage V.sub.BUS can be set by setting the first threshold voltage V.sub.TH1.

(43) Furthermore, the reference voltage V.sub.REF is generated by superimposing the correction voltage V.sub.CMP on the setting voltage V.sub.SET. The reference voltage V.sub.REF is adjusted by adjusting the correction voltage V.sub.CMP. With such an arrangement, when the voltage drop V.sub.DROP that occurs in the switch or the bus line becomes small, the correction voltage V.sub.CMP is set to zero such that the bus voltage V.sub.BUS approaches the setting voltage V.sub.SET. Conversely, when the voltage drop V.sub.DROP becomes large, the correction voltage V.sub.CMP is raised such that the bus voltage V.sub.BUS approaches the setting voltage V.sub.SET.

(44) Furthermore, when the bus voltage V.sub.BUS exceeds the second threshold voltage V.sub.TH2, the reference voltage V.sub.REF is lowered. Thus, such an arrangement is capable of preventing the bus voltage V.sub.BUS from continuing in a state in which it exceeds the second threshold voltage V.sub.TH2. Moreover, by providing the judgment time τ.sub.REC, such an arrangement prevents the system from becoming unstable due to transient load variation such as an event at the time point t2 shown in FIG. 4.

(45) The aforementioned effects provided by the USB power supply apparatus 100 are obtained regardless of the setting value of the setting voltage V.sub.SET. Also, at least one of the parameters that is used (specifically, the first threshold voltage V.sub.TH1, second threshold voltage V.sub.TH2, judgment time τ.sub.REC, voltage increment ΔV1, voltage decrement Δ2, etc.) may be adjusted according to the setting voltage V.sub.SET.

(46) Description has been made regarding the present invention with reference to the embodiment. The above-described embodiment has been described for exemplary purposes only, and is by no means intended to be interpreted restrictively. Rather, it can be readily conceived by those skilled in this art that various modifications may be made by making various combinations of the aforementioned components or processes, which are also encompassed in the technical scope of the present invention. Description will be made below regarding such modifications.

(47) [First Modification]

(48) FIG. 5 is a block diagram showing a USB power supply apparatus 100a according to a first modification. Description will be omitted regarding the same configuration as that shown in FIG. 2. Only the points of difference will be described. In the USB power supply apparatus 100a shown in FIG. 5, a controller 100a further includes a current detection unit 130.

(49) The current detection unit 130 detects the supply current I.sub.SUPPLY. The controller 110a controls the reference voltage V.sub.REF based on the detection result obtained by the current detection unit 130, in addition to the detection result obtained by the bus voltage detection unit 112. The current detection unit 130 may detect a current at a position that is closer to the power supply circuit 102 side than the switch SW1. Also, the current detection unit 130 may detect a current at a position that is closer to the receptacle 108 side than the switch SW1. A current detection signal S4 generated by the current detection unit 130 may be a signal that represents the result of comparing the supply current I.sub.SUPPLY with a predetermined threshold value. Also, the current detection signal S4 may be configured as a digital value obtained by quantizing the supply current I.sub.SUPPLY.

(50) The smoothing capacitor C2 connected to the bus line 106 has a large capacitance. Accordingly, a delay occurs from the time point at which the supply current I.sub.SUPPLY changes to the time point at which the bus voltage V.sub.BUS changes. In order to solve such a problem, the logic unit 114 estimates a change in the bus voltage V.sub.BUS based on the detection result S4 with respect to the supply current I.sub.SUPPLY, so as to adjust the reference voltage V.sub.REF. In other words, the logic unit 114 feedforward controls the reference voltage V.sub.REF according to the supply current I.sub.SUPPLY. Such an arrangement is capable of adjusting the reference voltage V.sub.REF based on the prediction before the bus voltage V.sub.BUS actually changes. Thus, such an arrangement provides improved responsiveness, thereby suppressing fluctuation in the bus voltage V.sub.BUS with higher efficiency.

(51) In other words, it can be said that fluctuation in the bus voltage V.sub.BUS in a long time scale is suppressed based on the detection result obtained by the bus voltage detection unit 112. In contrast, fluctuation in the bus voltage V.sub.BUS in a short time scale is suppressed based on the detection result obtained by the current detection unit 130.

(52) For example, the current detection unit 130 and the logic unit 114 may detect a change in the supply current I.sub.SUPPLY for a predetermined unit of time, and may adjust the reference voltage V.sub.REF according to the detection result. Also, the current detection unit 130 may sample the sampling current I.sub.SUPPLY. In this case, the unit of time may be configured as a sampling period. For example, when an increase in the supply current I.sub.SUPPLY measured for the unit of time exceeds a predetermined threshold value, the logic unit 114 may raise the reference voltage V.sub.REF by a voltage increment ΔV3. Alternatively, the logic unit 114 may change the voltage increment ΔV3 according to an increase in the supply current I.sub.SUPPLY that occurs for every unit of time.

(53) Also, the logic unit 114 may change the reference voltage V.sub.REF according to the waveform of the supply current I.sub.SUPPLY. A part of a circuit configuration of the current detection unit 130 may be shared with the OCP circuit 118. It should be noted that the current detection method employed in the current detection unit 130 or the OCP circuit 118 is not restricted in particular.

(54) [Second Modification]

(55) FIG. 6 is a block diagram showing a USB power supply apparatus 100b according to a second modification. In the USB power supply apparatus 100b shown in FIG. 5, a controller 110b further includes an output voltage detection unit 132. The output voltage detection unit 132 detects the output voltage V.sub.OUT of the power supply circuit 102. The logic unit 114 controls the reference voltage V.sub.REF based on the detection result obtained by the output voltage detection unit 132, in addition to the detection results (S1 and S2) obtained by the bus voltage detection unit 112. A voltage detection signal S5 generated by the output voltage detection unit 132 may be a signal that represents the result of a comparison of the output voltage V.sub.OUT of the power supply circuit 102 with a predetermined threshold value. Also, the voltage detection signal S5 may be configured as a digital value obtained by quantizing the output voltage V.sub.OUT.

(56) A combination of the bus voltage detection unit 112 and the output voltage detection unit 132 can be regarded as a voltage drop detection unit that detects the difference V.sub.DROP between the output voltage V.sub.OUT of the power supply circuit 102 and the bus voltage V. By measuring the voltage difference V.sub.DROP between the output voltage V.sub.OUT of the power supply circuit 102 and the bus voltage V.sub.BUS, and by adjusting the reference voltage V.sub.REF according to the voltage drop V.sub.DROP thus measured, such an arrangement is capable of controlling the bus voltage V.sub.BUS such that it approaches the setting voltage V.sub.SET.

(57) Furthermore, the measurement result of the output voltage V.sub.OUT is effectively used in an operation for a case in which the output voltage V.sub.OUT becomes lower than the reference voltage V.sub.REF due to the output impedance of the power supply circuit 102. In this case, the voltage difference between V.sub.OUT and V.sub.REF may be calculated, and the reference voltage V.sub.REF may be changed according to the voltage difference thus calculated. Such an arrangement is capable of canceling out the effects of the output impedance of the power supply circuit 102. It should be noted that the output voltage detection unit 132 may be provided as an additional component to the USB power supply apparatus 100a shown in FIG. 5.

(58) [Third Modification]

(59) Description has been made with reference to FIG. 5 regarding the USB power supply apparatus 100a employing both the bus voltage detection unit 112 and the current detection unit 130. Also, the bus voltage detection unit 112 may be omitted. In this case, the reference voltage V.sub.REF may be controlled according to the detection result S4 obtained by the current detection unit 130 alone. In a case in which the impedances of the switch SW1 and the inductor L1 are known, the information with respect to the impedances may be stored in the logic unit 114. With such an arrangement, the logic unit 114 may calculate the voltage drop V.sub.DROP by multiplying the measurement value of the supply current I.sub.SUPPLY by the impedance thus stored, and may set the reference voltage V.sub.REF based on the voltage drop V.sub.DROP thus calculated.

(60) [Fourth Modification]

(61) Description will be made with reference to FIG. 6 regarding the USB power supply apparatus 100b employing a combination of the bus voltage detection unit 112 and the output voltage detection unit 132. Also, an arrangement may be made employing a combination of the current detection unit 130 and the output voltage detection unit 132.

(62) [Fifth Modification]

(63) Description has been made in the embodiment regarding the USB power supply apparatus 100 that conforms to the USB-PD specification. Also, the present invention is applicable to an arrangement that conforms to the USB Type-C specification. FIG. 7 is a block diagram showing a USB power supply apparatus 100c according to a fifth modification. With the USB Type-C specification, a controller 110c and the power supply reception apparatus 200 communicate with each other via a dedicated line 204. That is to say, the modulation voltage V.sub.MOD is not superimposed on the bus voltage V.sub.BUS. Thus, such an arrangement does not require the capacitor C3 shown in FIG. 2. Also, the inductor L1 may be omitted. The other configuration is the same as that shown in FIG. 2.

(64) [Usage]

(65) Lastly, description will be made regarding the usage of the USB power supply apparatus 100. FIG. 8 is a perspective view of an electronic device 300 including the USB power supply apparatus 100. The electronic device 300 is configured as a TV, a liquid crystal display, a laptop computer, or the like.

(66) The electronic device 300 includes a casing 302, a display panel 304, and the aforementioned USB power supply apparatus 100. The power supply circuit 102 included in the USB power supply apparatus 100 is configured as an AC/DC converter. The power supply circuit 102 converts an AC voltage V.sub.AC into a DC voltage V.sub.OUT. The setting voltage V.sub.SET for the DC voltage V.sub.OUT is selected by the controller 110. The receptacle 108 is provided on a front face or otherwise a back face of the casing 302, which allows the USB cable 202 to be inserted into the receptacle 108.

(67) It should be noted that the electronic device 300 may be configured as a cellular phone terminal, a tablet terminal, a digital still camera, a digital video camera, or the like.

(68) While the preferred embodiments of the present invention have been described using specific terms, such description is for illustrative purposes only, and it is to be understood that changes and variations may be made without departing from the spirit or scope of the appended claims.