PHOTONIC CRYSTAL ALL-OPTICAL OR-TRANSFORMATION LOGIC GATE

Abstract

A photonic crystal (PhC) all-optical OR-transformation logic gate, which comprises an optical-switch unit (OSU), a PhC-structure unit, a reference light, a wave-absorbing load (WAL) and a D-type flip-flop (DFF) unit; two system-signal-input ports are respectively connected with a first logic-signal X.sub.1 and a second logic-signal X.sub.2; the reference light is connected with the reference-light-input port of the OSU; three intermediate-signal-output ports are respectively connected with two intermediate-signal-input ports of the PhC-structure unit and the WAL; a clock-signal CP through the input port of a two-branch waveguide are respectively connected with a first clock-signal CP input port of the OSU and a second clock-signal-CP-input port of the DFF unit; the signal-output port of the PhC-structure unit is connected with the D-signal-input port of the DFF unit. The structure of the present invention is compact in structure, strong in anti-interference capability and ease of integration with other optical-logic elements.

Claims

1. A PhC all-optical OR-transformation logic gate, wherein said PhC all-optical OR-transformation logic gate comprises: an OSU, a PhC-structure unit, a reference light, a WAL and a DFF unit; two system-signal-input ports are respectively connected with a first logic-signal X.sub.1 and a second logic-signal X.sub.2; said reference light is connected with the reference-light-input port of said OSU; three intermediate-signal-output ports are respectively connected with two intermediate-signal input ports of the PhC-structure unit and the WAL; a clock-signal CP through the input port of a two-branch waveguide are respectively connected with a first clock-signal--CP-input port of said OSU and a second clock-signal-CP-input port of said DFF unit; the signal-output port of said PhC-structure unit is connected with the D-signal-input port of said DFF unit.

2. The PhC all-optical OR-transformation logic gate as claimed in claim 1, wherein said OSU is a 3×3 optical gating switch; said OSU comprises a first clock-signal-CP-input port, two system signal-output ports, a reference-light-input port and three intermediate-signal-output ports; said two system-signal-output ports are respectively the first logic-signal-input port and the second logic-signal-input port; said three intermediate-signal-output ports are respectively the first intermediate-signal-output port, the second intermediate-signal-output port and the third intermediate-signal-output port.

3. The PhC all-optical OR-transformation logic gate as claimed in claim 1, wherein said PhC-structure unit is a 2D-PhC cross-waveguide nonlinear cavity; said PhC-structure unit is a 2D-PhC cross-waveguide four-port network formed by high-refractive-index dielectric pillars, a left port of the four-port network is the first intermediate-signal-input port, a lower port is the second intermediate-signal-input port, an upper port is the signal-output port, and a right port is an idle port; two mutually-orthogonal quasi-1D PhC structures are placed in two waveguide directions crossed at a center of a cross waveguide, a dielectric pillar is arranged in the middle of the cross waveguide, a dielectric pillar is made of a nonlinear material, a cross section of said dielectric pillar is square, polygonal, circular or oval; the dielectric constant of a rectangular linear pillar clinging to the central nonlinear pillar and close to the signal-output port is equal to that of the central nonlinear pillar under low-light-power conditions; and said quasi-1D PhC structures and the dielectric pillar constitute a waveguide defect cavity.

4. The PhC all-optical OR-transformation logic gate as claimed in claim 1, wherein said DFF unit includes a clock-signal input port, and a D-signal-input port and a system output port; the input signal of the D-signal-input port of said DFF unit is equal to the output signal of the output port of said PhC-structure unit.

5. The PhC all-optical OR-transformation logic gate as claimed in claim 3, wherein said 2D PhC is a (2k+1)×(2k+1) array structure, where k is an integer more than or equal to 3.

6. The PhC all-optical OR-transformation logic gate as claimed in claim 3, wherein said cross section of said high-refractive-index dielectric pillar of the 2D PhC is circular, oval, triangular or polygonal.

7. The PhC all-optical OR-transformation logic gate as claimed in claim 3, wherein a background filling material for the 2D PhC is air or a different low-refractive-index medium with the refractive index less than 1.4.

8. The PhC all-optical OR-transformation logic gate as claimed in claim 3, wherein said refractive index of said dielectric pillar in the quasi-1D PhC of said cross waveguide is 3.4 or a different value more than 2, the cross section of the dielectric pillar is rectangular, polygonal, circular or oval.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0022] FIG. 1 is a structural schematic diagram of a PhC all-optical OR-transformation logic gate of the present invention;

[0023] In FIG. 1, the indications are: OSU 01, first logic-signal-input port 11, second logic-signal-input port 12, reference-light-input port 13, first intermediate-signal-output port 14, second intermediate-signal-output port 15, third intermediate-signal-output port 16, first clock-signal-input port, PhC-structure unit 02, first intermediate-signal-input port 21, second intermediate-signal-input port 22, idle port 23, signal-output port 24, circular high-refractive-index linear-dielectric pillar 25, first rectangular high-refractive-index linear-dielectric pillar 26, second rectangular high-refractive-index linear-dielectric pillar 27, nonlinear-dielectric pillar 28, first logic-signal X.sub.1, second logic-signal X.sub.2, reference-light 03, reference-light E, WAL 04, DFF unit 05, second clock-signal-input port 51, D-signal-input port 52, and system-output port 53.

[0024] FIG. 2 is a waveform diagram of the basic logic functions of a PhC-structure unit shown in FIG. 1 for the lattice constant d of 1 μm and the operating wavelength of 2.976 μm;

[0025] FIG. 3 is a waveform diagram of two logic-signal all-optical OR-transformation logic function of the present invention for the lattice constant d of 0.5208 μm and the operating wavelength of 1.55 μm; and

[0026] FIG. 4 is a truth table of the logic functions of a 2D-PhC cross-waveguide nonlinear cavity shown in FIG. 1.

[0027] The present invention is more specifically described in the following paragraphs by reference to the drawings attached only by way of example.

DETAILED DESCRIPTION OF THE EMBODIMENTS

[0028] The terms a or an, as used herein, are defined as one or more than one, the term plurality, as used herein, is defined as two or more than two, and the term another, as used herein, is defined as at least a second or more.

[0029] As shown in FIG. 1, the PhC all-optical OR-transformation logic gate of the present invention comprises an OSU 01, a PhC-structure unit 02, a reference-light source 03, a WAL 04 and a DFF unit 05; the OSU 01 is a 3×3 optical-selector switch controlled by a clock-signal CP, used for controlling and selecting a logic signal for outputting, the clock-signal CP controls three input port signals for selective output as the logic input of next stage of PhC-structure unit 02; and the OSU comprises a first clock-signal-CP-input port, two system-signal-input ports, a reference-light-input port and three intermediate-signal-output ports; and two system-signal-input ports are respectively a first logic-signal-input port and a second logic-signal-input port; and three intermediate-signal-output ports are respectively a first intermediate-signal-output port, a second intermediate-signal-output port and a third intermediate-signal-output port; the first logic-signal-input port 11, the second logic-signal-input port 12 and the reference-light input 13 of the OSU 01 are respectively input from the first logic-signal X.sub.1, the Second logic-signal X.sub.2 and the reference-light E; first logic-signal X.sub.1 is connected with the first logic-signal-input port 11 of the OSU 01, and second logic-signal X.sub.2 is connected with the second logic-signal-input port 12 of the OSU 01; reference-light E output by the reference-light source 03 is connected with the reference-light-input port 13 of the optical-selector switch, and the reference-light E output by the reference-light is 1; the first intermediate-signal-input port 21 of the PhC-structure unit 02 is connected with the first intermediate-signal-output port 14 of the OSU 01, the second intermediate-signal-input port 22 of the PhC-structure unit 02 is connected with the second intermediate-signal-output port 15 of the OSU 01 and the three intermediate-signal-output port 16 of the OSU 01 is connected with the WAL 04. the WAL is used for absorbing light wave entering it; the DFF unit 05 comprises a clock-signal-input port, a D-signal-input port and a system-output port; a clock-signal CP is input through the input port of a two-branch waveguide, one port of the two-branch waveguide is connected with the first clock-signal-CP-input port of the OSU 01, and another port of the two-branch waveguide is connected with the second clock-signal-input port 51 of the DFF unit 05; the D-signal-input port 52 of the DFF unit 05 is connected with the signal-output port 24 of the PhC-structure unit 02, i.e., the input-signal of the D-signal-input port 52 of the DFF unit 05 is equal to the output signal of the output port of the PhC-structure unit; the DFF unit 05 takes the output signal at the output port of the PhC-structural unit 02 for an input-signal D; the system-signal-output port 53 of the DFF unit 05 is the system-output port of the PhC all-optical OR-transformation logic gate of the present invention; the PhC-structure unit 02 is a 2D-PhC cross-waveguide nonlinear cavity and is arranged behind the OSU, the background filling material for the 2D PhC is air or a different low-refractive-index medium with a refractive index less than 1.4; the cross section of the high-refractive-index dielectric pillar of the 2D PhC is circular, oval, triangular or polygonal, and the cross section of the high-refractive-index dielectric pillar of the 2D PhC is circular, oval, triangular or polygonal; the 2D-PhC cross-waveguide nonlinear cavity is a 2D-PhC cross-waveguide four-port network formed by high-refractive-index dielectric pillars, the four-port network has a four-port PhC structure, the left port is a first intermediate-signal-input port, the lower port is a second intermediate-signal-input port, the upper port is a signal-output port, and the right port is an idle port; two mutually-orthogonal quasi-1D PhC structures are placed in two waveguide directions crossed at the center of a cross-waveguide, the cross section of the dielectric pillar in the quasi-1D PhC is rectangular, polygonal, circular or oval, and the refractive index of the dielectric pillar is 3.4 or a different value more than 2; the dielectric pillar is arranged in the middle of the cross-waveguide, the dielectric pillar is made of a nonlinear material, the cross section of the dielectric pillar is square, polygonal, circular or oval, and the quasi-1D PhC structures and the dielectric pillar constitute a waveguide defect cavity. The lattice constant of the 2D-PhC array is d, and the array number is 11×11; the circular high-refractive-index linear-dielectric pillar 25 is made of a silicon (Si) material, and has a refractive index of 3.4 and a radius of 0.18d; the first rectangular high-refractive-index linear-dielectric pillar 26 has a refractive index of 3.4, long sides of 0.613d and short sides of 0.162d; the second rectangular high-refractive-index linear-dielectric pillar 27 has a dielectric constant being the same as that of a nonlinear dielectric under low-light-power conditions, and has a dimension equal to that of the first rectangular high-refractive-index linear-dielectric pillar 26; and the central square nonlinear-dielectric pillar 28 is made of a Kerr type nonlinear material, and has a side length of 1.5d, a dielectric constant of 7.9 under low-light-power conditions and a third-order nonlinear coefficient of 1.33×10.sup.−2 μm.sup.2/V.sup.2. Twelve rectangular high-refractive-index linear-dielectric pillars and one square nonlinear-dielectric pillar are arranged in the center of the 2D PhC cross-waveguide nonlinear cavity in the form of a quasi-1D PhC along longitudinal and transverse waveguide directions, the central nonlinear-dielectric pillar clings to the four adjacent rectangular linear-dielectric pillars and the distance there between is 0, every two adjacent rectangular linear-dielectric pillars are spaced 0.2668d from each other, and the dielectric constant of a rectangular linear pillar clinging to the central nonlinear pillar and close to the signal-output port is equal to that of the central nonlinear pillar under low-light-power conditions.

[0030] The present invention can realize an OR-transformation logic gate function of all-optical-logic signals under the cooperation of unit devices such as the optical switch, based on the photonic band gap (PBG) characteristic, quasi-1D PhC defect state, tunneling effect and optical Kerr nonlinear effect of the 2D-PhC cross-waveguide nonlinear cavity shown by PhC-structure unit 02 in FIG. 1. Introduced first is the basic principle of the PhC nonlinear cavity in the present invention: a 2D PhC provides a PBG with certain bandwidth, a light wave with its wavelength falling into this bandgap can be propagated in an optical path designed inside the PhC, and the operating wavelength of the device is thus set to certain wavelength in the PBG; the quasi-1D PhC structure arranged in the center of the cross-waveguide and the nonlinear effect of the central nonlinear-dielectric pillar together provide a defect state mode, which, as the input light wave reaches a certain light intensity, shifts to the operating frequency of the system, so that the structure produces the tunneling effect and signals are output from the output port 24.

[0031] For the lattice constant d of 1 μm and the operating wavelength of 2.976 μm, referring to the 2D PhC cross-waveguide nonlinear cavity shown by PhC-structure unit 02 of FIG. 1, and for a signal A input from the port 21 and a signal B input from the port 22 as shown by the upper two diagrams in FIG. 2, a logic-output waveform at the signal-output port 24 of the 2D PhC cross-waveguide nonlinear cavity of the present invention can be obtained, as illustrated by the lower diagram of signal waveform in FIG. 2. A logic operation truth table shown in FIG. 4 can be obtained according to the logic operation characteristic shown in FIG. 2. In FIG. 4, C is the output at the output port 24 of the PhC-structure unit 02 current state Q.sup.n, and Y is signal output of the output port 24 of the PhC-structure unit 02—the next state Q.sup.n+1. A logic expression of the PhC structure can be obtained according to the truth table:

Y=AB+BC  (1)

That is

[0032]
Q.sup.n+1=AB+BQ.sup.n  (2)

[0033] According to the basic logic operation characteristic of the above 2D PhC cross-waveguide nonlinear cavity, the logic output at the previous step serves as a logic input to the structure itself to realize logic functions.

[0034] Referring to FIG. 1, for CP=0, the optical-selector switch turns the input-signal X.sub.1 at the logic-signal-input port 11 to the second intermediate-signal-output port 15 of the optical-selector switch, and the input-signal-X.sub.1 is further projected to the second intermediate-signal-input port 22 of the PhC-structure unit 02, i.e., the input signal at the second intermediate-signal-input port 22 of the PhC-structure unit 02 is equal to the input-signal-X.sub.1 at the first logic-signal-input port 11; simultaneously, the optical-selector switch turns the reference-light E at the reference-light-input port 13 to the first intermediate-signal-output port 14 of the optical-selector switch, and the reference-light E is further projected to the first intermediate-signal-input port 21 of the PhC-structure unit 02, i.e., the input signal at the first intermediate-signal-input port 21 of the PhC-structure unit 02 is equal to the reference-light E at the reference-light-input port 13; and simultaneously, the optical-selector switch turns the logic-signal X.sub.2 at the second logic-signal-input port 12 to the third intermediate-signal-output port 16 of the optical-selector switch, and the logic-signal X.sub.2 is further projected to the WAL 04.

[0035] For CP=1, the optical-selector switch turns the input-signal X.sub.1 at the first logic-signal-input port 11 to the third intermediate-signal-output port 16 of the optical-selector switch, and the input-signal X.sub.1 is further projected to the WAL 04; simultaneously, the optical-selector switch turns the logic-signal X.sub.2 at the second logic-signal-input port 12 to the first intermediate-signal-output port 14 of the optical-selector switch, and the logic-signal X.sub.2 is projected to the first intermediate-signal-input port 21 of the PhC-structure unit 02, i.e., the input signal at the first intermediate-signal-input port 21 of the PhC-structure unit 02 is equal to the logic-signal X.sub.2 at the second logic-signal-input port 12; and simultaneously, the optical-selector switch turns the reference-light E at the reference-light-input port 13 to the second intermediate-signal-output port 15 of the optical-selector switch, and the reference-light E is further projected to the second intermediate-signal-input port 22 of the PhC-structure unit 02, i.e., the input signal at the second intermediate-signal-input port 22 of the PhC-structure unit 02 is equal to the reference-light E at the reference-light-input port 13.

[0036] With the cooperation described above, the OR transformation logic function of all-optical-logic signals can be realized.

[0037] The 2D PhC structure of the device in the present invention can be of a (2k+1)×(2k+1) array structure, where k is an integer more than or equal to 3. Design and simulation results will be provided below in an embodiment given in combination with the accompanying drawings, wherein the embodiment is exemplified by an 11×11 array structure and a lattice constant d of 0.5208 μm.

In formula (5), suppose A=1, leading to:

Q.sup.n+1=B  (3)

In formula (5), suppose B=1, leading to:

Q.sup.n+1=A+Q.sup.n  (4)

[0038] Thus, the first signal X.sub.1 is input to the second intermediate-signal-input port 22 of a PhC-structural unit 02 at the moment t.sub.n, i.e., B=X.sub.1; simultaneously, supposing that the input-signal A of the port 21 is equal to 1, the logic-input-signal X.sub.1 (t.sub.n) at the moment t.sub.n is stored in an optical circuit; then, at the moment t.sub.n+1, the second signal X.sub.2 is input to the first intermediate-signal-input port 21 of the PhC-structural unit 02, i.e., the logic-input-signal A of the first intermediate-signal-input port 21 at the moment is equal to X.sub.2 (t.sub.n+1), and simultaneously, supposing that the logic-input-signal B of the second intermediate-signal-input port 22 is equal to 1. The output-signal 24 of the PhC-structural unit 02 is:

Q.sup.n+1=X.sub.1(t.sub.n)+X.sub.2(t.sub.n+1)  (5)

[0039] Hence, a CP control signal, an optical switch and a reference-light source need to be introduced into the system; as CP=0, the optical switch 01 projects the first signal X.sub.1 to the second intermediate-signal-input port 22, and simultaneously projects the signal “1” to the first intermediate-signal-input port 21; and for CP=1, the optical switch 01 projects the second signal X.sub.2 to the first intermediate-signal-input port 21, and simultaneously projects the signal “1” to the second intermediate-signal-input port 22.

[0040] The optical-selector switch operates as follows under the control of a clock-signal CP:

[0041] At a moment t.sub.n, CP is made equal to 0, the optical-selector switch turns the first signal X.sub.1 (t.sub.n) at the first logic-signal-input port 11 to the second intermediate-signal-output port, and the delay signal X.sub.1 (t.sub.n) is further projected to the second intermediate-signal-input port 22 of the PhC-structure unit 02; simultaneously, the optical-selector switch turns the second signal X.sub.2 (t.sub.n) at the second logic-signal-input port 12 to the third intermediate-signal-output port 16, and the second signal X.sub.2 (t.sub.n) is further projected to the WAL 04, and simultaneously, the optical-selector switch turns the reference-light E of the reference-light-input port 13 to the first intermediate-signal-output port 14, and the reference-light E is further projected to the first intermediate-signal-input port 21 of the PhC-structure unit 02; the output of the port 24 at this moment can be obtained from the expression (2):

Q.sup.n+1=X.sub.1(t.sub.n)  (6)

[0042] At a moment t.sub.n+1, CP is made equal to 1, the optical-selector switch turns the signal X.sub.1(t.sub.n+1) at the first logic-signal-input port 11 to the third intermediate-signal-output port 16, and the delay-signal X.sub.1(t.sub.n+1) is further projected to the WAL 04; simultaneously, the optical-selector switch turns the second signal X.sub.2(t.sub.n+1) at the second logic-signal-input port 12 to the first intermediate-signal-output port 14, and the second signal X.sub.2(t.sub.n+1) is further projected to the first intermediate-signal-input port 21 of the PhC-structure unit 02; and simultaneously, the optical-selector switch turns the reference-light E at the reference-light-input port 13 to the second intermediate-signal-output port 15, and the reference-light E is further projected to the second intermediate-signal-input port 22 of the PhC-structure unit 02; the output at the port 24 at this moment can be obtained from the expression (2):

Q.sup.n+1=X.sub.2(t.sub.n+1)+X.sub.1(t.sub.n)  (7)

[0043] The output at the output port 24 of the PhC-structure unit 02 is equal to the input at the D-signal-input port 52 of the DFF unit 05, and it can be obtained from the expressions (6) and (7) that the input-signal D of the D-signal-input port 52 is X.sub.1 (t.sub.n) for CP=0 and is X.sub.2(t.sub.n+1)+X.sub.1 (t.sub.n) for CP=1.

[0044] It can be known according to the logic characteristic of the DFF that for CP=1, the system output follows with the input-signal D; and for CP=0, the system output keeps the input-signal D at the previous moment. Thus, it can be known that the output Q.sup.n+1 at the system-output port 53 of the device in the present invention is Q.sup.n+1=X.sub.2(t.sub.n+1)+X.sub.1(t.sub.n) for CP=1; and at a next moment for CP=0, the system output keeps the output of the previous moment, i.e., the system output in a clock cycle is:

Q.sup.n+1=X.sub.2(n+1)+X.sub.1(n)  (8)

[0045] Hence, the device in the present invention can realize the OR-transformation logic function of two logic signals.

[0046] For the operating wavelength of 1.55 μm in the device, the lattice constant d is 0.5208 μm for the PhC-structure unit 02, the radius of the circular high-refractive-index linear-dielectric pillar 25 is 0.093744 μm; the long sides of the first rectangular high-refractive-index linear-dielectric pillar 26 are 0.3192504 μm, and the short sides are 0.0843696 μm; the size of the second rectangular high-refractive-index linear-dielectric pillar 27 is the same as that of the first rectangular high-refractive-index linear-dielectric pillar 26; the side length of the central square nonlinear-dielectric pillar 28 is 0.7812 μm, and the third-order nonlinear coefficient is 1.33×10.sup.−2 μm.sup.2/V.sup.2; and the distance between every two adjacent rectangular linear-dielectric pillars is 0.13894944 μm. Based on the above dimensional parameters, as the first logic-signal X.sub.1 and the second logic-signal X.sub.2 are input according to the waveforms shown in FIG. 3, a system-output waveform diagram at the lower part in FIG. 3 can be obtained under the control of the clock-signal CP. Hence, the system carries out OR-logic operation on the logic-input quantity X.sub.2 (n+1) and the logic-input quantity X.sub.1(n) at the previous moment. That is, the OR-transformation logic function of two logic signals is realized.

[0047] With reference to FIG. 3, the device in the present invention can realize the same logic function under different lattice constants and corresponding operating wavelengths by scaling.

[0048] In conclusion, an OR-transformation logic function of two all-optical-logic signals in the present invention can be realized by the control of the clock-signal CP of the clock-signal-input port under the coordination of relevant unit devices.

[0049] In the logic-signal processing in an integrated optical circuit, self-convolution operation of a single logic signal can be defined, and the above-mentioned logic operation of logic signals is a basic operation of the self-convolution operation of two logic signals. The OR-transformation logic function of logic signals realized in the present invention plays an important role in realizing self-correlation transformation or self-convolution operation of logic variables.

[0050] While the invention has been described in terms of various specific embodiments, those skilled in the art will recognize that the invention can be practiced with modification within the spirit and scope of the claims.