SiNW PIXELS BASED INVERTING AMPLIFIER

Abstract

In some embodiments, an inverting amplifier includes four electrical circuit elements (or “pixels”), with two pixels used as sensing elements and two pixels used as adjustable resistors for adjusting amplification factor to operate all pixels at the same amplification factor and cancelling out variations from processing. The sensing pixels include a silicon nanowire exposed to liquid or gas medium for sensing, a metal electrode partially open for contact with the medium and used for feeding a high-frequency sinusoidal stimulation in impedance measurements and for sensing properties of the medium, implanted source and drain electrodes connected to the nanowire, and electrical metal contacts attached to the electrodes and connecting the pixel to an electrical circuit. The two compensation pixels include an n-type or p-type silicon nanowire, implanted source and drain electrodes connected to the nanowire, and electrical metal contacts attached to the electrodes and connecting the pixel to an electrical circuit.

Claims

1. An inverting amplifier comprising: two sensing pixels, each comprising: a silicon nanowire exposed to liquid or gas medium for sensing; wherein said silicon nanowire of one pixel is of n-type and of another pixel is of p-type; a metal electrode partially open for contact with said medium and used for feeding a high-frequency sinusoidal stimulation in impedance measurements and for sensing properties of said medium; implanted source and drain electrodes connected to said silicon nanowire, leaving a gate area and parts of said metal electrode open for contact with said medium; and electrical metal contacts attached to said implanted source and drain electrodes and connecting said pixel to an electrical circuit; and two compensation pixels, each comprising: an n-type or p-type silicon nanowire directly contacted with a metal electrode placed on top of said silicon nanowire; said metal electrode coated with a passivation layer providing isolation from said medium; implanted source and drain electrodes connected to said silicon nanowire, and electrical metal contacts attached to said implanted source and drain electrodes and connecting said pixel to an electrical circuit, wherein the two compensation pixels are configured as adjustable resistors for adjusting amplification factor to operate all the pixels of said inverting amplifier at the same amplification factor, and cancelling out variations from processing.

2. The inverting amplifier of claim 1 further comprising a reference electrode.

3. The inverting amplifier of claim 1, wherein said silicon nanowires are low-doped p-type, low-doped n-type, drain n-doped and source p-doped, or drain p-doped and source n-doped.

4. The inverting amplifier of claim 1, wherein said metal electrode is a noble metal counter electrode.

5. The inverting amplifier of claim 4, wherein said noble metal is platinum, gold or copper.

6. The inverting amplifier of claim 2, wherein said reference electrode is an Ag/AgCl reference-cell electrode.

7. The inverting amplifier of claim 1, wherein said metal electrode of said sensing pixels is not passivated and in direct contact with said medium.

8. The inverting amplifier of claim 1, wherein the surface of said silicon nanowire of said sensing pixels is coated with pH-sensitive oxide or nitride dielectric for use as a pH-reference element.

9. The inverting amplifier of claim 8, where said pH-sensitive oxide or nitride dielectric is made of SiO.sub.2, Al.sub.2O.sub.3, Ta.sub.2O.sub.5, HfO.sub.2, TiO.sub.2, ZrO.sub.2, TiN or Si.sub.3N.sub.4.

10. The inverting amplifier of claim 9, where said pH-sensitive oxide dielectric is made of Al.sub.2O.sub.3 or Ta.sub.2O.sub.5.

11. The inverting amplifier of claim 1, wherein the surface of said silicon nanowires of said sensing pixels is coated with either a metal- or a molecular-passivation layer for negating the pH-sensitivity of said surface and consequently using the sensor as a solution conductivity reference element for pure ionic strength sensing.

12. The inverting amplifier of claim 11, where said metal-passivation layer is made of Au, Pt, Al, Wo, or Cu.

13. The inverting amplifier of claim 1, wherein said sensing pixels further comprise a back gate at the bottom for tuning a threshold voltage.

14. The inverting amplifier of claim 1, wherein the surface of said silicon nanowires of said sensing pixels is functionalised with receptor (capture) molecules capable of binding to target (analyte) molecules.

15. A method of using the inverting amplifier of claim 1 for label-free detection of a target molecule (analyte) in a medium by monitoring changes in an electric current recorded by a sensor open for contact with said medium.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Disclosed embodiments will be understood and appreciated more fully from the following detailed description taken in conjunction with the appended figures.

[0033] FIG. 1 schematically shows a single sensing pixel of an embodiment.

[0034] FIG. 2 schematically shows the cross-section of a single sensing pixel testing a liquid sample, which contains analyte molecules.

[0035] FIG. 3(a) schematically shows a sensing pixel with an open gate area exposed to tested medium.

[0036] FIG. 3(b) schematically shows a compensating pixel.

[0037] FIG. 3(c) schematically shows a sensing pixel having the gate area partially coated with a metal layer contacting the silicon nanowire, but not the metal electrode.

[0038] FIG. 4(a) shows the SEM image of a single sensing pixel of an embodiment.

[0039] FIG. 4(b) schematically shows the same single sensing pixel from FIG. 4(a).

[0040] FIG. 4(c) schematically shows a SiNW of a pixel and its dimensions.

[0041] FIG. 5(a) shows an inverting amplifier configuration given by combination of an n-type and p-type SiNW transistors.

[0042] FIG. 5(b) shows the behavior of the inverting amplifier of FIG. 5(a) when all the voltages are applied.

[0043] FIG. 6 shows the inverting amplifier of FIG. 5(a) in a bridge configuration with a second arm added, comprising two compensating resistors R.sub.1 and R.sub.2 with a high value of resistance.

[0044] FIG. 7(a) shows the inverting amplifier of FIG. 6 with a voltage divider used to shortcut two contacts to one voltage V.sub.out, which is measured against V.sub.in.sup.−.

[0045] FIG. 7(b) shows the behavior of the inverting amplifier of FIG. 7(a) when all the voltages are applied.

[0046] FIG. 8(a) shows a vertical mask design of the inverting amplifier of an embodiment.

[0047] FIG. 8(b) shows a horizontal mask design of the inverting amplifier of an embodiment.

[0048] FIG. 9 shows the inverting amplifier of an embodiment with an adjustable gain.

[0049] FIG. 10 shows an IA transfer curve recorded with the inverting amplifier of an embodiment.

[0050] FIG. 11 shows the forward and backward scan with the inverting amplifier of an embodiment.

[0051] FIG. 12 shows a voltage drift measured over time with the inverting amplifier of an embodiment.

[0052] FIG. 13 shows the IA transfer curve for the inverting amplifier of an embodiment without the voltage divider and with the voltage divider at different total resistance values.

[0053] FIG. 14 shows the IA transfer curve for the total resistance forward scan of the inverting amplifier of an embodiment at different total resistance values.

DETAILED DESCRIPTION

[0054] In some embodiments, the present application provides a sensor based on an inverting amplifier comprising four electrical circuit elements, defined as “pixels”. Two of the four pixels of the inverting amplifier are used as sensing elements and therefore, defined as “sensing pixels”. The sensing pixel is schematically shown in FIG. 1 and comprises: [0055] a silicon nanowire (101) exposed to liquid or gas medium for sensing; [0056] a metal electrode (105) partially open for contact with said medium and used for feeding a high-frequency sinusoidal stimulation in impedance measurements and for sensing properties of said medium; [0057] implanted source and drain electrodes (102) connected to said silicon nanowire (101), leaving a gate area (106) and parts of said metal electrode (105) open for contact with said medium; and [0058] electrical metal contacts (103) attached to said implanted source and drain electrodes (102) and connecting said pixel to an electrical circuit.

[0059] As will be discussed below, one of the two sensing pixels of the inverting amplifier contains a p-type SiNW, while the other one contains an n-type SiNW. Other two pixels of the inverting amplifier are used as adjustable resistors for adjusting amplification factor in order to operate all the pixels of said inverting amplifier at the same amplification factor, and cancelling out variations from processing. These two pixels are defined as “compensating resistor pixels” or “compensating pixels” and comprise: [0060] an n-type or p-type silicon nanowire directly contacted with a metal electrode placed on top of said silicon nanowire; [0061] said metal electrode coated with a passivation layer providing isolation from said medium; [0062] implanted source and drain electrodes connected to said silicon nanowire, and [0063] electrical metal contacts attached to said implanted source and drain electrodes and connecting said pixel to an electrical circuit.

Pixels and Their Operation Modes

[0064] In a particular embodiment, the silicon nanowires (101) are low-doped, obtained by the silicon-on-insulator (SOI) technology, which allows high carrier mobility, thereby improving performance. The silicon nanowires (101) of the disclosure are produced in a top-down fabrication process. In general, there are two main methods to fabricate single-crystalline silicon nanowires: bottom-up and top-down growth of the nanowire. In the bottom-up approach, single-crystalline SiNWs are grown with vapour-liquid-solid growth method (VLS) which was first described few decades ago by Wagner and Ellis (1964). The bottom-up approach is technologically much easier, but a scale up for industrial fabrication and mass production is not feasible. Although the bottom-up method produces very thin and sensitive wires in the range of only 10 nm, it has a low reproducibility. In fact, bottom-up approach has thus far prevented the commercialisation of such nanowire sensors mainly due its incompatibility with reproducible, high-volume manufacturing. In contrast, various top-down methods entail a high level of non-standard processing complexity and high process variation.

[0065] The SiNW of the pixels of disclosed embodiments are therefore fabricated using a top-down method, which has the advantage of producing more robust transistors. In addition, this approach addresses the problems of placement, integration, and reproducibility encountered with bottom-up materials. The modified top-down method, which was developed by the present inventors and described in Vu et al (2009 and 2010), combines wafer-scale nanoimprint lithography techniques defining nanowires from thin single crystalline silicon layers, reactive ion etching and further etching with tetra methyl ammonium hydroxide. After nanowire array fabrication, source and drain are doped by ion implantation to form electrode contacts, gate oxide is grown to create the gate dielectric layer, metal contacts are defined, and finally everything except the wire regions is passivated for sensor use in liquids.

[0066] The advantages of the top-down devices compared to those implementing bottom-up grown nanowires are the precise definition of the nanowire arrays on certain areas and the predetermined number of the nanowires on one device, which significantly increases the reproducibility.

[0067] The source and drain electrodes (102) are highly doped, in order to reduce feed line resistance, and obtained by the same SOI technology in the same process. The contact leads material is highly-doped silicon, a highly-doped polysilicon layer, a metal layer or preferably, a silicide, such as CoSi, PtSi or TiSi.

[0068] In a specific embodiment, the metal electrode (105) is a noble metal electrode, such as platinum counter electrode, which can also be used as a temperature sensor. In a further specific embodiment, the metal electrode (105) may be used as a counter electrode and temperature sensor simultaneously. In yet further embodiment, the metal electrode (105) may be used for the high-frequency AC sinusoidal stimulation in the impedance measurements of the sensor. The metal electrode (105) is chosen according to an established technology and an assembly line at a particular clean room facility.

[0069] As shown in FIG. 1, there is a small opening (114), which is made in the passivation layer (115) of the sensing pixel, for leaving the sensing elements of the sensing pixel open to the medium. In addition, the pixel may further comprise a reference electrode (104) open for contact with said medium for creating a three-electrode-cell system and providing a constant potential in the circuit. In a particular embodiment, the reference electrode (104) is an Ag/AgCl reference-cell electrode.

[0070] The electrical metal contacts (103) contacting the silicon source and drain connect the pixels to the electrical circuit and allow the electric current to flow in the system. One layer of these contacts is made of aluminium or silicide, such as CoSi, PtSi or TiSi, in order to form a surface alloy with the silicon, thereby providing an electrical ohmic contact to the silicon. The term “ohmic” contact means that it has a straight line in the current-voltage characteristics. These ohmic metal contacts (103) are made of metal or metal stacks, such as Al, Al/Ti/Au or similar. Another layer of these contacts is not contacting silicon and used to promote adhesion to the underlying layers of SiO.sub.2 and Si.sub.3N.sub.4, which are used for isolation. Cr and Ti are examples of such adhesion promoters. The Cr or Ti layers of the metal stack is, for example, of 5-10 nm thickness, while the second metal layer, such as Au, Pt and Cu, is of 100-400 nm thickness. In order to limit the capacitive coupling of the source and drain contact leads and to avoid leakage current into the signal of the sensor, the source and drain contact leads are further covered by a thick layer of insulators.

[0071] FIG. 2 shows the cross-section of a single sensing pixel, which tests liquid sample (107) containing analyte molecules. The pixel is connected to the circuit (110). As noted above, the pixel is manufactured using the modified top-down approach from SOI wafer handle substrates (112) of about 40-60 nm in thickness of the top silicon layer and a silicon buried oxide (BOX) (111) of approximately 100-400 nm thickness, which acts as an insulator layer. At room temperature and under the assumption that no fixed oxide charges exist, the SiNW (101) is fully depleted of charge carriers in thermal equilibrium. The pixel may further comprise a back gate (108) at the bottom of the handle wafer substrate (112). The back gate is used for tuning the threshold voltage, since the body of the pixel influences that voltage.

[0072] The open gate formed by liquid or gas medium (107) effectively controls the charge flow in the SiNW channel. In the gate area (106) (from FIG. 1), the SiNW (101) is coated with a gate oxide (113), which is placed in between the source and drain electrodes (102), and acts as a channel to allow the flow of charge carriers from one electrode to another. This is particularly useful for DC sensing. The gate oxide, also called the gate capacitor or dielectric (113), is a thin layer of oxide or nitride dielectric material, such as SiO.sub.2, Al.sub.2O.sub.3, TaO.sub.2, HfO.sub.2, TiO.sub.2, ZrO.sub.2, TiN, Si.sub.3N.sub.4 or similar. It is grown on top of the silicon substrate between source and drain, protecting the surface of the SiNW from an electrolyte solution, acting as a capacitor for the field effect and providing good pH sensitivity. In case of TaO.sub.2 or Al.sub.2O.sub.3, it is an ideal pH sensor.

[0073] In case of SiO.sub.2, the gate oxide (113) has a preferable thickness of 6-8 nm and isolates the SiNW from an electrolyte. The BOX layer (111) of approximately 100-400 nm thickness separates the SiNW from the handle wafer substrate (112) of about 500 μm thickness. Hence, the concentration of charge carriers in the nanowire can be controlled by an electric potential that can either be applied from the top through the thin oxide layer (113) or from the bottom through the thick BOX layer (111). The first gate is called “front gate” (FG), while the second is called “back gate” (BG). Like in any SOI fully-depleted device with a very thin top silicon layer, both gates are strongly coupled electrostatically. This indicates that the back-gate potential affects the front-gate characteristics and vice versa.

[0074] In general, the “open gate area” (106) of a sensing pixel is defined as an area between its source and drain contacts, which is directly exposed to a conductive medium, such as liquid or gas, capable of conducting electric current. This situation is schematically shown in FIG. 3(a).

[0075] The metal electrode (105) of the sensing pixel is not passivated since it should be in direct contact with the tested medium. Therefore, as mentioned above, there is an opening (114), which is made in the passivation layer (115), for leaving the sensing elements of the sensing pixel open to the medium, such as liquid or gas. An example of the conductive liquid is an electrolyte saline solution or buffer. In this case, instead of the fixed gate voltage, which is normally applied to a gate electrode, a reference potential is applied to the electrolyte-semiconductor system, via a reference electrode that is contacting the electrolyte. As a result, in the absence of the physical gate, the electrolyte itself becomes an open gate of the transistor.

[0076] In contrast to the sensing pixel, there is no open gate area in a compensating pixel, or to be more precise, the open gate area of the compensating pixel is completely passivated (the metal contact is now under the passivation layer), thereby creating a metal gate. This structure is similar to MOSFET, as illustrated in FIG. 3(b). That actually determines the type of a pixel in the inverting amplifier, i.e. makes it either sensing or compensating. There is a third case though, which is schematically shown in FIG. 3(c), when the gate area (106) can also be a metal layer contacting the silicon nanowire (101), but not the metal electrode (105), and hence, being exposed to the tested medium.

[0077] Depending on application purposes, the gate surface of a sensing pixel can be further modified by depositing other materials on the oxide layer, such as Si.sub.3N.sub.4, SiO.sub.2 or similar listed above, for pH sensors, monolayer of polymer for biomolecular binding, or high-k materials to enhance the electronic coupling with biology systems. In a particular embodiment, the surface of the SiNW is coated with a metal, such as Au, Pt or Cu, or by a molecular passivation layer, to become pH-insensitive and serve as a reference element (in DC readout mode). It can also be used for a solution conductivity sensor (for pure ionic strength sensing), when used in AC readout mode.

[0078] The passivation process can be carried out by the method of atomic layer deposition (ALD) of the gate oxides, which are deposited directly on the SiNW surface. These gate oxides are excellent sensing interfaces due to high density of their active surface groups obtained in the surface activation process prior to surface functionalisation. The front gate voltage is applied through a reference electrode immersed in electrolyte solution on top of the gate oxide or by a surface engineered reference electrode on chip. Thus, the thick passivation layer on the contact leads is necessary for a reliable operation of the sensor in different electrolyte solutions as well as to avoid interfering with the signal at the gate oxide.

[0079] The SEM image of a single sensing pixel is shown in FIG. 4(a), while FIG. 4(b) schematically shows this sensing pixel. The SiNW (200) is grown between the implanted source and drain (201) using mask (203) to form self-aligned source and drain regions, and opening (204) for passivation. Metal feed line (202) connects the single channel with the array circuit. FIG. 4(c) schematically shows a SiNW of this pixel. The source and drain contacts (201) are highly ion-implanted. The non-implanted area (205) is shown in dark blue. The nanowire is the same lowly doped silicon as the original SOI wafer. The open gate area (206) is 2μm larger than the non-implanted area from each side of the nanowire.

[0080] In general, the low-doped SiNWs can be of n-type or p-type, or can be configured as tunnelling silicon nanowire devices (drain n-doped and source p-doped or drain p-doped and source n-doped). Therefore, the sensing pixel can be operated as either p-type transistor or n-type transistor depending on the applied voltages to the gate. The front-gate characteristics show that the SiNWs with non-implanted contact leads are n-channel transistors, while the SiNWs with highly boron doped contact leads are p-channel, enhancement-mode transistors. Generally, in contrast to back-gate operation, the electric signals of the front-gate operations are stable and reliable. A subthreshold slope of 90 mV/decade indicated that a high quality front-gate oxide can be achieved in the fabrication process, which can enhance sensitivity of the SiNWs devices.

[0081] For operating a single pixel, a front gate voltage (V.sub.GS) is initially applied by a reference electrode (104), such as Ag/AgCl electrode, which is needed for the front gate contact to keep the electrochemical potential drop over the electrode-electrolyte interface stable (as a result, to keep the electrochemical potential of the solution stable) and the readout signal reliable. The reference electrode (104) actually is set to ground potential in the inverting amplifier of an embodiment and the source and drain potentials are applied at the respective contacts in the circuit.

[0082] When a sufficient bias potential is applied to the front gate with respect to the back gate of a sensing pixel, an electric current is immediately induced in the SiNW between the source and drain electrodes. The magnitude of the drain current is determined by an effective electrical resistance of the SiNW and the voltage applied between the source and drain electrodes (V.sub.DS). The conductance of the SiNW between the source and drain is modulated by the voltage at the gate (reference electrode).

[0083] The SiNWs produced by the top-down process are usually treated as ISFETs of nano size. The sensing mechanism of these SiNW ISFETs is based on the accumulation of charged molecules near the SiNW surface, which leads to a surface potential shift. The transistor then responds to changes in the surface potential with a threshold voltage shift. While in MOSFETs, the metallic gate is in direct contact with the dielectric over the channel, in the ISFETs, the gate (reference) electrode is a distance away from the dielectric, with an intervening sample fluid. Changes at the dielectric-solution interface alter the surface potential, which acts as an additional gate voltage. The gate voltage V.sub.GS is applied using a reference electrode to set the operating point of the device, and the conductance of the channel is measured by applying a drain-to-source voltage V.sub.DS. Thus, the gate voltage actually modulates the current between the source and the drain.

Inverting Amplifier

[0084] An inverting amplifier or inverter configuration is given by combination of an n-type and p-type transistor devices, as shown in FIG. 5(a), wherein the corresponding voltages in this figures are: V.sub.in.sup.+-positive input voltage; V.sub.in.sup.−-negative input voltage, which in most cases is set to ground; V.sub.out-output voltage of the inverting amplifier; and V.sub.EG-electrolyte (open gate) voltage seen by both n-type and p-type SiNW transistors simultaneously. As mentioned above, the open gate voltage V.sub.EG is set by a reference electrode, which is not shown in this circuit. The current flow in this inverting amplifier configuration is always delimited by the transistor with the lowest current (the highest channel resistance). Thus, when the above voltages are applied, the inverting amplifier of FIG. 5(a) shows the IA transfer behavior (follows the function), which is demonstrated in FIG. 5(b).

[0085] Depending on the device parameters, there is a transition of the output voltage V.sub.out of the circuit between the input voltage V.sub.in.sup.+ and The highest current flow is observed in the working point because the total resistance has the lowest value at this point. In general, in digital electronics, the slope of this transition can be very large leading to almost infinite amplification factors. In analogue electronics, however, using this configuration as a voltage amplifier is not that useful, since the working point in the center of the transition is very difficult to control.

[0086] When using the amplifier function, one should apply the corresponding voltages such that the working point would be set to the point of the maximum slope. When analyte molecules become bound to both the n-type an p-type SiNW pixels (see FIG. 2), there will be a small potential shift ΔV.sub.EG taking place at their solid-liquid interface. The potential shift ΔV.sub.EG is then converted by the inverting amplifier into a ΔV.sub.out with a gain factor defined by the slope of the transition. This gain factor can be compensated by using a second arm of the amplifier leading to a bridge configuration shown in FIG. 6. The second arm comprises two resistors R.sub.1 and R.sub.2 with a high value of resistance. Alternatively, for additional control and adjustment of this bridge, the positive output V.sub.in.sup.+ may be placed in the left arm, while V.sub.in.sup.− may be placed in the right arm; both therefore become accessible independently.

[0087] As shown in FIG. 7(a), a voltage divider may be used to shortcut two contacts to one voltage V.sub.out, which is measured against V.sub.in.sup.−. The slope of such configuration will then vary as shown in FIG. 7(b), which illustrates how the right arm influences the slope of the transition and consequently changes the gain of the inverting amplifier. In a static mode, the slope is decreased when using smaller resistors R.sub.1 and R.sub.2, but also the dynamic range of the sensor configuration (defined by the quasi-linear region in the transition) is limited. The voltage divider makes it possible to change the voltage transfer curve by its total resistance. This voltage divider will later be realized by two compensating pixels in the inverting amplifier circuit of the disclosure, which give the possibility to easily calibrate the inverting amplifier and to adjust the slope according to the application.

[0088] When transistors are used as variable resistors instead of resistors R.sub.1 and R.sub.2 in the second arm, the bridge can be used to dynamically adjust the gain. In some embodiments described in the present application, such bridge configuration can be realized by SiNW-based pixels only, wherein two pixels are exposed to a medium and used for sensing and two other pixels are completely metallized and passivated from the medium and used for gain adjustment or compensation as variable resistors.

[0089] FIGS. 8(a)-(b) show a vertical and a horizontal mask design, respectively, of the inverting amplifier of an embodiment including four pixels (two sensing and two compensating), a metal electrode (105), such as gold, platinum or copper electrode, feeding each pixel with the high-frequency AC signal, and drain contact lead (preferably, aluminium or salicide).

[0090] The sensing pixels contain a p-type SiNW (120) and n-type SiNW (121) exposed to a tested medium and acting as electrolyte gates. The compensating pixels contain either p- or n-type SiNWs (122) completely metallised and coated with the passivation layer (115), thereby acting as metal gates of the transistor. In general, the SiNWs (101) are intrinsically doped. As mentioned above, each pixel is passivated with a passivation layer (115) only leaving the gate area of two sensing pixels open for sensing. As above, the reference electrode (not shown here) is placed outside of the inverting amplifier.

[0091] The pixels may be fabricated in a CMOS process with pre-processing and post-processing steps using a complete SOI CMOS process, where the top silicon layer is used as an active CMOS layer. In that case, the only post-processing is needed for the metal electrode, the reference electrode and the passivation layer. Alternatively, the pixels can be fabricated using a standard CMOS process. In that case, the pre-processing is needed to define the silicon nanowire from an SOI wafer covering it by Si.sub.3N.sub.4 and then etching the rest of the surface down to the handle wafer. Then such a wafer can be used in a standard CMOS process leaving the protected SiNW areas untouched. This process is then followed by the post-processing for the metal electrode, the reference electrode and the passivation layer.

[0092] As mentioned above, sensing pixels are the pair of n-type and p-type SiNW based pixels, which are exposed to the electrolyte solution for sensing. When molecules are bound to their surface, the surface effect ΔV.sub.out is translated into an output voltage change. The advantage of the inverting amplifier of some embodiments of the present invention is that no additional amplifier, such as an operational amplifier, is needed. This decreases the complexity of the readout amplifier board tremendously. The gain of each sensor element can be adjusted by compensating resistor pixels. Eventual variations from the process can be cancelled out by adjusting the slope of the individual pixels. FIG. 9 shows the inverting amplifier circuit of an embodiment with an adjustable gain. The metallized SiNWs of the compensating pixels used in the right arm can be either of n-type or p-type, independently. As mentioned above, both of them are operated in a subthreshold mode as variable resistors with high resistance.

[0093] In general, since inverting amplifiers are designed to provide differential gain and good rejection of common-mode signals, they are very popular for sensors, such as strain gauges. FIG. 10 shows an IA transfer curve (voltage transfer characteristics) recorded with the inverting amplifier of the disclosure. It proves that the inverting amplifier circuit of the disclosure is working and that it has a huge slope i.e. gain factor. However, as seen in FIG. 11 showing the forward and backward scan with the inverting amplifier, there is also a small hysteresis originated from the fact that in the regular inverting amplifier, the working point is not controllable. The reason for that is probably high ionic strength, which makes it very difficult to find the working point. Using different delay times did not help to solve the problem of hysteresis. As seen in FIG. 11, the working point is around 1.5875V.

[0094] Many measurements have shown a slope in the IA transfer curve, which is so high that it was impossible to get the working point. For example, FIG. 12 shows a voltage drift measured over time. There are only 6 mV differences observed at the V.sub.EG input, while a typical signal recorded for DNA hybridization in biosensing is 10-50 mV change in the V.sub.EG voltage. It is clearly seen in this experiment that 1 mV input voltage alteration produces a huge output change. In addition, the output seems to be very unstable over time significantly changing the output behavior. Thus, in order to eliminate fabrication errors, e.g. deviations from outside to inside of the inverting amplifier, the slope should be tuned. Another reason is that a tunable slope makes it possible to adjust one and the same sensor chip based on the inverting amplifier of the disclosure to different applications. This is clearly a trade-off between sensitivity and range of the sensor.

[0095] Some embodiments of the present invention use the metallized SiNW-based pixels in the second arm to control the working point of the inverting amplifier and to adjust the gain factor. Such configuration allows compensating undesired effects, such as the voltage thermal drift. In the inverting amplifier configuration of the disclosure, shown in FIG. 9, the inverter is actually duplicated in parallel, and the voltage difference between the both is read out. This will result in that the temperature changes affect both voltages in the same way, but the desired sensing mechanism is only applied to one of them.

[0096] FIG. 13 shows the IA transfer curve for the inverting amplifier of the disclosure without the voltage divider and with the voltage divider at different total resistance values (2, 3 or 4 MΩ). Although, the hysteresis is still present, the slope is clearly changing as predicted. Now, in order to adjust the gain and working point, two compensating pixels are used in the second arm. In order to preserve the identical gain factor for all pixel-based inverting amplifiers connected in a sensor array, the additional gate electrodes at the sensing pixels, e.g. V.sub.G1 and V.sub.G3 in FIG. 8(a), may be used to apply a known test pulse and adjust the readout amplifier. By doing so the pixel-based inverting amplifiers sensor array would be totally independent from electronic variations coming from the process. The whole array may therefore be internally calibrated in a purely electronic procedure. The resulting shifts would then be only dependent on the surface reactions of the two sensing pixels. Thus, the voltage divider in parallel reduces the IA transfer function slope and therefore, increases the range, the lower the total resistance. The slope and consequently, the range can be adjusted by the total resistance of the voltage divider. FIG. 14 shows the IA transfer curve for the total resistance forward scan of the inverting amplifier of an embodiment at different total resistance values.

[0097] In another aspect of the disclosure, the sensing pixels' SiNWs are functionalised with different molecules (herein, “receptors”), which are capable of binding to a target (analyte) molecule, for sensing. As explained above, the second arm of the inverting amplifier is used only to adjust the slope in the IA transfer curve which gives the relation between V.sub.out and the ΔV.sub.EG, the shift caused by biomolecules. The biomolecules need to be deposited on both p- and n-type sensing pixels in the same concentration and configuration. This gives the largest effect. As a result, the sensor of an embodiment based on the adjustable inverting amplifier can be used for label-free detection of target (analyte) molecules by monitoring changes in the voltage caused by variations in the charge density at the gate oxide-electrolyte interface.

[0098] While certain features of the present application have been illustrated and described herein, many modifications, substitutions, changes, and equivalents will be apparent to those of ordinary skill in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the present application.