Group III nitride LED with undoped cladding layer and multiple quantum well

Abstract

The present invention is a semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum. The structure includes a first n-type cladding layer of Al.sub.xIn.sub.yGa.sub.1−x−yN, where 0≦x≦1 and 0≦y<1 and (x+y)≦1; a second n-type cladding layer of Al.sub.xIn.sub.yGa.sub.1−x−yN, where 0≦x≦1 and 0≦y<1 and (x+y)≦1, wherein the second n-type cladding layer is further characterized by the substantial absence of magnesium; an active portion between the first and second cladding layers in the form of a multiple quantum well having a plurality of In.sub.xGa.sub.1−xN well layers where 0<x<1 separated by a corresponding plurality of Al.sub.xIn.sub.yGa.sub.1−x−yN barrier layers where 0≦x≦1 and 0≦y≦1; a p-type layer of a Group III nitride, wherein the second n-type cladding layer is positioned between the p-type layer and the multiple quantum well; and wherein the first and second n-type cladding layers have respective bandgaps that are each larger than the bandgap of the well layers. In preferred embodiments, a Group III nitride superlattice supports the multiple quantum well.

Claims

1. A semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum, said structure comprising: a first n-type cladding layer of Al.sub.xIn.sub.yGa.sub.1−x−yN, where 0≦x≦1 and 0≦y<1 and (x+y)≦1; a second n-type cladding layer of Al.sub.xIn.sub.yGa.sub.1−x−yN where 0≦x≦1 and 0≦y<1 and (x+y)≦1, wherein said second n-type cladding layer is further characterized by the substantial absence of magnesium.Iadd., and wherein a composition of said second n-type cladding layer is graded.Iaddend.; an active portion between said first and second cladding layers in the form of a multiple quantum well having a plurality of In.sub.xGa.sub.1−xN well layers where 0<x<1 separated by a corresponding plurality of Al.sub.xIn.sub.yGa.sub.1−x−yN barrier layers where 0≦x≦1 and 0≦y≦1; a p-type layer of a Group III nitride, wherein said second n-type cladding layer is positioned between said p-type layer and said multiple quantum well; wherein said first and second n-type cladding layers have respective bandgaps that are each larger than the bandgap of said well layers.Iadd., wherein a p-n junction is defined between said second n-type cladding layer and said p-type layer.Iaddend..

2. A structure according to claim 1 wherein said barrier layers comprise Al.sub.xIn.sub.yGa.sub.1−x−yN where 0≦x<1 and 0<y<1.

3. A structure according to claim 1 wherein said barrier layers comprise Al.sub.xIn.sub.yGa.sub.1−x−yN where 0<x<1 and 0≦y<1 and x+y≦1.

4. A structure according to claim 1 wherein said barrier layers in said multiple quantum well have larger bandgaps than said well layers in said multiple quantum well.

5. A structure according to claim 1 wherein at least one of said barrier layers in said multiple quantum well is undoped.

6. A structure according to claim 1 wherein at least one of said well layers in said multiple quantum well is undoped.

7. A semiconductor structure according to claim 1, wherein said multiple quantum well has a first surface and a second surface, said first surface of said multiple quantum well being in contact with said first n-type cladding layer and said second surface of said multiple quantum well being in contact with said second n-type cladding layer.

8. A semiconductor structure according to claim 1, wherein said second n-type cladding layer has a first surface and a second surface, said first surface of said second n-type cladding layer being in contact with said multiple quantum well, and said second surface of said second n-type cladding layer being in contact with said p-type layer, wherein the composition of said second n-type cladding layer is progressively graded such that the crystal lattice at said first surface of said second n-type cladding layer more closely matches the crystal lattice of said multiple quantum well, and the crystal lattice at said second surface of said second n-type cladding layer more closely matches the crystal lattice of said p-type layer.

9. A semiconductor structure according to claim 1, wherein said p-type layer is in contact with said second n-type cladding layer, opposite said multiple quantum well.

10. A semiconductor structure according to claim 1, wherein said second n-type cladding layer consists essentially of Al.sub.xGa.sub.1−xN, where 0<x <1.

11. A semiconductor structure according to claim 1, wherein said active .[.layer.]. .Iadd.portion .Iaddend.consists essentially of In.sub.yGa.sub.1−yN, where 0<y<1.

12. A semiconductor structure according to claim 1, wherein said p-type layer is magnesium-doped gallium nitride.

13. A semiconductor structure according to claim 12, wherein said second n-type cladding layer is thick enough to deter migration of magnesium from said p-type layer to said multiple quantum well, yet thin enough to facilitate recombination in said multiple quantum well.

14. A semiconductor structure according to claim 1, wherein said p-type layer is indium nitride.

15. A semiconductor structure according to claim 1, wherein said p-type layer is In.sub.xGa.sub.1−xN, where 0<x<1.

16. A semiconductor structure according to claim 1, wherein said p-type layer comprises a superlattice formed from a plurality of Group III nitride layers selected from the group consisting of gallium nitride, indium nitride, and In.sub.xGa.sub.1−xN, where 0<x<1.

17. A semiconductor structure according to claim 16, wherein said superlattice is formed from alternating layers of two Group III nitride layers selected from the group consisting of gallium nitride, indium nitride, and In.sub.xGa.sub.1−xN, where 0<x<1.

18. A semiconductor structure according to claim 1, further comprising a third n-type layer of Al.sub.xIn.sub.yGa.sub.1−x−yN, where 0≦x≦1 and 0≦y<1 and (x+y)≦1, wherein said third n-type layer is positioned between said second n-type cladding layer and said .[.p-type layer.]. .Iadd.multiple quantum well.Iaddend..

19. A semiconductor structure according to claim 18, wherein said third n-type layer has a first surface and a second surface, said first surface of said third n-type layer being in contact with said .[.p-type layer.]. .Iadd.multiple quantum well .Iaddend.and said second surface of said third n-type layer being in contact with said second n-type cladding layer.

20. A semiconductor structure according to claim 1, further comprising an n-type silicon carbide substrate, wherein said first n-type cladding layer is positioned between said silicon carbide substrate and said multiple quantum well.

21. A semiconductor structure according to claim 15, further comprising.Iadd.: a silicon carbide substrate, wherein said first n-type cladding layer is positioned between said silicon carbide substrate and said multiple quantum well; and .Iaddend. discrete crystal portions selected from the group consisting of gallium nitride and indium gallium nitride, said discrete crystal portions positioned between said first n-type cladding layer and said silicon carbide substrate, said discrete crystal portions being present in an amount sufficient to reduce .[.the.]. .Iadd.a .Iaddend.barrier between said first n-type cladding layer and said silicon carbide substrate, but less than an amount that would detrimentally affect .[.the function.]. .Iadd.functionality .Iaddend.of .[.any resulting.]. .Iadd.a .Iaddend.light emitting device formed on said silicon carbide substrate.

22. A semiconductor structure according to claim 1, further comprising: an n-type-silicon carbide substrate; and a conductive buffer layer positioned between said silicon carbide substrate and said first n-type cladding layer.

23. A semiconductor structure according to claim 22, wherein said conductive buffer layer has a first surface and a second surface, said first surface of said conductive buffer layer being in contact with said silicon carbide substrate and said second surface of said conductive buffer layer being in contact with said first n-type cladding layer.

24. A semiconductor structure according to claim 22, wherein said conductive buffer layer consists essentially of aluminum gallium nitride having the formula Al.sub.xGa.sub.1−1N, where 0<x<1.

25. A semiconductor structure according to claim 22, further comprising an n-type transition layer of a Group III nitride, said transition layer being positioned between said conductive buffer layer and said first n-type cladding layer.

26. A semiconductor structure according to claim 22, further comprising discrete crystal portions selected from the group consisting of gallium nitride and indium gallium nitride, said discrete crystal portions positioned between said conductive buffer layer and said silicon carbide substrate, said discrete crystal portions being present in an amount sufficient to reduce .[.the.]. .Iadd.a .Iaddend.barrier between said conductive buffer layer and said silicon carbide substrate, but less than an amount that would detrimentally affect .[.the function.]. .Iadd.functionality .Iaddend.of .[.any resulting.]. .Iadd.a .Iaddend.light emitting device formed on said silicon carbide substrate.

27. A semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum, said structure comprising: an active portion in the form of a multiple quantum well having a plurality of In.sub.xGa.sub.1−xN well layers where 0<x<1 separated by a corresponding plurality of Al.sub.xIn.sub.yGa.sub.1−x−yN barrier layers where 0≦x≦1 and 0≦y≦1; a Group III nitride superlattice supporting said multiple quantum well; a layer of Al.sub.xIn.sub.yGa.sub.1−x−yN, where 0<x≦1 and 0≦y≦1 and (x+y)≦1 adjacent said multiple quantum well and opposite from said superlattice with respect to said multiple quantum well and being characterized by the substantial absence of magnesium.Iadd., wherein a composition of said layer of Al.sub.xIn.sub.yGa.sub.1−x−yN is graded.Iaddend.; a first p-type layer of a Group III nitride adjacent said .[.AlInGaN.]. layer .Iadd.of Al.sub.xIn.sub.yGa.sub.1−x−yN .Iaddend.and opposite said multiple quantum well with respect to said .[.AlInGaN.]. layer .Iadd.of Al.sub.xIn.sub.yGa.sub.1−x−yN, wherein a p-n junction is defined between said layer of Al.sub.xIn.sub.yGa.sub.1−x−yN and said first p-type layer.Iaddend.; and an n-type Group III nitride layer supporting said superlattice and opposite from said multiple quantum well with respect to said superlattice.

28. A semiconductor structure according to claim 27 and further comprising a silicon carbide substrate and a conductive Group III nitride buffer layer on said substrate, with said substrate and said conductive buffer layer supporting .[.the.]. .Iadd.a .Iaddend.remainder of said structure.

29. A semiconductor structure according to claim 28 and further comprising: an additional n-type GaN layer between said conductive buffer layer and said supporting n-type layer; a p-type contact layer on said first p-type layer; an ohmic contact to said p-type contact layer; and an ohmic contact to said substrate.

30. A semiconductor structure according to claim 27 wherein said superlattice comprises alternating layers of In.sub.xGa.sub.1−xN and In.sub.yGa.sub.1−yN where 0≦x≦1 and 0≦y≦1 and x does not equal y.

31. A semiconductor structure according to claim 30 wherein x equals 0 and 0<y<1.

32. A semiconductor structure according to claim 30 wherein said superlattice contains between 5 and 50 periods.

33. A semiconductor structure according to claim 30 wherein said superlattice contains 25 periods.

34. A semiconductor structure according to claim 30 wherein said superlattice contains 10 periods.

35. A semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum, said structure comprising: a silicon carbide substrate; a conductive Group III nitride buffer layer on said substrate; a first n-type GaN layer on said conductive buffer layer; a second n-type Group III nitride layer on said first .Iadd.n-type .Iaddend.GaN layer; a superlattice on said second .[.GaN.]. .Iadd.n-type Group III nitride .Iaddend.layer and formed of alternating layers of GaN and In.sub.yGa.sub.1−yN where 0<y<1; an active portion on said superlattice in the form of a multiple quantum well having a plurality of In.sub.xGa.sub.1−xN well layers where 0<x<1 separated by a corresponding plurality of Al.sub.xIn.sub.yGa.sub.1−x−yN barrier layers where 0≦x≦1 and 0≦y≦1; a layer of Al.sub.xIn.sub.yGa.sub.1−x−yN, where 0≦x≦1 and 0≦y≦1 and (x+y)≦1 on said multiple quantum well and being characterized by the substantial absence of magnesium.Iadd., wherein a composition of said layer of Al.sub.xIn.sub.yGa.sub.1−x−yN is graded.Iaddend.; a first p-type layer of a Group III nitride on said .[.AlInGaN.]. layer .Iadd.of Al.sub.xIn.sub.yGa.sub.1−x−yN, wherein a p-n junction is defined between said layer of Al.sub.xIn.sub.yGa.sub.1−x−yN and said first p-type layer.Iaddend.; a p-type contact layer on said first p-type layer; an ohmic contact to said p-type contact layer; and an ohmic contact to said substrate.

36. A structure according to claim 35 wherein said barrier layers in said multiple quantum well have large bandgaps than said well layers in said multiple quantum well.

37. A structure according to claim 35 wherein at least one of said barrier .[.layer.]. .Iadd.layers .Iaddend.in said multiple quantum well is undoped.

38. A structure according to claim 35 wherein at least one of said well layers in said multiple quantum well is undoped.

39. A semiconductor structure according to claim 35, further comprising discrete crystal portions selected from the group consisting of gallium nitride and indium gallium nitride, said discrete crystal portions positioned between said .[.first n-type cladding.]. .Iadd.conductive Group III nitride buffer .Iaddend.layer and said silicon carbide substrate, said discrete crystal portions being present in an amount sufficient to reduce .[.the.]. .Iadd.a .Iaddend.barrier between said .[.first n-type cladding.]. .Iadd.conductive Group III nitride buffer .Iaddend.layer and said silicon carbide substrate, but less than an amount that would detrimentally affect .[.the function.]. .Iadd.functionality .Iaddend.of .[.any resulting.]. .Iadd.a .Iaddend.light emitting device formed on said silicon carbide substrate.

.Iadd.40. A structure according to claim 1 wherein the composition of said second n-type cladding layer is graded in a stepwise fashion. .Iaddend.

.Iadd.41. A structure according to claim 1 wherein the composition of said second n-type cladding layer is graded in a continuous fashion. .Iaddend.

.Iadd.42. A structure according to claim 1, wherein the p-n junction comprises a p-n homojunction between said second n-type cladding layer and said p-type layer. .Iaddend.

.Iadd.43. A structure according to claim 1, wherein, at the p-n junction, said second n-type cladding layer and said p-type layer comprise aluminum. .Iaddend.

.Iadd.44. A semiconductor structure according to claim 27, wherein, at the p-n junction, said layer of Al.sub.xIn.sub.yGa.sub.1−x−yN and said first p-type layer comprise aluminum. .Iaddend.

.Iadd.45. A semiconductor structure according to claim 35, wherein, at the p-n junction, said layer of Al.sub.xIn.sub.yGa.sub.1−x−yN and said first p-type layer comprise aluminum. .Iaddend.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a cross-sectional schematic view of the aspects of a semiconductor structure for a light emitting device according to the present invention;

(2) FIG. 2 is a plot of bandgap energy versus lattice parameter for Group III nitrides alloys of aluminum, indium, and gallium (assuming a linear interpolation);

(3) FIG. 3 is a cross-sectional schematic view of an embodiment of the semiconductor structure;

(4) FIG. 4 is a cross-sectional schematic view of an embodiment of the semiconductor structure;

(5) FIG. 5 is a cross-sectional schematic view of an embodiment of the semiconductor structure;

(6) FIG. 6 is a cross-sectional schematic view of an embodiment of the semiconductor structure;

(7) FIG. 7 is a cross-sectional schematic view of an embodiment of the semiconductor structure;

(8) FIGS. 8 and 9 are bandgap diagrams corresponding to certain prior art devices;

(9) FIGS. 10-12 are bandgap diagrams for devices according to the present invention;

(10) FIG. 13 is a cross-sectional schematic view of another embodiment of the present invention; and

(11) FIG. 14 is a cross-sectional view of the superlattice portion of the present invention.

DETAILED DESCRIPTION

(12) The present invention is a semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum. In a first embodiment, the structure includes a Group III nitride active portion positioned between a first n-type Group III nitride cladding layer and a second n-type Group III nitride cladding layer. The active portion preferably includes an active layer and a quantum well or a multiple quantum well as described further later herein. The second n-type cladding layer is characterized by the substantial absence of magnesium (i.e., magnesium may be present, but only in amounts that are so small as to have no functional effect on the semiconductor device). The semiconductor structure itself is further characterized by a p-type Group III nitride layer, which is positioned in the semiconductor structure such that the second n-type cladding layer is between the p-type layer and the active layer. In addition, the active layer has a bandgap that is smaller than each respective bandgap of the first and second n-type cladding layers. As used herein, the term “layer” generally refers to a single crystal epitaxial layer.

(13) A particular conductivity type (i.e., n-type or p-type) may be unintentional, but is more commonly a result of specifically doping the Group III nitrides using the appropriate donor or acceptor atoms. It is desirable to include layers of opposite conductivity types in order to form a p-n junction in the device. Under forward voltage bias, minority carriers injected across the p-n junction recombine to produce the desired luminescent emissions. Appropriate doping of Group III nitrides is well understood in the art and will not be further discussed herein other than as necessary to describe the invention.

(14) In general, the active portion and the cladding layers comprise Group III-nitride compounds. The Group III elements in such compounds may be aluminum, indium, gallium, or a combination of two or more such elements.

(15) As will be understood by those having ordinary skill in the art, the molar fraction of aluminum, indium, and gallium in the active layer, the first n-type cladding layer, and the second n-type cladding layer may be generally expressed by the formula, AlxInyGa1−x−yN, where 0≦x≦1 and 0≦y<1 and (x+y)≦1. In this regard, the relative concentrations of aluminum, indium, and gallium may vary from layer to layer. It will be understood by those skilled in the art, however, that a cladding layer cannot be indium nitride (i.e., y=1) because InN has the lowest bandgap of all possible combinations and the active layer cannot be aluminum nitride (i.e., x=1) because AIN has the highest bandgap of all possible combinations. It will be understood in these embodiments that the cladding layers will have a larger energy band gap than the active layer.

(16) An understanding of the invention may be achieved with reference to FIG. 1, which is a cross-sectional schematic view of a semiconductor structure for an LED according to the present invention. The semiconductor structure, which is generally designated at 10, includes a first n-type cladding layer 11 of AlxInyGa1−x−yN, where 0≦x≦1 and 0≦y<1 and(x+y)≦1.

(17) The semiconductor structure 10 also includes a second n-type cladding layer of AlxInyGa1−x−yN, where 0≦x<1 and 0≦y<1 and (x+y)<1, or in a more specific embodiment, an indium-free aluminum gallium nitride n-type cladding layer 12 having the formula, AlxGa1−xN, where 0<x<1. In this regard, the range for the variable x excludes both 0 and 1, which will be understood by those skilled in the art as requiring the presence of both aluminum and gallium (i.e., an alloy of aluminum and gallium). As noted, the second n-type cladding layer 12 specifically excludes magnesium, and may be doped or undoped. The cladding layers may be unintentionally n-type, i.e. undoped.

(18) An n-type active layer 13 having the formula AlxInyGa1−x−yN, where 0≦x<1 and 0≦y≦1 and (x+y)≦1, is positioned between the first n-type cladding layer and the second n-type cladding layer 12. In a more specific embodiment, the active layer 13 is aluminum-free, consisting essentially of an indium gallium nitride having the formula, InyGa1−yN, where 0<y<1. In this regard, the range for the variable y excludes both 0 and 1, which will be understood by those skilled in the art as requiring the presence of both indium and gallium (i.e., an alloy of indium and gallium).

(19) The semiconductor structure is further characterized by a p-type Group III nitride layer 18, which as previously noted, is positioned in the semiconductor structure such that the second n-type cladding layer 12 is between the p-type layer 18 and the active layer 13. In preferred embodiments, the p-type layer is made of gallium nitride (preferably magnesium-doped gallium nitride); indium nitride; or indium gallium nitride of the formula InxGa1−xN, where 0<x<1.

(20) Note that in embodiments wherein the p-type layer 18 is made of magnesium-doped gallium nitride, the second n-type cladding layer 12 should be thick enough to deter migration of magnesium from the p-type layer 18 to the active layer 13, yet thin enough to facilitate recombination of electrons and holes in the active layer 13. This helps to maximize emissions from the active layer 13. Moreover, because the p-n junction is not formed at the interface between an InGaN layer and an AlGaN layer—i.e. an InGaN/AlGaN p-n junction is avoided—the interface should have a reduced density of interface states. Such a reduction in interface states should result in more efficient recombination of carriers in the active layer, with a corresponding increase in overall device efficiency.

(21) In another embodiment, the p-type layer comprises a p-type superlattice formed of selectively doped p-type Group III nitride layers selected from the group consisting of gallium nitride; indium nitride; and indium gallium nitride of the formula InxGa1−xN, where 0<x<1. In particular, the superlattice is best formed from alternating layers of any two of these Group III nitride layers. In such a superlattice, alternating layers of gallium nitride and indium gallium nitride are most preferred.

(22) The active layer 13 may be doped or undoped. As is known to those familiar with Group III nitride properties, the undoped material will generally be unintentionally n-type, and that is the case for the second n-type cladding layer 12. In particular, the first n-type cladding layer 11 and the second n-type cladding layer 12 have respective bandgaps that are each larger than the bandgap of the active layer 13.

(23) The Group III mole fractions can be selected to provide these characteristics. For example, FIG. 2 theoretically describes bandgap energy versus lattice parameter. The triangular region of FIG. 2 represents the range of bandgap energies available for Group III nitrides of aluminum, indium, and gallium. FIG. 2 reveals that for any particular lattice parameter, eliminating gallium maximizes the bandgap energy (i.e., the bandgap for an aluminum indium nitride is defined by the AIN—InN segment).

(24) As is known to those familiar with semiconductor structures—especially laser structures, the active layer must have a lower bandgap than the adjacent n-type cladding layers, and a higher refractive index than the adjacent cladding layers. Such a structure gives two benefits important for laser capability. First, if the active layer has the lowest bandgap, it may form a quantum well into which carriers tend to fall. This helps to enhance the device efficiency. Second, waveguiding occurs in the material that has the highest refractive index in the structure. Accordingly, when the bandgap of the active layer is less than that of the adjacent layers and its refractive index is greater than that of the adjacent layers, the lasing capabilities of the device are enhanced.

(25) Moreover, as known to those of ordinary skill in this art, the composition of ternary and quaternary Group III nitrides can affect both their refractive index and their bandgap. Generally speaking, a larger proportion of aluminum increases the bandgap and decreases the refractive index. Thus, in preferred embodiments, in order for the cladding layers 11 and 12 to have a bandgap larger than the active layer 13 and a refractive index smaller than the active layer 13, the cladding layers 11 and 12 preferably have a higher fraction of aluminum or gallium as compared to the active layer 13. The larger bandgap of the cladding layers 11 and 12 encourages carriers to be confined in the active layer 13, thereby increasing the efficiency of the device. Similarly, the lower refractive index of the heterostructure layers 11 and 12 encourages the light to be more preferably guided along (i.e., confined to) the active layer 13.

(26) As previously noted, the recited variables (e.g., x and y) refer to the structural layer they describe. That is, the value of a variable with respect to one layer is immaterial to the value of the variable with respect to another layer. For example, in describing the semiconductor structure, the variable x may have one value with respect to first n-type cladding layer 11, another value with respect to second n-type cladding layer 12, and yet another value with respect to active described layer 13. As will also be understood by those of ordinary skill in the art, the limitation 0≦(x+y)≦1 in the expression AlxInyGa1−x−yN simply requires that the Group III elements and the nitride be present in a 1:1 molar ratio.

(27) In certain of the preferred embodiments, the active layer 13 comprises an InGaN layer having a mole fraction of indium between about 0.05 and 0.55. Referring to FIGS. 1 and 3, the cladding layer 12 is preferably an AlxGa1−xN layer having a mole fraction of aluminum between about 0.14 and 0.24, while the cladding layer 11 is preferably an AlxGa1−xN layer having a mole fraction of aluminum between about 0 and 0.15. Referring to FIG. 3, the p-type layer 19 is preferably an AlxGa1−xN layer having a mole fraction of aluminum between about 0 and 0.15.

(28) It will be appreciated by those of ordinary skill in the art that, as used herein, the concept of one layer being “between” two other layers does not necessarily imply that the three layers are contiguous (i.e., in intimate contact). Rather, as used herein the concept of one layer being between two other layers is meant to describe the relative positions of the layers within the semiconductor structure. Similarly, as used herein, the concept of a first layer being in contact with a second layer, “opposite” a third layer, merely describes the relative positions of the first and second layers within the semiconductor structure.

(29) That said, in preferred embodiments of the semiconductor structure, the active layer 13 has a first surface 14 contiguous to the first n-type cladding layer 11 and a second surface 15 contiguous to the second n-type cladding layer 12. In other words, in such embodiments, the active layer 13 is sandwiched directly between the first n-type cladding layer 11 and the second n-type cladding layer 12, with no additional layers disturbing this three-layer isotype heterostructure (i.e. a heterostructure in which all of the materials have the same conductivity type), which is designated by the bracket 16. In another preferred embodiment, the p-type layer 18 is in contact with said second n-type cladding layer 12, opposite said active layer 13.

(30) The structural designation “heterostructure” is used in a manner well understood in this art. Aspects of these structures are discussed, for example, in Sze, Physics of Semiconductor Devices, Second Edition (1981) at pages 708-710. Although the cited Sze discussion refers to lasers, it nonetheless illustrates the nature of, and the distinction between, homostructure, single heterostructure, and double heterostructure devices. Isotype heterostructures are discussed by Hartman et al. in U.S. Pat. No. 4,313,125, which is hereby incorporated herein in its entirety.

(31) The semiconductor device may also include additional n-type layers of AlxInyGa1−x−yN, where 0≦x≦1 and 0≦y<1 and (x+y)≦1. In one embodiment depicted in FIG. 3, a third n-type layer 19 is positioned between second n-type cladding layer 12 and p-type layer 18. Preferably, the third n-type layer 19 has a first surface that is in contact with the p-type layer 18 and a second surface that is in contact with second n-type cladding layer 12.

(32) Third n-type layer 19 is lattice matched with p-type layer 18. Preferably, third n-type layer 19 forms a p-n homojunction with p-type layer 18. Having a p-n homojunction reduces the number of interface states at the junction. Because such states may result in nonradiative recombination, reducing the number of such states improves the recombination efficiency, thus improving overall device efficiency.

(33) The semiconductor device 10 can further comprise a silicon carbide substrate 17 that has the same conductivity type as the first n-type cladding layer 11 (i.e., an n-type silicon carbide substrate). The silicon carbide substrate 17 preferably has a polytype of 3C, 4H, 6H, or 15R. The first n-type cladding layer 11 is positioned between the silicon carbide substrate 17 and the active layer 13. In one embodiment of the invention, the silicon carbide substrate 17 is in contact with the first n-type cladding layer 11, opposite the active layer 13 (i.e., there are no intervening layers between silicon carbide substrate 17 and first n-type cladding layer 11).

(34) The silicon carbide substrate 17 is most preferably a single crystal. As is well understood by those of ordinary skill in this art, a high quality single crystal substrate provides a number of structural advantages that in turn provide significant performance and lifetime advantages. The silicon carbide substrate 17 can be formed by the methods described in U.S. Pat. No. 4,866,005 (now U.S. Pat. No. RE 34,861). Preferably, the silicon carbide substrate 17 and the first cladding layer 11 are n-type.

(35) In a preferred embodiment depicted by FIG. 4, the first n-type cladding layer 11 has a first surface 21 that is in contact with the silicon carbide substrate 17 and a second surface 22 that is in contact with the active layer 13. In particular, the composition of the first n-type cladding layer 11 is progressively graded such that the crystal lattice at its first surface 21 more closely matches the crystal lattice of the silicon carbide 17, and the crystal lattice at its second surface 22 more closely matches the crystal lattice of the active layer 13. A sufficient mole fraction of indium should be present in the first n-type cladding layer 11 to ensure that it remains conductive at its first surface 21, adjacent to the silicon carbide substrate 17.

(36) As will be understood by those of ordinary skill in the art, progressively grading embraces both step grading and linear grading. Accordingly, as used herein, the concept of more closely matching respective crystal lattices does not imply perfect matching, but rather that a layer whose composition has been progressively, compositionally graded so that its lattice at a layer interface is more compatible with the crystal lattice of the adjacent layer. When fabricating devices, a number of considerations must be balanced, one of which is lattice matching. If other factors are more important, a perfect or close lattice match may be less important, and vice versa.

(37) In this regard, n-type cladding layers, especially aluminum indium nitride n-type cladding layers, can be selectively lattice matched to gallium-containing active layers, especially gallium nitride and indium gallium nitride active layers, in order to reduce strain and defects. In particular, aluminum indium nitrides are useful because they can be lattice matched to other Group III nitrides with lower bandgaps and therefore are useful as cladding layer materials. See FIG. 2. The benefits of lattice-matching can also apply to the structures herein that include a multiple quantum well for the active portion and one or more superlattice structures.

(38) As will be understood by those having ordinary skill in the art, lattice matching of the cladding layers and the active layer can be a one-sided lattice match (i.e., where a lattice match occurs on one side of the active layer) or a two-sided lattice match (i.e., where a lattice match occurs on both sides of the active layer).

(39) In another embodiment depicted by FIG. 5, the semiconductor structure further includes a conductive buffer layer 23 positioned between the silicon carbide substrate 17 and the first n-type cladding layer 11. In a variant of this embodiment, the conductive buffer layer 23 is sandwiched between the silicon carbide substrate 17 and the first n-type cladding layer 11, with no intervening layers. The conductive buffer layer 23 preferably consists essentially of aluminum gallium nitride having the formula AlxGa1−xN, where 0<x<1. Alternatively, when the first n-type cladding layer 11 consists essentially of aluminum indium nitride having the formula, AlxInl−xN, where 0<x<1, the conductive buffer layer 23 preferably consists essentially of aluminum indium nitride having the formula, AlxInl−xN, where 0<x<1. Other acceptable buffers and buffer structures include those described in commonly assigned U.S. Pat. Nos. 5,523,589, 5,393,993, and 5,592,501, the contents of each hereby being incorporated entirely herein by reference.

(40) To facilitate the transition between the first n-type cladding layer 11 and the conductive buffer layer 23, the semiconductor structure can further include a Group III nitride transition layer 24, preferably formed of gallium nitride, that is positioned between the conductive buffer layer 23 and the first n-type cladding layer 11. See FIG. 6. The transition layer 24 has the same conductivity type as the first n-type cladding layer 11 (i.e., an n-type transition layer).

(41) Alternatively, as depicted by FIG. 7, the conductive buffer layer 23 and transition layer 24 can be replaced by discrete crystal portions 28 that are disclosed more fully in commonly assigned U.S. patent application Ser. No. 08/944,547, filed Oct. 7, 1997, now U.S. Pat. No. 6,201,262, for “Group III Nitride Photonic Devices on Silicon Carbide Substrates with Conductive Buffer Interlayer Structure,” which is incorporated entirely herein by reference.

(42) In yet another embodiment, the semiconductor structure 10 further includes a first ohmic contact 25 and a second ohmic contact 26. As indicated in FIG. 1, the first ohmic contact 25 is positioned in the semiconductor structure such that the silicon carbide substrate 17 is between the first ohmic contact 25 and the first n-type cladding layer 11. The second ohmic contact 26 is positioned in the semiconductor structure such that the p-type layer 18 is between the second ohmic contact 26 and the second n-type cladding layer 12.

(43) Preferably, the first ohmic contact 25 is placed directly on the silicon carbide substrate 17, opposite the first n-type cladding layer 11 (or opposite the conductive buffer layer 23 or discrete crystal portions 28, depending on the particular structural embodiment), and the second ohmic contact 26 is placed directly on the p-type layer 18, opposite the second n-type cladding layer 12. In a variant of this embodiment, the p-type layer 18 is sandwiched between the second ohmic contact 26 and a second p-type layer (not shown).

(44) As recognized by those of ordinary skill in this art, the conductive buffer layer 23 provides a physical and electronic transition between the silicon carbide substrate 17 and the first n-type cladding layer 11. In many circumstances, the presence of the conductive buffer layer 23 helps ease the physical strain that can result from the lattice differences between the silicon carbide substrate 17 and the first n-type cladding layer 11. Furthermore, to preserve the vertical function of the device, the conductive buffer layer 23 has to be sufficiently conductive to carry the desired or required current to operate the semiconductor device 10. Likewise, the transition layer 24 serves a similar physical and electronic transition.

(45) The ohmic contacts 25 and 26, which complete the advantageous vertical structure of the invention, are preferably formed of a metal such as aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), vanadium (V), alloys, or blends thereof, or sequential layers of two or more of these metals, but also may be formed of other ohmic contact materials known by those skilled in the art provided that they exhibit ohmic character and do not otherwise interfere with the structure or function of the light-emitting device 10.

(46) To the extent that the first ohmic contact 25 is formed to the silicon carbide substrate 17, the invention is distinguished from those devices that employ sapphire. Sapphire cannot be made conductive, and so cannot be connected to an ohmic contact. Consequently, sapphire-based devices cannot be formed into the kinds of vertical structures that are most preferred for LEDs.

(47) Accordingly, in one preferred embodiment the invention is a semiconductor structure for light emitting devices that includes an n-type single crystal silicon carbide substrate 17 of a 3C, 4H, 6H, or 15R polytype; a p-type layer 18 formed of at least one Group III nitride selected from the group consisting of gallium nitride (preferably magnesium-doped gallium nitride), indium nitride, and indium gallium nitride having the formula InxGa1−xN, where 0<x<1; an undoped active layer of AlxInyGa1−x−yN, where 0≦x<1 and 0≦y≦1 and (x+y)≦1; a first n-type cladding layer 11 of AlxInyGa1−x−yN, where 0≦x≦1 and 0≦y≦1 and (x+y)≦1; and a second n-type cladding layer 12 of AlxInyGa1−x−yN, where 0≦x≦1 and 0≦y<1 and (x+y)≦1. Most preferably, the p-type layer 18 comprises a superlattice formed from alternating layers of any two of the aforementioned Group III nitrides.

(48) As disclosed previously, the first n-type cladding layer 11 and the second n-type cladding layer 12 have respective bandgaps that are each larger than the bandgap of the active layer 13. Moreover, the first n-type cladding layer 11 is positioned between the silicon carbide substrate 17 and the active layer 13, the second n-type cladding layer 12 is positioned between the active layer 13 and the p-type layer 18, and the active layer 13 is positioned between the first n-type cladding layer 11 and the second n-type cladding layer 12.

(49) The composition of the first n-type cladding layer 11 can be progressively graded such that the crystal lattice at its first surface 21 more closely matches the crystal lattice of the silicon carbide 17, and the crystal lattice at its second surface 22 more closely matches the crystal lattice of the active layer 13. Similarly, the composition of the second n-type cladding layer 12 can be progressively graded such that the crystal lattice at its second surface more closely matches the crystal lattice of the p-type layer 18. As previously noted, progressively grading across an epitaxial layer embraces both grading in steps and grading continuously (i.e., without steps). Causing the n-type cladding 12 to be substantially lattice matched to the p-type layer 18 reduces the number of interface states at the p-n junction formed between the layers. Because such states may result in nonradiative recombination, reducing the number of such states improves the recombination efficiency, thus improving overall device efficiency in the active layer 13.

(50) Furthermore, and in accordance with the previous descriptions, this preferred structure may also include one or more of the following layers-a third n-type cladding layer 19, the conductive buffer layer 23, the Group III nitride transition layer 24, the discrete crystal portions 28, and the ohmic contacts 25 and 26. In this regard, the conductive buffer layer 23 most preferably is aluminum gallium nitride having the formula AlxGa1−xN, where 0≦x≦1.

(51) FIGS. 8, 9, 10, 11 and 12 are bandgap diagrams of various structures, including embodiments of the present invention. All of the bandgap diagrams 8 through 12 represent the bandgaps under forward bias (i.e. “flat-band” conditions). It will be understood by a skilled person that the bandgap diagrams 8 through 12 are schematic in nature and are not necessarily drawn to scale. While they illustrate important aspects of the invention, it will be understood that the actual band structure may vary slightly from the illustration. In FIGS. 8-12, whenever possible, identical numerical designations will refer to identical portions of the diagrams.

(52) Additionally, it will be understood that although FIGS. 8-12 illustrate a single active layer, the illustrated relationships apply in the same manner when the active portion is the multiple quantum well that is described in more detail later herein.

(53) FIG. 8 is a bandgap diagram of a prior art device showing an n-type gallium nitride clad layer 30, an indium gallium nitride active layer 31, and a p-type aluminum gallium nitride layer 32. In this device, the p-n junction is represented by the dotted line at 33.

(54) With respect to the physical structure of the device and the interface quality between layers, interfaces between identical materials are the easiest to make of high quality. Among the Group III nitrides, the interface between gallium nitride and gallium nitride is the easiest to make of high quality, with the interface between gallium nitride and aluminum gallium nitride being more difficult, but easier than most others. The next-to-worst is the interface between gallium nitride and indium gallium nitride, with the worst interface quality being typically demonstrated between indium gallium nitride and aluminum gallium nitride.

(55) Furthermore, it will be recalled that the disassociation temperature of indium gallium nitride is generally less than all of the other Group III nitrides. Accordingly, once the InGaN active layer—including a multiple quantum well as the active portion—has been grown, the growth temperatures for the remaining layers must be limited to temperatures that avoid undesired disassociation or degradation of the indium gallium nitride layer. Stated differently, if the InGaN active layer or multiple quantum well were absent, the AIGaN and GaN layers could be grown at higher temperatures that are more favorable (all other factors being equal) for higher quality epitaxial layers of these materials.

(56) As a result, at the lower growth temperatures used to grow the aluminum gallium nitride layers that are required to protect the indium gallium nitride layer, the resulting quality of the aluminum gallium nitride layers is somewhat less than it would be if the layers could be grown at a higher temperature.

(57) Accordingly, although ordinarily an AlGaN—AlGaN interface would be considered to make a good homojunction, under the lower growth temperatures required to protect the desired indium gallium nitride active layer of the present invention, the aluminum gallium nitride layers are of poor quality, with the p-type aluminum gallium nitride layers being particularly bad. As a result, for devices that incorporate indium gallium nitride active layers, interfaces and junctions between p-type aluminum gallium nitride and n-type aluminum gallium nitride, are generally of very low quality. Thus the invention's avoidance of such junctions is counterintuitive and produces an unexpectedly better device. Stated differently, prior art devices that incorporate the structure of FIG. 8 require interfaces between Group III nitrides that are difficult to form with high quality.

(58) FIG. 9 illustrates a device described in copending and commonly assigned application Ser. No. 09/154,363 filed Sep. 16, 1998. As in FIG. 8, the n-type gallium nitride layer is designated at 30, the indium gallium nitride active layer is at 31, the p-n junction is at 33, and the p-type aluminum gallium nitride is designated at 32. The device illustrated in FIG. 9, however, also includes an additional n-type gallium nitride clad layer 34 that provides a slightly better interface with the indium gallium nitride active layer 31; i.e. the adjacent GaN—InGaN layer tends to provide the opportunity for a higher quality interface than do adjacent AlGaN—InGaN layers. FIG. 9 also illustrates an n-type aluminum gallium nitride layer 35 between the second gallium nitride layer 34 and the p-type aluminum gallium nitride layer 32. Finally, FIG. 9 includes an additional p-type gallium nitride layer 36 as a top contact layer. This device offers the advantage of having the p-n junction 33 formed between adjacent layers of aluminum gallium nitride, and the GaN layer 34 likewise provides a slightly better interface with the indium gallium nitride active layer 31 than does the AlGaN layer 32 of FIG. 8.

(59) FIG. 10 illustrates the bandgap relationships of the embodiment of the present invention as illustrated in FIG. 1 in which the n-type gallium nitride layer 30 (11 in FIG. 1) is again a clad layer for the indium gallium nitride active layer 31 (13 in FIG. 1). The opposing clad layer 36 is formed of n-type aluminum gallium nitride, and the device is completed with the p-type gallium nitride layer 36, thus defining the p-n junction 33 between the n-type AlGaN layer 35 and the p-type gallium nitride layer 36. This offers the advantage of having the p-n junction at the interface between the n-type aluminum gallium nitride 35 and the p-type gallium nitride 36. As noted above, other than an GaN—GaN junction, the AlGaN—GaN junction is the one most easily formed at the quality required for successful devices.

(60) FIG. 11 illustrates another embodiment of the present invention in which the first clad layer is the n-type gallium nitride layer 30, the active layer is indium gallium nitride 31, and the second clad layer is n-type aluminum gallium nitride 35. This embodiment, however, includes an additional layer of n-type gallium nitride 37 adjacent the n-type aluminum gallium nitride layer 35. As a result the p-n junction is formed between n-type gallium nitride 37 and p-type gallium nitride 36 giving a GaN—GaN interface that provides the highest quality from a structural standpoint.

(61) FIG. 12 illustrates another preferred embodiment in which the n-type gallium nitride layer 30 again forms one clad layer for the indium gallium nitride active layer 31. Similarly, the top contact layer is a p-type gallium nitride layer 36 as in FIGS. 10 and 11. As a clad and transition layer, FIG. 12 includes the portion 40 that is progressively compositionally graded between n-type aluminum gallium nitride at the interface with the InGaN active layer 31 and substantially entirely n-type gallium nitride at the interface with the p-type gallium nitride layer 36. As a result, the p-n junction 33 is again made as a homojunction between the n-GaN portion of the graded layer 40 and the p-GaN layer 36.

(62) The thickness of the layer or layers between the active layer and the p-n junction affects the functionality of the device. Layers that are too thin fail to offer the appropriate confinement, while layers that are too thick allow too much recombination to take place in the thick layer rather than in the active layer as desired. Accordingly, with respect to the embodiment depicted in FIG. 1, clad layer 12 should be between about 30 and 70 Å thick. With respect to the embodiment depicted in FIG. 3, clad layer 12 should be between about 20 and 50 Å thick, and layer 19 should be between about 30 and 50 Å thick. The total thickness of layers 12 and 19 should preferably be no more than about 100 Å. With respect to the efficiency of the devices, one goal is to minimize the nonradiative recombination current (Jnr) while maximizing the radiative combination current (Jr). In this regard, the structure shown in FIG. 8 has the greatest (i.e., least desirable) nonradiative recombination current. The nonradiative recombination current of the device of FIG. 9 is somewhat less than that of FIG. 8, but still greater than the more favorably lower nonradiative recombination current of FIG. 10, 11 or 12.

(63) FIGS. 13 and 14 illustrate in more detail one of the embodiments of the invention in which the active portion is a multiple quantum well (“MQW”) and which incorporates a superlattice as part of the device structure. In general, a superlattice (alternating layers of two different semiconductor materials, each several nanometers thick) can encourage and support good crystal growth and better transitions among the layers of a device. Superlattices can provide strain relief in the cladding layers of Group III nitride photonic devices (e.g. thick AlGaN cladding layers tend to crack) and can also enhance carrier concentration as compared to bulk films. Multiple quantum wells (thin layers of semiconductor within which the potential energy of an electron is less than outside the layer) increase a device's efficiency by progressively collecting carriers. A multiple quantum well structure also provides another method for tuning the output (wavelength and frequency) of a photonic device, typically by controlling the mole fraction of the Group III elements, the dopant concentration, and the thickness of the well and barrier layers.

(64) In FIGS. 13 and 14, an LED structure 45 comprises a substrate 50 which is preferably 4H or 6H n-type silicon carbide. The substrate 50 may also comprise sapphire, bulk gallium nitride or another suitable substrate.

(65) The embodiment illustrated in FIG. 13 includes a layered semiconductor structure comprising gallium nitride-based semiconductor layers grown on the substrate 50. Namely, the embodiment illustrated includes the following layers: a conductive buffer layer 51, a first silicon-doped GaN layer 52, a second silicon doped GaN layer 54, a superlattice structure 56 comprising alternating layers of silicon-doped GaN and/or InGaN, an active region 60 comprising a multi-quantum well structure, an undoped GaN or AlGaN layer 62, an AlGaN layer 64 doped with a p-type impurity, and a GaN contact layer 66, also doped with a p-type impurity. The structure further includes an ohmic contact 70 formed on the n-type substrate 50 and an ohmic contact 72 formed on the p-type contact layer 66.

(66) The buffer layer 51 is preferably n-type AlGaN. Examples of buffer layers between silicon carbide and Group III-nitride materials are provided in commonly assigned U.S. Pat. Nos. 5,393,993 and 5,523,589, and U.S. application Ser. No. 09/154,363 entitled “Vertical Geometry InGaN Light Emitting Diode” assigned to the assignee of the present invention, the disclosures of which are incorporated entirely by reference as if fully set forth herein. The first GaN layer 52 is preferably between about 500 and 3000 nm thick inclusive and is most preferably about 1500 nm thick. The GaN layer 52 is doped with silicon at a level of about 1-2E18 cm.sup.−3 (1−2×10.sup.18 cm.sup.−3) The second GaN layer 54 is preferably between about 10 and 50 Å thick inclusive, and is most preferably about 80 Å thick. The GaN layer 54 is doped with silicon at a level of less than about 1E19 cm.sup.−3.

(67) The superlattice structure 56 comprises alternating layers of In.sub.XGa.sub.1−XN and In.sub.YGa.sub.1−YN, wherein x is between 0 and 1 inclusive and x is not equal to y. Preferably, x=0 (i.e., Indium is absent from such layers), and the thickness of each of the alternating layers of InGaN is about 8-12 Å thick inclusive, while the thickness of each of the alternating layers of GaN is about 15-20 Å thick, inclusive. The superlattice structure 56 comprises about 5-50 periods (where one period equals one repetition each of the In.sub.XGa.sub.1−XN and In.sub.YGa.sub.1−YN layers that comprise the superlattice). In one embodiment, the superlattice structure 56 comprises 25 periods. In another embodiment, the superlattice structure 56 comprises 10 periods.

(68) The active region 60 comprises a multiple-quantum well structure which includes multiple InGaN quantum well layers 74 separated by barrier layers 76. The barrier layers 76 comprise In.sub.XGa.sub.1−XN wherein 0<x<1. Preferably, the indium composition of the barrier layers 76 is less than that of the quantum well layers 74, so that the barrier layers 76 have a higher bandgap than the quantum well layers 74. The barrier layers 76 and the quantum well layers 74 may be undoped (i.e. not intentionally doped with an impurity atom such as silicon or magnesium). If UV emission is desired, it may be preferable to dope the barrier layers 76 with Si at a level less than 1E 19 cm.sup.−3.

(69) In another embodiment, the barrier layers 76 comprise AI.sub.XIn.sub.YGa.sub.(1−X−Y)N where 0<x<1, 0<y<1 and (x+y)<1. By including aluminum in the crystal of the barrier layers 76, the barrier layers 76 may be lattice-matched to the quantum well layers 74, thereby providing improved crystalline quality in the quantum well layers 74, which increases the luminescent efficiency of the device.

(70) Referring to FIG. 14, in one embodiment, the active region 60 comprises a periodically repeating structure 77 comprising a well support layer 76a having high crystal quality, a quantum well layer 74 and a cap layer 76b that serves as a protective cap layer for the quantum well layer 74. When the structure 77 is grown, the cap layer 76b and the well support layer 76a together form the barrier layer between the adjacent quantum wells 74. Preferably, the high quality well support layer 76a is grown at a higher temperature than that used to grow the InGaN quantum well layer 74. For example, in order to achieve a high quality surface for growing the InGaN quantum well layer 74, the well support layer 76a is grown at a growth temperature of between about 750 and 900° C. Then, the temperature of the growth chamber is lowered by about 50° C. to permit growth of a high-quality InGaN quantum well layer 74. Then, while the temperature is kept at the lower InGaN growth temperature, the cap layer 76b is grown. In that manner, a multi-quantum well region comprising high quality InGaN layers may be fabricated.

(71) The active region 60 is preferably grown in a nitrogen atmosphere, which provides increased InGaN crystal quality. The barrier layers 76 are between about 50-400 Å thick inclusive. Preferably, the barrier layers 76 are greater than about 90 Å thick and most preferably are about 225 Å thick. The quantum well layers 74 are between about 15-35 Å thick inclusive. Preferably, the quantum well layers are greater than 20 Å thick and most preferably are about 25 Å thick. As noted earlier, the thickness and percentage of indium in the quantum well layers 74 may be varied to produce light having a desired wavelength.

(72) The layer 62 that is grown on the active region 60 is preferably undoped GaN or AlGaN, and is between about 0 and 50 Å thick inclusive, and more preferably about 35 Å thick. If the layer 62 comprises AlGaN, the aluminum percentage in such layer is preferably about 10-30% and most preferably about 24%. The level of aluminum in the layer 62 may also be graded in a stepwise or continuously decreasing fashion. The layer 62 may be grown at a higher temperature than the growth temperatures for the quantum well region 60 in order to improve the crystal quality of the layer 62. Additional layers of undoped GaN or AlGaN may be included in the vicinity of the layer 62. For example, the LED 45 may include an additional layer of undoped AlGaN about 6-9 Å thick underneath layer 62.

(73) An AlGaN layer 64 doped with a p-type impurity such as magnesium is grown on layer 62. The AlGaN layer 64 is between about 50 and 200 Å thick inclusive and is preferably about 85 Å thick. A contact layer 66 is formed of p-type GaN and is preferably about 1600 Å thick.

(74) Ohmic contacts 70 and 72 are applied to the p-GaN contact layer 66 and the substrate 50, respectively.

(75) Additional information about the growth of multiple quantum wells and superlattices is set forth in previously-incorporated application No. 60/298,835.

(76) In the drawings and the specification, typical embodiments of the invention have been disclosed. Specific terms have been used only in a generic and descriptive sense, and not for purposes of limitation. The scope of the invention is set forth in the following claims.