MRAM having spin hall effect writing and method of making the same

Abstract

A spin-transfer-torque magnetoresistive memory comprises apparatus and method of manufacturing a three terminal magnetoresistive memory element having highly conductive bottom electrodes overlaid on top of a SHE-metal layer in the regions outside of an MTJ stack. The memory cell comprises a bit line positioned adjacent to selected ones of the plurality of magnetoresistive memory elements to supply a reading current across the magnetoresistive element stack and two highly conductive bottom electrodes overlaid and electrically contacting on top of a SHE-metal layer in the outside of an MTJ region and to supply a bi-directional spin Hall effect recording current, and accordingly to switch the magnetization of the recording layer. Thus magnetization of a recording layer can be readily switched or reversed to the direction in accordance with a direction of a current along the SHE-metal layer by applying a low write current.

Claims

1. A method of manufacturing a magnetoresistive memory element comprising: forming of a first select transistor and a second select transistor and having both a first VIA of the first select transistor and a second VIA of the second select transistor exposed on a dielectric substrate surface; a deposition process of a Spin Hall Effect (SHE) metal layer on the dielectric substrate surface connecting to both the first VIA and the second VIA; a deposition process of a magnetic tunnel junction (MTJ) stack on top of the SHE metal layer; and a self-aligned patterning process to pattern the SHE metal layer into a SHE stripe having a first middle region on the dielectric substrate, a first end region connecting the first VIA and a second end region connecting the second VIA, and to pattern the MTJ stack into a MTJ stack pillow on top of the first middle region of the SHE stripe, and to form a first bottom electrode overlaid the first end region of the SHE stripe and a second bottom electrode overlaid the second end region of the SHE stripe; forming of a bit line on top of the MTJ stack pillow.

2. The method of claim 1, said MTJ stack comprising a recording layer, a tunnel barrier layer, a reference layer, and a cap layer, from bottom to top.

3. The method of claim 1, wherein said self-aligned patterning process comprising: a first lithographic patterning process to etch down to the bottom of the MTJ stack and form an MTJ stack stripe having a designed width along a first direction; a deposition process of a conformal film of a first insulating material to cover entire patterned surface; a first ion milling process normal to the substrate surface to etch away the first insulating material on top surface of the cap layer to form a self-aligned mask comprising a remaining top cap layer and sidewall insulating material; a second ion milling process normal to the substrate surface having an end-point detection technique to etch down to top surface of the SHE metal layer; a deposition process of a nonmagnetic metal layer by an ion beam depositing (IBD) process having a deposition normal to the substrate surface; a rotating ion beam etching (IBE) process having a large angle to mill away the nonmagnetic metal layer on side walls; a deposition process of a first interlayer insulating film, and a chemical mechanical polishing (CMP) to flatten upper face of the first interlayer insulating film; a second lithographic patterning process to etch down to said dielectric substrate surface underneath said SHE metal layer and to form an magnetic tunnel junction (MTJ) stack pillow having a designed length normal to the first direction, followed by an O ion or N ion implantation onto the etched surface upon necessity; a deposition process of a second interlayer insulating film, and a chemical mechanical polishing (CMP) to flatten upper face of the second interlayer insulating film.

4. The method of claim 3, further comprising a process including O ion or N ion implantation into the etched surface before said deposition of said conformal film of said first insulating material.

5. The method of claim 1, said SHE metal layer is made of by a high-Z metal selected from the group of Pt, beta-phase Ta, beta-phase W, doped Cu, having a thickness in a range between 1.5 nm and 6 nm.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a cross-section of one memory cell in a three terminal SHE MRAM array having highly conductive electrodes

(2) FIG. 2A is a cross-section of one memory cell in a three terminal SHE MRAM array having a spin Hall effect recording current to reverse the recording layer magnetization to the direction in accordance with a direction of a current along the SHE-metal;

(3) FIG. 2B is a cross-section of one memory cell in a three terminal SHE MRAM array having a reading current flowing across the MTJ stack from the bit line to the bottom SHE-metal;

(4) FIG. 3 is a cross-sectional view illustrating a manufacturing method according to the embodiment;

(5) FIG. 4 is a cross-sectional view illustrating a manufacturing method according to the embodiment;

(6) FIG. 5 is a cross-sectional view illustrating a manufacturing method according to the embodiment;

(7) FIG. 6 is a cross-sectional view illustrating a manufacturing method according to the embodiment;

(8) FIG. 7 is a cross-sectional view illustrating a manufacturing method according to the embodiment;

(9) FIG. 8 is a cross-sectional view illustrating a manufacturing method according to the embodiment;

(10) FIG. 9 is a cross-sectional view illustrating a manufacturing method according to the embodiment;

(11) FIG. 10 is a cross-sectional view illustrating a manufacturing method according to the embodiment;

(12) FIG. 11 is a cross-sectional view illustrating a manufacturing method according to the embodiment;

(13) FIG. 12 is a cross-sectional view illustrating a manufacturing method according to the embodiment.

DETAILED DESCRIPTION OF THE INVENTION

(14) In general, according to each embodiment, there is provided a three terminal magnetoresistive memory cell comprising:

(15) a SHE metal layer provided on a surface of a substrate;

(16) a recording layer provided on the top surface of the SHE layer having magnetic anisotropy in a film plane and having a variable magnetization direction;

(17) a tunnel barrier layer provided on the top surface of the recording layer;

(18) a reference layer provided on the top surface of the tunnel barrier layer having magnetic anisotropy in a film plane and having an invariable magnetization direction;

(19) a cap layer provided on the top surface of the reference layer as an upper electric electrode;

(20) a first bottom electrode provided on a first side of the SHE metal layer and electrically connected to the SHE metal layer;

(21) a second bottom electrode provided on a second side of the SHE metal layer and electrically connected to the SHE metal layer;

(22) a bit line provided on the top surface of the cap layer;

(23) two CMOS transistors coupled the plurality of magnetoresistive memory elements through the two bottom electrodes.

(24) There is further provided circuitry connected to the bit line, and two select transistors of each magnetoresistive memory cell.

(25) Spin Hall effect consists of the appearance of spin accumulation on the lateral surfaces of an electric current-carrying sample, the signs of the spin directions being opposite on the opposing boundaries. When the current direction is reversed, the directions of spin orientation are also reversed. The origin of SHE is in the spin-orbit interaction, which leads to the coupling of spin and charge currents: an electrical current induces a transverse spin current (a flow of spins) and vice versa. In a giant spin Hall effect (GSHE), very large spin currents transverse to the charge current direction in specific high-Z metal (such as Pt, β-Ta, β-W, doped Cu) layer underneath a recording layer may switch the magnetization directions. A polarization ratio in the spin current depends on not only material but also its thickness. Typically, the spin current polarization ratio reached the maximum at a thickness of ˜2 nm. A thin SHE layer made of beta-phase tungsten provides a higher spin polarization ratio and a higher resistivity than Ta or Pt SHE layer.

(26) An exemplary embodiment includes a structure of a three terminal SHE spin-transfer-torque magnetoresistive memory including a bit line positioned adjacent to selected ones of the plurality of magnetoresistive memory elements to supply a reading current across the magnetoresistive element stack and two highly conductive bottom electrodes overlaid and electrically contacting on top of a SHE-metal layer in the outside of an MTJ region and to supply a bi-directional spin Hall effect recording current, and accordingly to switch the magnetization of the recording layer. Thus magnetization of a recording layer can be readily switched or reversed to the direction in accordance with a direction of a current along the SHE-metal layer by applying a low write current.

(27) The present invention further comprises a method of manufacturing a three terminal magnetoresistive memory element having highly conductive bottom electrodes overlaid on top of a SHE-metal layer in the regions outside of an MTJ stack. This is achieved by a process flow consisting of dual photo-lithography patterning, etch, refill and CMP processes.

(28) The following detailed descriptions are merely illustrative in nature and are not intended to limit the embodiments of the subject matter or the application and uses of such embodiments. Any implementation described herein as exemplary is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, brief summary, or the following detailed description.

(29) FIG. 1 is a cross-sectional view of a three terminal magnetoresistive memory cell 10 in a STT-MRAM array having a SHE induced spin transfer switching. The magnetoresistive memory cell 10 is configured by a bit line 19, a cap layer 18, a reference layer 17, a tunnel barrier 16, a recording layer 15, a SHE metal layer 14, a dielectric substrate 13, a bottom electrode 20 and a dielectric layer 21. The recording layer has a uniaxial anisotropy and variable magnetization in a film plane. The reference layer has a fixed magnetization in a film plane. The reference layer can be a synthetic anti-ferromagnetic structure having a nonmagnetic metal layer sandwiched by two ferromagnetic layers which have an anti-parallel coupling. Further, an anti-ferromagnetic (AFM) pinning layer can be added on top of the reference layer to fix the reference layer magnetization direction.

(30) FIGS. 2A and 2B show magnetoresistive element 50 illustrating the methods of operating a spin-transfer-torque magnetoresistive memory: a SHE spin transfer current driven recording and a MTJ reading, respectively. A circuitry, which is not shown here, is coupled to two select transistors for providing a bi-directional current in the SHE metal layer between a first bottom electrode and a second electrode and is coupled to the bit line for providing a reading current across the MTJ stack between the bit line and the bottom electrodes connecting to the select transistors. The magnetoresistive element 50 comprises: a bit line 17, an MTJ stack comprising a cap layer 16, a reference layer 15, a tunnel barrier 14 and a recording layer 13, a SHE metal layer 19, a first bottom electrode 18, a first VIA 20 of a first select transistor, a second bottom electrode 12, a second VIA 21 of a second select transistor. The SHE metal layer is made by a high-Z metal, such as Pt, β-Ta, β-W, doped Cu, having a thickness in a range between 1.5 nm and 6 nm.

(31) During fabrication of the MRAM array architecture, each succeeding layer is deposited or otherwise formed in sequence and each magnetoresistive element may be defined by selective deposition, photolithography processing, etching, CMP, etc. using any of the techniques known in the semiconductor industry. Typically the layers of the MTJ stack are formed by thin-film deposition techniques such as physical vapor deposition, including magnetron sputtering and ion beam deposition, or thermal evaporation. In addition, the MTJ stack is typically annealed at elevated temperature to achieve a high magnetoresistive ratio and a desired crystal structure and interface.

(32) Referring now to FIGS. 3 through 12, a method of manufacturing a magnetoresistive element in a three terminal SHE spin transfer MRAM array according to the embodiment is described. The magnetoresistive element to be manufactured by the manufacturing method according to this embodiment is the magnetoresistive element 10 of FIG. 1.

(33) First, as shown in FIG. 3, a magnetoresistive element includes a SHE metal layer 14, a recording layer 15, a tunnel barrier layer 16, a reference layer or reference multilayered stack 17, and a cap layer 18 as a hard mask layer, which are sequentially formed on the substrate 13 by sputtering techniques.

(34) An example of the material of a recording layer is made of a ferromagnetic material alloy containing at least one element selected from Fe, Co and Ni. A recording layer can also be a multilayer such as M1/X/M2 or M1/X/M2/Y/M3, M(1,2,3) are ferromagnetic sub-layers, and X and Y are insertion sub-layers selected from Ta, Ti, Hf, Nb, V, W, Mo, Zr, Ir, Si, Ru, Al, Cu, Ag, Au, etc., or their oxide, nitride, oxynitride layer, for example. An example of a reference multi-layered stack is made of PtMn(30 nm)/CoFe(2 nm)/Ru(0.75 nm)/CoFe(2 nm).

(35) An MTJ stack patterning is then performed by using a known dual-photo lithography patterning technique. This dual-photo lithography patterning process flow consists of a first photo-lithography patterning process, in which the MTJ stack is patterned into a longitudinal shape having a designed width and a much longer length than designed value along a first direction, and a second photo-lithography patterning process in which the MTJ stack is patterned to have final dimensions.

(36) First, a mask (not shown) made of a photoresist is formed on the hard mask layer 18. Using the mask, patterning is performed on the hard mask layer 18 and down to bottom of the recording layer 14 or top surface of the SHE metal layer by ion beam etching (IBE) etching by using end-point detection scheme, as shown in FIG. 4.

(37) Since possible re-deposition of metal atoms on the MTJ side wall could be formed, it's preferred to conduct a sputter etching at varied angle to remove these materials from tunnel barrier layer edges. It should be noted that any residual material from the recording layer may be further oxidized to avoid possible current crowding induced MTJ resistance variation. An optional process includes O ion or N ion implantation into the etched surface.

(38) As shown in FIG. 5, a conformal insulating film 118 is then formed by a deposition technique, such as atomic layer deposition (ALD) with a uniform thickness to cover the surface of the patterned film consisting of the recording layer 15, tunnel barrier layer 16, the reference layer 17, and the hard mask layer 18.

(39) Further a perpendicular ion milling process having ion beam normal to the substrate surface and having an end-point detection scheme is conducted to etch down to the top surface of the SHE metal layer, as shown in FIG. 6.

(40) A nonmagnetic metal layer is then deposited by an ion beam depositing (IBD) process having a deposition direction which is normal to the substrate surface, as shown in FIG. 7, to form a non-uniform metal covering layer: side wall thickness is much thinner than the thickness at flat region. A rotating IBE process having a large angle is then conducted to mill away the side wall metal layer, as shown in FIG. 8, and leaving a metal layer at flat region as bottom electrodes connected to select transistors through VIAs. A further oxidization to avoid possible current crowding induced MTJ resistance variation can be added as an optional process including O ion or N ion implantation into the etched surface.

(41) After that, an interlayer insulating film 119 is deposited to cover the entire surface, as shown in FIG. 9. The top surface is then flattened by conducting a CMP process to expose a surface of the top surface of the MTJ film, as shown in FIG. 10.

(42) Then, a second mask 120 made of a photoresist is formed on the CMP flatten surface along a perpendicular direction to the orientation of the first mask. The top view of the second mask is shown in FIG. 11. Using the mask, patterning is performed and down to bottom of the SHE metal layer 14 by IBE etching. Both the width of the SHE metal layer and the length of the MTJ stack are shown as a top view in FIG. 12.

(43) Finally, a bit line to be electrically connected to the MTJ stack is formed on the magnetoresistive element 30. The bit line may be made of aluminum (Al) or copper (Cu), for example. Thus, a memory cell of the MRAM is formed by the manufacturing method according to this embodiment.

(44) While certain embodiments have been described above, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.