PRINTED CIRCUIT BOARD CIRCUIT TEST FIXTURE WITH ADJUSTABLE DENSITY OF TEST PROBES MOUNTED THEREON

Abstract

A printed circuit board (PCB) test fixture includes a substrate, a first insulation layer formed on the substrate, a conductor layer formed on the first insulation layer and electrically connected to the upper electrodes through at least one first connection member, a second insulation layer formed on the first insulation layer, and multiple conductive cones arranged on the second insulation layer in a matrix form. A part of the conductive cones is electrically connected to the conductor layer through at least one second connection member. The circuit layout of the conductor layer, the at least one first connection member and the at least one second connection member is employed to supply testing power to a part of the conductive cones and an adjustable arrangement of the conductive cones to enhance density of test probes upon electrical testing.

Claims

1. A printed circuit board (PCB) test fixture with adjustable density of test probes mounted thereon, comprising: a substrate having a lower surface and an upper surface; multiple lower electrodes formed on the lower surface of the substrate; multiple upper electrodes formed on the upper surface of the substrate and electrically connected to the respective lower electrodes; a first insulation layer formed on the upper surface of the substrate and having at least one first connection member electrically connected to corresponding upper electrodes; a conductor layer formed on the first insulation layer and electrically connected to the at least one first connection member and the corresponding upper electrodes; a second insulation layer formed on the first insulation layer and having at least one second connection member electrically connected to the conductor layer; and multiple conductive cones formed on the second insulation layer and adapted to electrically contact a PCB to be tested, wherein a part of the multiple conductive cones is electrically connected to the respective at least one second connection member.

2. The PCB test fixture as claimed in claim 1, wherein each conductive cone has: a conducting layer being conical; a strengthening layer formed around a periphery of the conducting layer to enclose the conducting layer; and an anti-oxidant layer formed around a periphery of the strengthening layer to enclose the strengthening layer and the conducting layer therein.

3. The PCB test fixture as claimed in claim 2, wherein the conducting layer is made from one of copper and a copper alloy.

4. The PCB test fixture as claimed in claim 2, wherein the strengthening layer is made from one of nickel, cobalt, tungsten and an alloy thereof.

5. The PCB test fixture as claimed in claim 2, wherein the anti-oxidant layer is made from one of gold, tin and an alloy thereof.

6. The PCB test fixture as claimed in claim 1, wherein the substrate is a ceramic substrate.

7. The PCB test fixture as claimed in claim 2, wherein the substrate is a ceramic substrate.

8. The PCB test fixture as claimed in claim 3, wherein the substrate is a ceramic substrate.

9. The PCB test fixture as claimed in claim 4, wherein the substrate is a ceramic substrate.

10. The PCB test fixture as claimed in claim 5, wherein the substrate is a ceramic substrate.

11. The PCB test fixture as claimed in claim 1, further comprising multiple surface electrodes formed on the second insulation layer, wherein a part of the multiple surface electrodes is connected to the respective at least one second connection member, and the multiple conductive cones are mounted on the respective surface electrodes.

12. The PCB test fixture as claimed in claim 2, further comprising multiple surface electrodes formed on the second insulation layer, wherein a part of the multiple surface electrodes is connected to the respective at least one second connection member, and the multiple conductive cones are mounted on the respective surface electrodes.

13. The PCB test fixture as claimed in claim 3, further comprising multiple surface electrodes formed on the second insulation layer, wherein a part of the multiple surface electrodes is connected to the respective at least one second connection member, and the multiple conductive cones are mounted on the respective surface electrodes.

14. The PCB test fixture as claimed in claim 4, further comprising multiple surface electrodes formed on the second insulation layer, wherein a part of the multiple surface electrodes is connected to the respective at least one second connection member, and the multiple conductive cones are mounted on the respective surface electrodes.

15. The PCB test fixture as claimed in claim 5, further comprising multiple surface electrodes formed on the second insulation layer, wherein a part of the multiple surface electrodes is connected to the respective at least one second connection member, and the multiple conductive cones are mounted on the respective surface electrodes.

16. The PCB test fixture as claimed in claim 11, further comprising multiple connection electrodes formed on the first insulation layer, wherein a part of the multiple connection electrodes is electrically connected to the respective at least one first connection member for the conductor layer and the part of the multiple connection electrodes to be electrically connected to a part of the multiple upper electrodes through the respective at least one first connection member.

17. The PCB test fixture as claimed in claim 12, further comprising multiple connection electrodes formed on the first insulation layer, wherein a part of the multiple connection electrodes is electrically connected to the respective at least one first connection member for the conductor layer and the part of the multiple connection electrodes to be electrically connected to a part of the multiple upper electrodes through the respective at least one first connection member.

18. The PCB test fixture as claimed in claim 13, further comprising multiple connection electrodes formed on the first insulation layer, wherein a part of the multiple connection electrodes is electrically connected to the respective at least one first connection member for the conductor layer and the part of the multiple connection electrodes to be electrically connected to a part of the multiple upper electrodes through the respective at least one first connection member.

19. The PCB test fixture as claimed in claim 14, further comprising multiple connection electrodes formed on the first insulation layer, wherein a part of the multiple connection electrodes is electrically connected to the respective at least one first connection member for the conductor layer and the part of the multiple connection electrodes to be electrically connected to a part of the multiple upper electrodes through the respective at least one first connection member.

20. The PCB test fixture as claimed in claim 15, further comprising multiple connection electrodes formed on the first insulation layer, wherein a part of the multiple connection electrodes is electrically connected to the respective at least one first connection member for the conductor layer and the part of the multiple connection electrodes to be electrically connected to a part of the multiple upper electrodes through the respective at least one first connection member.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0020] FIG. 1 is a cross-sectional side view of a PCB test fixture with adjustable density of test probes mounted thereon in accordance with the present invention;

[0021] FIG. 2 is a perspective view of the PCB test fixture in FIG. 1;

[0022] FIG. 3 is an enlarged cross-sectional side view of a conductive cone of the PCB test fixture in FIG. 2;

[0023] FIG. 4 is a partially cross-sectional operational side view of the PCB test fixture upon electrical testing;

[0024] FIG. 5 is a cross-sectional side view of a conventional PCB test fixture;

[0025] FIG. 6A is a cross-sectional side view of another conventional PCB test fixture; and

[0026] FIG. 6B is a cross-sectional operational side view of the conventional PCB test fixture in FIG. 6A.

DETAILED DESCRIPTION OF THE INVENTION

[0027] With reference to FIGS. 1 and 2, a PCB (Printed Circuit Board) test fixture with adjustable density of test probes mounted thereon in accordance with the present invention includes a substrate 10, multiple lower electrodes 21, multiple upper electrodes 22, a first insulation layer 30, a conductor layer 23, multiple connection electrodes 24, a second insulation layer 40, multiple surface electrodes 25 and multiple conductive cones 50.

[0028] The substrate 10 is a ceramic substrate and has an upper surface 12, a lower surface 11 and multiple conducting members 13. The lower surface 12 is opposite to the upper surface 11.

[0029] The lower electrodes 21 are formed on the lower surface 11 of the substrate 10 and are arranged in the form of a matrix and are spaced apart from each other. The upper electrodes 22 are formed on the upper surface 12 of the substrate 10 and are aligned to vertically correspond to the respective lower electrodes 21. Each conducting member 13 is mounted through the substrate 10 with two ends thereof electrically connected to the lower electrode 21 and the upper electrode 22 adjacent thereto.

[0030] The first insulation layer 30 is formed on the upper surface 12 and the multiple upper electrodes 22 and has a first insulation surface 31, at least one first via 32 and at least one first connection member 33. The first insulation surface 31 is defined as a top surface of the first insulation layer 30. The at least one first via 32 is formed through the first insulation layer 30 and is aligned to respectively adjoin corresponding upper electrode(s) 22. The at least one connection member 33 is respectively inserted into the at least one first via 32 and is electrically connected to the respective upper electrode(s) 22.

[0031] The conductor layer 23 and the multiple connection electrodes 24 are formed on the first insulation surface 31. The conductor layer 23 is electrically connected to the multiple connection electrodes 24. The multiple connection electrodes 24 and the multiple upper electrodes 22 are vertically aligned with each other. A part of the multiple connection electrodes 24 is electrically connected to the respective at least one first connection member 33 for the conductor layer 23 and the part of the multiple connection electrodes 24 to be electrically connected to a part of the multiple upper electrodes 22 through the respective at least one first connection member 33. The second insulation layer 40 is formed on the first insulation surface 31, the conductor layer 23 and the multiple connection electrodes 24 and has a second insulation surface 41, at least one second via 42 and at least one second connection member 43. The second insulation surface 41 is defined as a top surface of the second insulation layer 40. The at least one second via 42 is formed through the second insulation layer 40 and is aligned to adjoin a part of the multiple connection electrodes 24. The at least one second connection member 43 is respectively inserted into the at least one second via 42 and is electrically connected to the part of the multiple connection electrodes 24.

[0032] The multiple surface electrodes 25 are formed on the second insulation surface 41 and are vertically aligned with the respective connection electrodes 24. A part of the multiple surface electrodes 25 is electrically connected to the part of the multiple connection electrodes 24 through the respective at least one second connection member 43.

[0033] The multiple conductive cones 50 are formed on and electrically connected to the respective surface electrodes 25. Each conductive cone 50 progressively decreases in diameter in an upward direction perpendicular to the second insulation surface 41. With reference to FIG. 3, each conductive cone 50 has a conducting layer 51, a strengthening layer 52 and an anti-oxidant layer 53. The conducting layer 51 is conical. The strengthening layer 52 is formed around a periphery of the conducting layer 51 to enclose the conducting layer 51. The strengthening layer 52 is higher than the conducting layer 51 in hardness to increase strength of the conductive cones 50, such that the conductive cones 50 possess sufficient strength to support a PCB to be tested. The anti-oxidant layer 53 is formed around a periphery of the strengthening layer 52 to enclose the strengthening layer 52 and the conducting layer 51 therein. As the conductive cones 50 serve to electrically connect points to be tested on a PCB, to prevent conductivity of the conductive cones 50 from dropping because of oxidation, the anti-oxidant layer 53 serves to prevent the conducting layer 51 from being oxidized with external air surrounding the conductive cones 50.

[0034] The conducting layer 51 may be made from copper or a copper alloy. The strengthening layer 52 may be made from nickel, cobalt, tungsten or an alloy thereof. The anti-oxidant layer 53 may be made from gold, tin or an alloy thereof. In the present embodiment, the strengthening layer 52 may be an alloy of nickel and cobalt or an alloy of nickel and tungsten. A nickel-containing portion of the alloy of nickel and cobalt or the alloy of nickel and tungsten is in a range of 95% to 97%.

[0035] With reference to FIG. 4, when the PCB test fixture is used to perform electrical testing of a PCB to be tested 60, the PCB test fixture is mounted to a testing device and is connected to a conducting board or multiple wires on the testing device, and the PCB to be tested 60 is placed on the conductive cones 50 for test points 61 (or electrodes) of the PCB 60 to be in contact with the conductive cones 50. The testing device employs the conducting board or the wires to transmit power to the lower electrodes 21 of the PCB test fixture to supply power to the PCB test fixture. The PCB test fixture further adopts a circuit layout of the conductor layer 23, the at least one first connection member 33 and the at least one second connection member 43 to selectively transmit the power of the testing device to the conducting cones 50 in contact with the test points 61 for performing electrical testing or circuit testing on the PCB 60. In response to locations of test points 61 varying from PCB to PCB, the circuit layout in association with the conductor layer 23, the at least one first connection member 33 and the at least one second connection member 43 may be altered to adjust current-flowing paths so as to control power to be transmitted to desired conductive cones 50. Thus, the circuit layout of the conductor layer 23, the at least one first connection member 33 and the at least one second connection member 43 should match with the test points 61 of the PCB to be tested 60.

[0036] The PCB test fixture in accordance with the present invention may be produced by current PCB fabrication processes and the circuit layout of the conductor layer 23, the at least one first connection member 33 and the at least one second connection member 43 is formed to correspond to the electrodes 61 of the PCB to be tested 60. Accordingly, PCB suppliers can complete and obtain the PCB test fixture using currently available materials, rendering the electrical testing of PCB easy.

[0037] The present invention eliminates the use of conventional stretchable probes in connection with test points 61 of the PCB to be tested 60, and the density of test probes is therefore not subject to the limitation of the distance between conventional stretchable probes. However, care should be taken to avoid electrical contact with the surface electrodes 25 underneath the conductive cones 50 of the PCB test fixture. The layout of the conductive cones 50 can be arranged at a high density. The minimum distance between the conductive cones 50 can be made to be the same as that formed by current PCB industry without any chance that the distance between the test points 61 of the PCB to be tested 60 is less than the distance between the conductive cones 50.

[0038] In sum, the PCB test fixture in accordance with the present invention employs the circuit layout of the conductor layer, the at least one first connection member and the at least one second connection member to transmit power to the conductive cones in connection with the test points on the PCB to be tested. Because the conductive cones can be arranged at a high density, higher density of test probes can be acquired upon the use of the PCB test fixture for electrical testing. As can be completed by current PCB fabrication processes, the PCB test fixture can be made in a simpler way. Moreover, upon using the PCB test fixture for electrical testing, electrical testing efficiency increases and material cost for electrical testing decreases because no additional device is required and no probe replacement is necessary. Even though trace width and trace of PCB made by current PCB industry become finer and finer and thinner and thinner, the technique of the PCB test fixture is synchronous with current PCB fabrication technique. As such, the density of test probes in accordance with the present invention can keep abreast of the technique of PCB industry, thereby resolving the issue of insufficient density of conventional stretchable probes upon electrical testing.

[0039] Even though numerous characteristics and advantages of the present invention have been set forth in the foregoing description, together with details of the structure and function of the invention, the disclosure is illustrative only. Changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.