Semiconductor device and fabrication method

Abstract

A semiconductor device comprising a silicon substrate on which is grown a <100 nm thick epilayer of AlAs or related compound, followed by a compound semiconductor other than GaN buffer layer. Further III-V compound semiconductor structures can be epitaxially grown on top. The AlAs epilayer reduces the formation and propagation of defects from the interface with the silicon, and so can improve the performance of an active structure grown on top.

Claims

1. A semiconductor laser device comprising: a silicon substrate; an epilayer formed on the substrate; a dot-in-well (DWELL) structure comprising multiple layers, each of the multiple layers comprising GaAs and an InGaAs alloy; and at least one layer of III-V compound, other than GaN, on the epilayer, wherein the epilayer comprises a compound of the formula:
Al.sub.1−x[X].sub.xAs wherein: X is at least one group III element other than Al; x is greater than or equal to 0; and x is less than or equal to 0.5.

2. The semiconductor laser device of claim 1, wherein the mean thickness of the epilayer is less than 100 nm.

3. The semiconductor laser device of claim 1, wherein the mean thickness of the epilayer is less than 20 nm.

4. The semiconductor laser device of claim 1, wherein the mean thickness of the epilayer is less than 10 nm.

5. The semiconductor laser device of claim 1, wherein a first of the III-V compound layers on the epilayer is one of a GaAs layer, an InP layer or a GaSb layer.

6. The semiconductor laser device of claim 1, wherein X is Ga.

7. The semiconductor laser device of claim 1, wherein the epilayer is AlAs.

8. The semiconductor laser device of claim 1, wherein the III-V compound layer has a zinc blende crystal structure.

9. A quantum dot laser comprising: a semiconductor laser device comprising: a silicon substrate; an epilayer formed on the silicon substrate; and at least one layer of III-V compound, other than GaN, on the epilayer, wherein the epilayer comprises a compound of the formula:
Al.sub.1−x[X].sub.xAs wherein: X is at least one group III element other than Al; x is greater than or equal to 0; and x is less than or equal to 0.5.

10. The quantum dot laser of claim 9, wherein the lasing wavelength is in the range of from 1250 nm to 1350 nm.

11. The quantum dot laser of claim 9, comprising InAs/GaAs quantum dot structures.

12. The quantum dot laser of claim 9, wherein the mean thickness of the epilayer is less than 10 nm.

13. The quantum dot laser of claim 9, wherein X is Ga.

14. The quantum dot laser of claim 9, wherein the epilayer is AlAs.

15. The quantum dot laser of claim 9, wherein the at least one layer of III-V compound has a zinc blende crystal structure.

16. A method of fabricating a semiconductor laser device, said method comprising: providing a silicon substrate; epitaxially growing an epilayer on the substrate; growing a dot-in-well (DWELL) structure by growing multiple layers, each of the multiple layers comprising GaAs and an InGaAs alloy; and epitaxially growing at least one layer of III-V compound, other than GaN, on the epilayer, wherein the epilayer comprises a compound of the formula:
Al.sub.1−x[X].sub.xAs wherein: X is at least one group III element other than Al; x is greater than or equal to 0; and x is less than or equal to 0.5.

17. The method of claim 16, comprising growing the epilayer to have a mean thickness of less than 100 nm.

18. The method of claim 16, comprising growing the epilayer at a temperature below 500° C.

19. The method to of claim 16, wherein the epilayer is AlAs.

20. The semiconductor laser device of claim 1, wherein the epilayer has a mean thickness of at least 2.5 nm.

21. The quantum dot laser of claim 9, wherein the epilayer of the semiconductor laser device has a mean thickness of at least 2.5 nm.

22. The method of claim 16, wherein the epilayer is epitaxially grown to have a mean thickness of at least 2.5 nm.

23. The quantum dot laser of claim 9, wherein the lasing wavelength is in the range of from 1100 nm to 1350 nm.

Description

(1) Embodiments of the invention will now be described, by way of example only, with reference to the accompanying drawings in which:

(2) FIGS. 1(a) and 1(b) are cross-sectional TEM images of the GaAs/Si interface region with (a) the GaAs nucleation layer as a comparative example and (b) the AlAs nucleation layer according to an embodiment of the invention, respectively;

(3) FIGS. 2(a) and 2(b) show AFM (atomic force microscope) images of the surface morphology of (a) a 5 nm GaAs nucleation layer as a comparative example and (b) a 5 nm AlAs nucleation layer according to an embodiment of the invention, respectively;

(4) FIG. 3(a) shows photoluminescence spectra, and an inset AFM image, for quantum dot structures, and FIG. 3(b) shows Arrhenius plots of the temperature dependence of integrated photoluminescence intensity for the quantum dot structure;

(5) FIG. 4 illustrates schematically the layer structure for an InAs quantum-dot laser diode; and

(6) FIGS. 5(a) and 5(b) show plots of light output power against current for quantum dot laser diodes, with 5(a) being at room temperature and 5(b) showing results for a range of substrate temperatures, the inset to 5(a) shows the laser optical spectrum above threshold current at room temperature.

(7) In one exemplary embodiment of the present invention, an AlAs layer is introduced for the epitaxial growth of a GaAs buffer layer on an Si substrate. The AlAs layer is also referred to herein as a nucleation layer (NL) or simply as an epilayer because it is epitaxially grown on the substrate. All the samples were grown on phosphorus-doped (100)-oriented Si substrates with 4° offcut toward the planes by solid-source molecular beam epitaxy although other orientations could be used. III-V buffer layers on Si substrates were initiated with either a 5-nm AlAs NL or a 5-nm GaAs NL (as a comparative example), followed by a 1-μm GaAs buffer layer. The use of an AlAs NL enables more defects to be confined in the interface between the III-V epitaxial layer and the Si substrate in order to relax the strain, and also less defects to propagate into the III-V active region, leading to an increase in the RT photoluminescence intensity for Si-based InAs/GaAs QDs. A 5-layer InAs/InGaAs dot-in-a-well (DWELL) laser structure on a Si substrate was fabricated with the use of an AlAs NL. RT lasing occurs at ˜1.29 μm with J.sub.th of 650 A/cm.sup.2, which is lower than previously reported values for Si-based InGaAs QD lasers with a GaAs NL.

(8) The structural properties of the buffer layer for the sample with the AlAs NL are compared with those with the GaAs NL using transmission electron microscope (TEM), atomic force microscope (AFM), and etch-pit density (EPD) measurements. FIG. 1 shows the TEM images of the III-V/Si interface for the samples with the AlAs NL (FIG. 1(b)) and with the GaAs NL (FIG. 1(a)). The defects are generated at the III-V/Si interface due to the mismatch between Ga(Al)As and Si, as shown in both images of FIG. 1. While most defects are well confined in the interface region, some of the TDs propagate into the GaAs buffer layers for both samples. In comparison with the sample with the GaAs NL (FIG. 1(a)), the sample with the AlAs NL has more defects confined in the interface region with less defects propagating into the GaAs buffer (FIG. 1(b)). This result clearly suggests that the mechanism of defect formation and propagation for the AlAs NL on a Si substrate is different from that for the GaAs NL. To understand the effects of the AlAs NL, AFM measurements were performed to study the morphologies of both the AlAs and GaAs NLs. For the AFM measurements, the growth was terminated immediately after the deposition of a 5-nm AlAs layer or a 5-nm GaAs layer on Si substrates, followed by sample cool-down. The 1 μm×1 μm AFM images for the samples with the GaAs NL and the AlAs NL are shown in FIGS. 2(a) and 2(b), respectively. For the sample with the GaAs NL, GaAs dots are observed with a density of over 5×10.sup.10/cm.sup.2 (FIG. 2(a)). The height and width of the GaAs dots are about 4 nm and 20 nm, respectively. These indicate that the strain energy of 5-nm GaAs NL grown on a Si substrate is relaxed by the formation of coherent islands, which is similar to the In(Ga)As/GaAs system. The increase in strain by further depositing GaAs will eventually lead to the coalescence of coherent GaAs dots, and hence the formation of TDs propagating within the GaAs buffer layers, as observed in the In(Ga)As/GaAs system. In contrast, a lower density of ˜4×10.sup.9/cm2 was obtained for AlAs dots grown on a Si substrate, with an irregular shape and larger average height and width of about 20 nm and 80 nm (FIG. 2(b)). The shape and size of AlAs dots indicate that the AlAs dots are defective. This suggests that the strain energy of 5-nm AlAs NL grown on a Si substrate is relaxed by the formation of both defects at the AlAs/Si interface and defective AlAs dots. Therefore, in comparison with the sample with the GaAs NL, more defects are confined at the III-V/Si interface and less defects propagating into the GaAs buffer layer are observed for the sample with the AlAs NL, as observed in FIG. 1. The defect density in the III-V active region was estimated by EPD tests for both the sample with the AlAs NL and the one with the GaAs NL. The etchant used for the EPD delineation is a mixture of H.sub.3PO.sub.4, H.sub.2O.sub.2, and H.sub.2O (in a 1:1:3 ratio). The defect densities of ˜3×10.sup.6/cm.sup.2 and ˜6×10.sup.6/cm.sup.2 were obtained for the samples with the AlAs NL and the one with the GaAs NL, respectively.

(9) Next, an InAs/InGaAs dot-in-a-well (DWELL) structure was fabricated on the III-V buffer layers with the use of AlAs or GaAs NLs. III-V buffer layers consist of the following layer sequence: AlAs NL, GaAs buffer layer, InGaAs/GaAs dislocation filter layer, and GaAs/AlGaAs superlattice layers, and are described in the detailed methods section. The inset of FIG. 3(a) shows the 1×1 μm.sup.2 AFM image of the uncapped InAs QDs for the sample with the AlAs NL, from which a QD density of about 4.3×10.sup.10 cm.sup.−2 is obtained. The main part of FIG. 3(a) shows the RT photoluminescence (PL) spectra of InAs/GaAs QDs on Si substrates with the GaAs and AlAs NL, respectively. The InAs/GaAs QDs yield a RT emission at ˜1.29 μm with a full width at half maximum (FWHM) of ˜30 meV for both of the samples shown in FIG. 3(a). Of considerable significance is that the RT integrated PL intensity (IPLI) of the sample with the AlAs NL is about 40% higher than that with the GaAs NL. It should be mentioned that the sample with the GaAs NL was grown under the same optimised growth conditions as the QD laser diode which led to the first electrically pumped 1.3-μm InAs/GaAs QD laser monolithically grown on Si substrates. The IPLI over the temperature range 10-300 K was studied for these two samples, as shown in FIG. 3(b). Thermal activation energies of about 260 meV are indicated by the slopes of the lines at high temperatures for both of the samples, and are close to the energy difference between the QD ground state and the InGaAs quantum well in the InAs/InGaAs DWELL structure (such as ˜290 meV). In general, the reduction in the IPLIs of InAs/GaAs QDs at high temperature (>200 K) is attributed to the thermal escape of carriers from InAs QD ground states into InGaAs QWs followed by non-radiative recombination in the barriers. Therefore, the enhancement of IPLI for the sample with the AlAs NL could be understood as the reduced density of TDs propagating into the InAs/InGaAs DWELL region, as confirmed by the TEM results shown in FIG. 1 and EPD measurements.

(10) Si-based InAs/GaAs QD laser diodes were investigated with the incorporation of the AlAs NL. The laser structure was grown on a phosphorus-doped Si substrate and is illustrated in FIG. 4. III-V buffer layers are the same as those used for studying the effects of the AlAs NL. The 5-layer InAs/InGaAs DWELL active region was grown at the center of an undoped 150-nm GaAs/AlGaAs waveguide layer with an n-type lower and a p-type upper cladding layer consisting of 1.5-μm AlGaAs. A 300-nm p.sup.+-GaAs contact layer completed the growth. Broad-area laser diodes, with a width of 50 μm, were fabricated by standard photolithography, wet etching, and metallisation techniques. Laser characteristics were measured in pulsed mode using a pulse width of 0.1 μs and duty cycle of 0.01%. The output spectrum at the above threshold current is shown in the inset of FIG. 5(a), demonstrating RT lasing at 1.286 μm. The main part of FIG. 5(a) shows the RT light output against drive current (L-I) characteristic for the device with a cavity length of 3.5 mm. The RT J.sub.th is about 650 A/cm.sup.2, which is much lower than previously reported values of III-V QD lasers monolithically grown on Si substrates, such as 900 A/cm.sup.2 for a 1.02-μm QD device and 725 A/cm.sup.2 for a 1.3-μm QD laser. FIG. 5(b) shows L-I curves for a device with 3-mm length at various temperatures. This QD laser has a 63° C. maximum lasing temperature with a characteristic temperature T.sub.0 of ˜40K between 18 and 63° C., which is comparable to the values of 1.3-μm InAs/GaAs QD lasers grown on GaAs substrates.

(11) These results have demonstrated the use of an AlAs nucleation layer on Si substrates to reduce the density of threading dislocations, generated at the III-V/Si interface, propagating into the InAs/GaAs QD active region, and hence increases in the RT PL intensity of 1.3-μm InAs/GaAs QDs grown on it. By incorporating the AlAs nucleation layer, RT lasing at 1.29 μm has been demonstrated for InAs/GaAs QD lasers monolithically grown on Si substrates with RT J.sub.th of 650 A/cm.sup.2 and operation up to 63° C., values which are better than conventional values for 1.3-μm InAs/GaAs QD devices monolithically grown on Si substrates with a GaAs nucleation layer.

(12) Detailed Methods

(13) Crystal growth: The epitaxial materials were fabricated by solid-source III-V molecular beam epitaxy. InAs/GaAs QD samples were grown on phosphorus-doped (100)-oriented Si substrates with a 4° offcut toward the planes. The oxide desorption was performed by holding the Si substrate at a temperature of 900° C. for 10 minutes. The Si substrate was then cooled down to 400° C. for the growth of a 5-nm GaAs or an 5-nm AlAs NL, and a further 25 nm GaAs layer, followed by a 1-μm thick GaAs buffer layer grown at high temperature. Multilayer InGaAs/GaAs dislocation filter layers, consisting of two repeats of a five-period (10-nm In.sub.0.15Ga.sub.0.85As/10-nm GaAs) superlattices (SPL) and 350-nm GaAs, were deposited on the GaAs buffer layer. Finally 160-nm SPL layers of alternating 2-nm GaAs/2-nm Al.sub.0.4Ga.sub.0.6As layer completed the III-V buffer layers. A five-layer InAs/InGaAs dot-in-a-well (DWELL) structure was then grown at optimised conditions as on GaAs substrates, with each layer consisting of 3.0 MLs of InAs grown on 2 nm of In.sub.0.15Ga.sub.0.85As and capped by 6 nm of In.sub.0.15Ga.sub.0.85As at ˜510° C. 45-nm GaAs barriers separated the five DWELLs. The InAs/GaAs DWELL structure was then embedded between 100-nm GaAs layer grown at 580° C. for GaAs, which was further confined by two 50-nm AlGaAs layers grown at 600° C. to prevent the photogenerated charge carriers from migrating to the substrate or surface at high temperatures.

(14) Measurements: AFM measurements were performed with a Nanoscope Dimension™ 3100 SPM AFM system in ambient conditions using a noncontact mode. Photoluminescence measurements were performed in a close-cycle He cryostat under 532 nm excitation from a diode-pumped solid-state laser. The PL spectra were dispersed by a 0.25 m monochromator and detected by a TE-cooled Ge detector. Temperature dependent PL measurements were taken from 10 to 300 K at a laser power of 30 mW.

(15) Other Embodiments

(16) Although an AlAs NL has been described above, there may be a proportion of other elements present in the NL, such as Ga or In, either in residual amounts or, for example in compounds of the form Al.sub.1−x[X].sub.xAs, where X is one or more group III element other than Al, x is less than or equal to 0.5, and x is greater than or equal to 0. A specific example would be where X is Ga. In one example x is 0.25, so the NL compound is Al.sub.0.75Ga.sub.0.25As.

(17) The mean thickness of the epilayer (forming the nucleation layer NL) is preferably less than 100 nm, and more preferably less than 20 nm, because the benefit of confining defects at the Si interface can decline at larger mean thicknesses. Examples of preferred mean thicknesses are 2.5 nm, 5 nm and 10 nm.

(18) In the earlier described embodiments of the invention, the layer that is grown on top of the NL epilayer is GaAs. However, any suitable III-V compound could be used, such as InP, GaSb, GaAs or mixtures of the elements in these compounds. GaN is excluded from the possible III-V compounds because it has a wurtzite crystal structure, so is generally not compatible with the epilayer which is typically of the zinc blende crystal structure. In contrast, GaAs has a zinc blende crystal structure and a similar lattice constant to AlAs, so the AlAs nucleation layer (epilayer) has close crystallographic properties to GaAs and specifically mitigates the presence of defects at the interface; consequently, active photonic structures grown on top can have enhanced properties.

(19) The term “III-V compound” and similar expressions used herein is not limited to binary compounds, but can include compounds with multiple group III elements and/or multiple group V elements.

(20) The invention is not limited to a quantum dot laser on a Si substrate, but could be used for other general semiconductor structures, for example detectors, modulators or other III-V photonic devices on a Si substrate. III-V electronic devices, such as diodes and transistors could also be fabricated with the use of this invention. Applications include, but are not limited to, chip optical inter-connects, solar cells, optical fibre communications (light emitters and detectors).

(21) In a method embodying the present invention, the epilayer (NL) can be grown at a relatively low temperature, because it is relatively thin. This can be advantageous in lowering the quality of any interfacial defects. Preferably, it is grown at a temperature below 500° C. A suitable temperature range is from 300° C. to 500° C., and is exemplified in the description above at 400° C.

(22) In the detailed method described above, the crystal growth is by molecular beam epitaxy (MBE), but it could also be done by chemical vapour deposition (CVD).

(23) Semiconductor devices and fabrication methods have been described above with reference to various specific embodiments and examples. However, it is to be understood that the claims below are in no way limited to these specific embodiments and examples.