Electrode surface modification layer for electronic devices

Abstract

There is disclosed a method for preparing a modified electrode for an organic electronic device, wherein said modified electrode comprises a surface modification layer, comprising: (i) depositing a solution comprising M(tfd).sub.3, wherein M is Mo, Cr or W, and at least one solvent onto at least a part of at least one surface of said electrode; and (ii) removing at least some of said solvent to form said surface modification layer on said electrode.

Claims

1. A method for preparing a modified electrode for an organic electronic device, wherein said modified electrode comprises a surface modification layer, comprising: (i) depositing a solution comprising M(tfd).sub.3, wherein M is Mo, Cr or W, and at least one solvent onto at least a part of at least one surface of an electrode; and (ii) removing at least some of said solvent to form said surface modification layer on said electrode.

2. The method as claimed in claim 1, wherein said surface modification layer does not comprise any organic semiconductor.

3. The method as claimed in claim 1, wherein said surface modification layer consists of M(tfd).sub.3, wherein M is Mo.

4. The method as claimed in claim 1, wherein said electrode comprises Au, Ag or Cu.

5. A method for preparing an organic electronic device comprising: (i) preparing at least one modified electrode by the method of claim 1; and (ii) depositing an organic semiconducting layer comprising at least one organic semiconductor on the surface of the modified electrode.

6. The method as claimed in claim 5, wherein said device is a thin film transistor.

7. The method as claimed in claim 5, wherein said organic semiconducting layer comprises a polymeric semiconductor and at least one non-polymeric semiconductor.

8. The method as claimed in claim 7, wherein said non-polymeric semiconductor is of formula (I): ##STR00015## wherein A is a phenyl group or a thiophene group, said phenyl group or thiophene group optionally being fused with a phenyl group or a thiophene group which is unsubstituted or substituted with at least one group of formula X.sup.1 and/or fused with a group selected from the group consisting of a phenyl group, a thiophene group, and a benzothiophene group, any of said phenyl, thiophene, and benzothiophene groups being unsubstituted or substituted with at least one group of formula X.sup.1; and wherein each group X.sup.1 is the same or different and is (i) a group selected from the group consisting of unsubstituted or substituted straight, branched, or cyclic alkyl groups having from 1 to 20 carbon atoms, alkoxy groups having from 1 to 12 carbon atoms, amino groups that are unsubstituted or substituted with one or two alkyl groups having from 1 to 8 carbon atoms, each of which may be the same or different, amido groups, silyl groups, and alkenyl groups having from 2 to 12 carbon atoms, or (ii) a polymerisable or reactive group selected from the group consisting of halogens, boronic acids, diboronic acids, esters of boronic acids and diboronic acids, alkenyl groups having from 2 to 12 carbon atoms, and stannyl groups.

9. The method as claimed in claim 7, wherein said polymeric semiconductor comprises a repeat unit of formula (II): ##STR00016## wherein R.sup.1 and R.sup.2 are the same or different and each is selected from the group consisting of hydrogen, an alkyl group having from 1 to 16 carbon atoms, an aryl group having from 5 to 14carbon atoms, and a 5- to 7-membered heteroaryl group containing from 1to 3 sulfur atoms, oxygen atoms, nitrogen atoms, and/or selenium atoms, said aryl group or heteroaryl group being unsubstituted or substituted with one or more substituents selected from the group consisting of an alkyl group having from 1 to 16 carbon atoms and an alkoxy group having from 1 to 16 carbon atoms; and a repeat unit of formula (III): ##STR00017## wherein: Ar.sup.1 and Ar.sup.2 are the same or different and each is selected from an aryl group having from 5 to 14carbon atoms and a 5- to 7-membered heteroaryl group containing from 1 to 3 sulfur atoms, oxygen atoms, and/or nitrogen atoms, said aryl group or heteroaryl group being unsubstituted or substituted with one or more substituents selected from the group consisting of an alkyl group having from 1 to 16 carbon atoms and an alkoxy group having from 1 to 16 carbon atoms; R.sup.3 is an alkyl group having from 1 to 8 carbon atoms or a phenyl group which is unsubstituted or substituted with an alkyl group having from 1 to 8 carbon atoms; and n is an integer greater than or equal to 1.

10. The method as claimed in claim 7, wherein said polymeric semiconductor is F8-TFB ([9,9′-dioctylfluorene-co-N-(4-butylphenyl)-diphenylamine].sub.n), wherein n is greater than 100.

11. An organic electronic device obtainable by the method claim 5.

12. An organic thin film transistor comprising source and drain electrodes defining a channel region therebetween; a surface modification layer comprising M(tfd).sub.3, wherein M is Mo, Cr or W, in contact with at least a part of at least one surface of said source and drain electrodes; an organic semiconducting layer extending across the channel region and in contact with the surface modification layer; a gate electrode; and a gate dielectric between the organic semiconducting layer and the gate electrode.

13. The organic thin film transistor as claimed in claim 12, comprising: i) a substrate; ii) source and drain electrodes deposited on said substrate and having a channel region therebetween, wherein at least a part of at least one surface of each of said electrodes is modified with a surface modification layer comprising M(tfd).sub.3, wherein M is Mo, Cr or W; iii) a semiconducting layer deposited over at least a portion of said source and drain electrodes and in said channel region; iv) a gate dielectric deposited over said semiconducting layer; and v) a gate electrode deposited on said gate dielectric.

14. The organic thin film transistor as claimed in claim 12, comprising: i) a substrate; ii) a gate electrode deposited on said substrate; iii) a gate dielectric deposited over said gate electrode; iv) source and drain electrodes deposited on said gate dielectric and having a channel region therebetween, wherein at least a part of at least one surface of each of said electrodes is modified with a surface modification layer comprising M(tfd).sub.3, wherein M is Mo, Cr or W; and v) a semiconducting layer deposited over at least a portion of said source and drain electrodes and in said channel region.

15. A modified electrode obtainable by the method of claim 1.

16. A modified electrode comprising an electrode; and a surface modification layer in contact with at least a part of at least one surface of said electrode, wherein said surface modification layer comprises M(tfd).sub.3, wherein M is Mo, Cr or W.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic of a typical top gate thin film transistor;

(2) FIG. 2 is a schematic of a typical bottom gate thin film transistor;

(3) FIG. 3a is a plot of photoelectron yield vs. photon energy for a gold layer;

(4) FIG. 3b is a plot of photoelectron yield vs. photon energy for a gold layer with a surface modification layer comprising Mo(tfd).sub.3;

(5) FIG. 4a shows a plot of saturation mobility (cm.sup.2V/s) obtained for top gate, bottom contact thin film transistors with a surface modification layer comprising a fullerene; and

(6) FIG. 4b shows a plot of saturation mobility (cm.sup.2V/s) obtained for top gate, bottom contact thin film transistors with a surface modification layer comprising Mo(tfd).sub.3 according to the present invention.

DETAILED DESCRIPTION OF THE INVENTION

(7) Referring to FIG. 1, it shows a schematic of a top gate thin film transistor. The structure may be deposited on a substrate 1 and comprises source and drain electrodes 2, 4 which are spaced apart with a channel region 6 located therebetween. An organic semiconductor 8 is deposited in the channel region 6 and may extend over at least a portion of the source and drain electrodes 2, 4. A gate dielectric 10 is deposited over the organic semiconductor 8 and may extend over at least a portion of the source and drain electrodes 2, 4. Finally, a gate electrode 12 is deposited over the insulating layer 10. The gate electrode 12 is located over the channel region 6 and may extend over at least a portion of the source and drain electrodes 2, 4.

(8) FIG. 2 shows a schematic of a bottom gate thin film transistor. In FIG. 2 like reference numerals have been used for corresponding parts to FIG. 1. The bottom-gate structure illustrated in FIG. 2 comprises a gate electrode 12 deposited on a substrate 1 with a gate dielectric 10 deposited thereover. Source and drain electrodes 2, 4 are deposited over the insulating layer 10 of dielectric material. The source and drain electrodes 2, 4 are spaced apart with a channel region 6 located therebetween over the gate electrode. An organic semiconductor 8 is deposited in the channel region 6 and may extend over at least a portion of the source and drain electrodes 2, 4.

(9) The conductivity of the channel region of the transistors can be altered by the application of a voltage at the gate. In this way the transistor can be switched on and off using an applied gate voltage. The drain current that is achievable for a given voltage is dependent on the injection of charge from the electrode into the organic semiconducting layer and on the mobility of the charge carriers in the channel region between the source and drain electrodes.

EXAMPLES

(10) Materials

(11) Toluene and o-xylene was obtained from Sigma-Aldrich. Mo(tfd).sub.3 (shown below) was prepared by the method described in as described in Inorganic Syntheses, Volume 10, Part 1, Chapter 1, p 8-26 “Metal complexes derived from cis-1,2-dicyano-1,2-ethylenedithiolate and bis(trifluoromethyl)-1,2-dithiete”, by A. Davison, R. H. Holm, R. E. Benson and W. Mahler.

(12) ##STR00013## The substrate is glass obtained from Corning. Gold is obtained from agar scientific 99.99%. The organic semiconducting layer is described below. The gate dielectric is PTFE. A commercially available PTFE is used. Aluminium is obtained from Agar scientific 99.999%.
Determination of Work Function of Modified Electrodes

(13) Samples were prepared by thermally evaporating gold (40 nm) onto a glass substrate. The substrates were immersed in a solution of Mo(tfd).sub.3 in toluene (1 mg/ml) for 5 minutes and then rinsed with toluene to remove any non-absorbed complex from the substrate and dried at 60° C. for 10 minutes. A comparative gold sample was left untreated.

(14) The work function of the modified gold and the unmodified gold was measured using a photoelectron yield spectrometer (AC-2 photoelectron spectrometer available from Riken Instruments Inc.). Measurements were performed in air and produced plots of photoelectron yield vs. photon energy. The measurements were performed by probing a sample that is several square millimetres in area by the following steps: UV photons emitted from a deuterium lamp were monochromatized through a grating monochromator The monochromatized UV photons at an intensity of 10 nW were focussed on the modified surface The energy of the UV photons was increased from 4.2 eV to 6.2 eV in steps of 0.05 eV When the energy of the UV photons was higher than the threshold energy of photoemission of the sample (i.e. the ionisation potential) photoelectrons were emitted from the sample surface Photoelectrons emitted from the sample were detected and counted in the air by an open air counter Photoemission threshold (i.e. work function) was determined from the energy of an intersecting point between a background line and an extrapolated line of the square root of the photoelectric quantum yield.

(15) The results are shown in FIGS. 3a (unmodified gold) and 3b (modified gold). The results clearly show that a shift in work function occurs. More specifically the work function of gold is increased from 4.8 eV to 5.7 eV upon treatment with Mo(tfd).sub.3 solution. This is attributed to the adsorption of the Mo(tfd).sub.3 to the metal surface forming a charge transfer complex resulting in a shift in the relative vacuum level at the metal surface.

(16) Preparative Example for the Fabrication of Organic Thin Film Transistors

(17) (i) Pre-Cleaning of OTFT Substrates and Surface Modification Treatments:

(18) The first step in fabrication of the device required the pre-cleaning of the device substrates and the application of Mo(tfd).sub.3 in a surface treatment of the source and drain electrodes. The substrates consist of gold source and drain electrodes on top of a chrome adhesion layer on the glass surface (5/40 nm Cr/Au). The substrates were cleaned by oxygen plasma to ensure any residual photoresist material (used for the source-drain electrode definition) is removed.

(19) After the plasma treatment, Mo(tfd).sub.3 was applied from a solution in toluene at a concentration of 1 mg/ml by flooding the substrate in the toluene solution for a period of 5 minutes. The solution was removed by spinning the substrate on a spin coater, then rinsing it in toluene to remove any unreacted material that had not adsorbed onto the source and drain electrodes and in the channel region of the substrate. All of these steps were performed in air. Samples were then baked at 60° C. for 10 minutes to ensure the samples were dehydrated.

(20) (ii) Preparation and Spin-Coating of the Semiconductor Blend Solution:

(21) A blend of non-polymeric semiconductor and polymeric semiconductor was prepared as a solution in o-xylene. The blend was prepared by making a solution of the desired concentration from the pre-weighed non-polymeric and polymeric semiconductors and the solvent. The blend was prepared to a concentration of 1.2% w/v (12 mg solid per 1 ml of solvent). The polymeric semiconductor was F8-TFB as disclosed above and in WO 2010/084977. The non-polymeric semiconductor was shown below and prepared in accordance with the methods disclosed in WO 2011/004869):

(22) TABLE-US-00001 % by Semiconductor weight F8-TFB, [9,9′-dioctylfluorene-co-N-(4-butylphenyl)- 75 diphenylamine]n 25

(23) Deposition of this blend was made using a spin coater at a coating speed of 600 rpm for a period of 30 seconds. Drying was carried out immediately. The thickness of the layer was 55 nm.

(24) (iii) Deposition of the Dielectric Layer:

(25) A dielectric layer was then deposited by spin coating a solution of PTFE on this semiconductor film. The thickness of the dielectric layer was 300 nm.

(26) (iv) Deposition of the Gate Electrode:

(27) Finally the gate electrode was deposited by thermal evaporation of 300 nm aluminium through a shadow mask to give the desired top-gate organic thin film transistor.

(28) Comparative Example

(29) A comparative example was prepared wherein a fullerene was employed in the surface modification layer instead of Mo(tfd).sub.3. The fabrication method was identical except that after the plasma treatment, C.sub.60F.sub.36 was applied from a solution in toluene at a concentration of 1 mM by flooding the substrate in the toluene solution for a period of 5 minutes.

(30) Device Characterisation

(31) Devices produced as described above were measured in ambient conditions (no device encapsulation was used) using a Hewlett Packard 4156C semiconductor parameter analyser by measuring output and transfer device characteristics. Saturation mobility was calculated from the device when characterised at a drain bias of −40 V with respect to the source (0V) as a function of gate bias (swept from +40 V to −40V). The maximum in the mobility as a function of the gate bias is the peak saturation mobility. The results are shown in FIGS. 4a and 4b. Since many TFTs are used for the average (8 TFTs per channel length) an average and maximum data representation is shown. Firstly for each TFT the peak in the saturation mobility as a function of gate bias is identified (mobility is a gate bias dependent parameter). Both the average and the maximum (i.e. the single largest value in the peak saturation mobility for all TFTs considered) in these peak saturation mobility results are calculated and shown for both 5 and 10 micron channel length devices.

(32) The average saturation mobility of the devices of the invention at channel lengths of 5 and 10 micrometres is about 1 cm.sup.2/Vs. This is similar to the mobilities achieved in the comparative devices employing fullerene as a surface modification layer on the electrode.

(33) At short channel lengths, the devices of the invention achieve a maximum charge carrier mobility of up to 1.5 cm.sup.2V/s at 10 micron channel length. The charge carrier mobility of the devices is improved from the application of a surface treatment layer giving rise to an increase in the effective work function of the electrode permitting a reduced contact resistance and therefore higher charge carrier mobility.

(34) A width normalised contact resistance for the Mo(tfd).sub.3 treated contact devices was calculated using a standard transmission line method whereby the device resistance is calculated as a function of the device channel length. By extrapolating to a virtual zero channel length, the contact resistance was determined as 3.2 kOhm-cm.