Digital voltage controller

Abstract

A high-efficiency digital voltage controller capable of providing monotonically-varying stepwise voltage, said controller comprises of a plurality of two-terminal voltage modules connected in series; within each module one or more two-terminal voltage cells of identical voltage each and connected in series; within each module a plurality of switches controllable to connect any number of the voltage cells in series to the output terminals of the voltage module; the ratios of the magnitudes of voltage of any one voltage cell between the voltage modules being substantially equal to integer values uniquely defined by present invention, according to the numbers of voltage cells in each of the voltage modules; said plurality of switches being controlled by a control module implemented in any suitable logic.

Claims

1. A voltage controlling apparatus, comprising: a number of at least one two-terminal voltage modules connected in series; between the two terminals of each voltage module a number of at least one two-terminal voltage cells connected in series, wherein the voltage magnitudes of the voltage cells are equal; wherein the magnitudes of the voltage cells between the voltage modules bear ratios V.sub.1: V.sub.2: V.sub.3: . . . V.sub.m: . . . , in an order of increasing magnitude, V.sub.1: V.sub.m=1: Π(N.sub.i+1) where i=1 to m−1, V.sub.m is the voltage magnitude of one single voltage cell of the m.sup.th voltage module, N.sub.i, is the number of voltage cells in the i.sup.th voltage module, Πis a mathematical multiplication operator; in each voltage module a plurality of switches controllable to connect a selected number of voltage cells in series to the two terminals of the voltage module; a control module for controlling said switches.

2. The voltage controlling apparatus of claim 1, wherein the voltages of the voltage cells are identical in waveform and in phase.

3. The voltage controlling apparatus of claim 1, wherein the in each voltage module the voltage cells are connected in series aiding.

4. The voltage controlling apparatus of claim 1, wherein the number of switches in each voltage module is N.sub.i+1.

5. The voltage controlling apparatus of claim 4, wherein the control module is comprising an analog-to-digital converter, wherefrom N.sub.i+1 digital outputs are configured to drive the switches in the i.sup.th voltage module.

6. The voltage controlling apparatus of claim 5, wherein the analog-to-digital converter is comprising a plurality of counters connected in cascade, the counters being driven to count up or down according to an analog signal.

7. The voltage controlling apparatus of claim 6, wherein one counter is coupled to one voltage module, and the counter coupled to the i.sup.th voltage module is of Modulo−(N.sub.i+1).

8. A method of voltage control, said method comprising the steps of: connecting a number of at least one two-terminal voltage modules in series; between the two terminals of each voltage module connecting a number of at least one two-terminal voltage cells in series, wherein the voltage magnitudes of the voltage cells are equal; wherein the magnitudes of the voltage cells between the voltage modules bear ratios V.sub.1: V.sub.2: V.sub.3: . . . ,V.sub.m: . . . , in an order of increasing magnitude, V.sub.1: V.sub.m=1:Π(N.sub.i+1) where i=1 to m−1, where V.sub.m is the voltage magnitude of one single voltage cell of the m.sup.th voltage module, N.sub.i is the number of voltage cells in the i.sup.th voltage module, Π is a mathematical multiplication operator; in each voltage module connecting a selected number of voltage cells in series to the two terminals of the voltage module by N.sub.i+1 controllable switches; controlling said switches by a control module.

9. The method of claim 8, wherein voltages of the voltage cells are identical in waveform as well as phase, and in each voltage module the voltage cells are connected in series aiding.

10. The method of claim 8, comprising a further step of converting an analog control voltage to a plurality of digital signals, wherein the plurality of digital signals are coupled to drive the switches in each of the voltage modules.

11. The method of claim 10, wherein the step of converting the analog control voltage to the plurality of digital signals is by driving a plurality of counters connected in cascade, counting up or down according to the difference between the control voltage and a reference voltage.

12. The method of claim 11, wherein the counter coupled to the i.sup.th voltage module is of Modulo−(N.sub.i+1).

Description

DESCRIPTION OF THE DRAWINGS

(1) With the foregoing in view, as other advantages as will become apparent to those skilled in the art to which this invention relates as this patent specification proceeds, the invention is herein described by reference to the accompanying drawings forming a part hereof, which includes descriptions of typical embodiments of the principles of the present invention, in which:

(2) FIG. 1 depicts a basic architecture of a feedback control system deploying a digital voltage controller as an embodiment of the present invention.

(3) FIG. 2 shows the basic architecture of a digital voltage controller as an embodiment of the present invention.

(4) FIG. 3 shows how the digital voltage controller together with the control module is configured as a voltage regulator as an embodiment of the present invention.

(5) FIG. 4 shows the circuit architecture of an AC voltage regulator deploying a digital voltage controller as an embodiment of the present invention.

(6) FIG. 5 shows the basic architecture of a digital current controller.

DETAILED DESCRIPTION OF THE INVENTION

(7) Glossary

(8) VM Voltage Module M.sub.VM Total number of VMs T.sub.o1, T.sub.o2 The two output terminals a Voltage Module VM VM.sub.m m.sup.th VM, m=1 to M.sub.VM V.sub.mo Nominal Voltage Output from m.sup.th VM, m=1 to M.sub.VM DVC Digital Voltage Controller V.sub.DVC Voltage Output from DVC, Digital Voltage Controller=vector sum of voltages from all M.sub.VM VMs δV.sub.DVC Deviation from the normal value of V.sub.DVC VC “Voltage Cell”, which is a voltage source VC.sub.mc c.sup.th VC in m.sup.th VM, c=1 to N.sub.m, m=1 to M.sub.VM N.sub.m Number of VCs in the m.sup.th VM, m=1 to M.sub.VM V.sub.mc The nominal voltage of the c.sup.th VC in m.sup.th VM, c=1 to N.sub.m, m=1 to M.sub.VM δV.sub.mc Deviation from the value of V.sub.mc V.sub.m The nominal voltage of each of the N.sub.m Voltage Cells in the m.sup.th VM, m=1 to M.sub.VM δV.sub.a The largest voltage deviation from the nominal voltage for any of the Voltage Cells VCs in all voltage modules VMs S.sub.mi The i.sup.th switch in the S-series of switches in VM.sub.m, i=1 to N.sub.m+1 J.sub.mi The i.sup.th switch in the J-series of switches in VM.sub.m, i=1 to N.sub.m+1 CM Control Module CC Counter Controller C.sub.sm Counter for driving the Series-S switches in the m.sup.th Voltage Module VM.sub.m C.sub.Jm Counter for driving the Series-J switches in the m.sup.th Voltage Module VM.sub.m CS.sub.s Control signal for the Series-S switches CS.sub.J Control signal for the Series-J switches CS.sub.sm Control signal for the Series-S switches in the m.sup.th Voltage Module VM.sub.m CS.sub.Jm Control signal for the Series-J switches in the m.sup.th Voltage Module VM.sub.m V.sub.reg Output of the Voltage Regulator V.sub.sense Sensed or measured voltage DIC Digital Current Converter IM Current Module IC Current Cell

(9) The present invention falls into the specific area of Digital Voltage Control. In FIG. 1, how a Digital Voltage Controller, DVC in abbreviation, plays a role in a feedback control system is illustrated. As in any control system, the parameter(s) of control is first defined. The parameter can be any electrical or physical quantity intended to be controlled, such as electrical voltage, electrical current, electrical power, or physical parameters that can be controlled through electrical means, such as temperature, brightness of illumination, pressure, force, speed, etc., etc. As shown, the parameter in control is measured through the senor, such as the voltage across the load, such as the current through the load, such as the power dissipated by the load, or such as the temperature being controlled via the heating effect of the load. The measured value is converted into a signal, suitably conditioned by general electronic means, and compared to the parameter set-point which defines the desired value of the parameter to be achieved. The result of comparison, showing the departure of the controlled Parameter from the set-point, will trigger the Control Module CM, being implemented in any suitable logic, to provide control signals for turning on and turning off each of the plurality of power switches respectively within the Digital Voltage Controller DVC so as to control the voltage output of said Controller in a way to minimize the departure of the controlled Parameter from the set-point, despite of any variations in the power supply or any variation in the load or any other external Disturbances. Consequently the Parameter is regulated as intended.

(10) As shown in FIG. 2, the Digital Voltage Controller DVC consists of one or more Voltage Modules VMs connected in series to provide a controlled voltage output V.sub.DVC, the total number of VMs being M.sub.VM. Each of the M.sub.VM Voltage Modules having two output terminals, T.sub.o1 and T.sub.o2. The second Voltage Module VM.sub.2 is shown as an example with more details as described below.

(11) Within each of the Voltage Modules VMs, there are one or more Voltage Cells VCs as voltage sources connected in series aiding, the Voltage Cells VCs being in galvanic isolation before said connection, the total number of VCs in the m.sup.th Voltage Module VMs being N.sub.m, where m=1 to M.sub.VM.

(12) Within each of the Voltage Modules VMs, all the Voltage Cells VCs provide voltages identical in magnitude, in waveform and in phase. In other words, The nominal voltages of the Voltage Cells VCs V.sub.m1=V.sub.m2=V.sub.m3 . . . =V.sub.mc where c=1 to N.sub.m, for any of the Voltage Module VM. The value of the identical voltage is designated V.sub.m as the nominal voltage in the m.sup.th Voltage Module VM.sub.m.

(13) Within each of the Voltage Modules VMs, all the Voltage Cells VCs are connected in series such that each cell is adding to the overall voltage of the Voltage Module VM. In other words, the highest voltage achievable from the Voltage Module VM is the direct sum of voltages from all the Voltage Cells VCs within the Voltage Module VM, i.e. V.sub.m.N.sub.m in the m.sup.th Voltage Module VM.

(14) Within each Voltage Module VM, two sets of switches in Series-S and Series-J respectively, and designated by S.sub.1, S.sub.2, S.sub.3, . . . S.sub.i . . . where i=1 to N.sub.m+1, and J.sub.1, J.sub.2, J.sub.3, . . . J.sub.i . . . where i=1 to N.sub.m+1 respectively, and connected in parallel with the series of Voltage Cells VCs such that at any time each of the two output terminals T.sub.o1 and T.sub.o2 of the Voltage Module VM can be connected to any one of the connection nodes T.sub.1, T.sub.2, T.sub.3 . . . T.sub.i where i=1 to N.sub.m+1 within the Voltage Module VM.

(15) For all Voltage Cells VCs in all Voltage Modules VMs, i.e. VC.sub.mc, for c.sup.th VC in m.sup.th VM, for c=1 to N.sub.m, m=1 to M.sub.VM, the nominal voltages V.sub.mc are identical in waveform and in phase but are of different magnitudes between the Voltage Modules VMs. However the ratios of the magnitudes of voltage V.sub.m of the voltage cells between the Voltage Modules are uniquely defined by present invention, and according to the number of Voltage Modules and numbers of Voltage Cells VCs in each of all the Voltage Modules as V.sub.1:V.sub.m=1:Π(N.sub.i+1) where i=1 to m−1, m=1 to M.sub.VM (Π denoting the product of the series).

(16) Further by turning on the appropriate switches of the S-series and J-series, the output of the m.sup.th Voltage Module VM.sub.m, i.e. V.sub.mo, can be varied monotonically from −V.sub.mN.sub.m to +V.sub.mN.sub.m in practically equal steps of V.sub.m.

(17) By combining all the Voltage Modules, and by turning on the appropriate switches, the output of the Digital Voltage Controller V.sub.DVC can be varied monotonically from −ΣV.sub.mN.sub.m to +ΣV.sub.mN.sub.m in practically equal steps of V.sub.1.

(18) It is possible by suitable design all voltage cells are in series aiding so that the resultant current always flows in one direction. However by the combined switching actions of the S-series and J-series switches the output from a Voltage Module can vary between opposite polarities. Consequently in combination with other Voltage Modules which might also have either polarities, it can be expected that some of the voltage cells need to handle currents flowing in either directions. In that case, these voltage cells would need to be made to allow bidirectional current flow, and hence bidirectional power flow.

(19) There is another practical issue to be considered. Due to various reasons, such as the tolerance in physical implementation of the Voltage Cells, partly due to the uncertainty in voltage measurements, the loading effect on the Voltage Cells whenever load current is drawn from the Digital Voltage Controller DVC at V.sub.DVC, and the voltage drop on the switches, etc., there is likely some departure in the contribution of V.sub.mc from the nominal value.

(20) Designating this departure by δV.sub.mc, and assuming δV.sub.a is the largest voltage deviation for any of ALL Voltage Cells VCs in all Voltage Modules VMs, i.e. the largest among all δV.sub.mc, c=1 to N.sub.m, m=1 to M.sub.VM, the maximum departure of V.sub.mo, voltage output from m.sup.th Voltage Module VM.sub.m is δV.sub.mo, then δV.sub.mo=δV.sub.a×N.sub.m.

(21) Therefore, in comparison to the nominal voltage values, the deviation of V.sub.DVC, the output of the Digital Voltage Controller DVC, is δV.sub.DVC, and the maximum value of δV.sub.DVC=ΣδV.sub.mo=ΣδV.sub.a×N.sub.m=δV.sub.a×ΣN.sub.m where m=1 to M.sub.VM.

(22) Note that δV.sub.mc, δV.sub.a, δV.sub.mo, and δV.sub.DVC can be of either positive or negative values. However for the estimate of their largest possible values, we shall take from here their absolute values, i.e. the magnitudes only.

(23) If the steps are controlled such that each time one and only one Voltage Cell VC in any of the Voltage Modules VMs is added to or removed from contributing to the output of the Voltage Module VM, the maximum change in the voltage deviation from the nominal, at each voltage step, for the Voltage Module would be δV.sub.a, and total change in the voltage deviation from the nominal voltage V.sub.DVC for the Digital Voltage Controller, is δV.sub.DVC=|δV.sub.a|×M

(24) In order to make sure that the voltage change under control is monotonic, it is required that |δV.sub.DVC|<V.sub.1 i.e. |δV.sub.a|×M.sub.VM<V.sub.1, i.e. |δV.sub.a|<V.sub.1/M.sub.VM

(25) In other words, the deviation of voltage of any of the Voltage Cells VCs would need to be less than the nominal voltage of the smallest (least significant) Voltage Cell divided by the total number of Voltage Modules VMs.

(26) Hence to maintain monotonicity in practice the voltages of the Voltage Cells VCs between the Voltage Modules VMs are allowed to bear the ratios V.sub.1:V.sub.m=1:[Π(N.sub.i+1)]±|δV.sub.a|/V.sub.1=1:[Π(N.sub.i+1)]±1/M.sub.VM where i=1 to m−1, for m=1 to M.sub.VM.

(27) Shown in FIG. 2 there is also the Control Module CM, implemented in any suitable logic, to control the Voltage Modules VMs by providing digital control signals CS.sub.S and CS.sub.J to the Voltage Modules VMs to turn on and to turn off the Series-S and Series-J switches respectively.

(28) FIG. 3 depicts the circuit architecture of a voltage regulator implemented with Digital Voltage Controller DVC together with the Control Module CM, which may in general be implemented in any suitable logic for providing control signals for the Digital Voltage Controller DVC. Shown the output of the voltage regulator V.sub.reg, which is also the output of the Digital Voltage Controller DVC, i.e. V.sub.DVC, is measured as V.sub.sense, as a voltage sensing signal representative of the magnitude of the output voltage. V.sub.sense is compared to the set-point of the nominal regulator voltage V.sub.reg at the Counter Controller CC in the Control Module CM. The Counter Controller CC is coupled to a series of cascaded Modulo-M up-down counters, C.sub.S1, C.sub.S2 and C.sub.S3, where M equals the number of corresponding switches under control by each counter. Note that by connecting counters C.sub.S1, C.sub.S2, and C.sub.S3 in cascade, the total number of counting states is equal to the product of the numbers of S-series switches in Voltage Modules VM.sub.1, VM.sub.2 and VM.sub.3 respectively. From counter C.sub.S1 digital control signals CS.sub.S1 are coupled to the Series-S switches in the Voltage Module VM.sub.1, the number of counter states of C.sub.S1 being the same as the number of Series-S switches in the Voltage Module VM.sub.1, and any time only one of the signal lines of CS.sub.S1 is active corresponding to one of the counting states of the counter C.sub.S1. Similarly, from counter C.sub.S2 digital control signals CS.sub.S2 are coupled to the Series-S switches in the Voltage Module VM.sub.2, and from counter C.sub.S3 digital control signals CS.sub.S3 are coupled to the Series-S switches in the Voltage Module VM.sub.3.

(29) On the other hand, Series-J switches in the Voltage Modules VM.sub.1, VM.sub.2 and VM.sub.3 are manually set through control signal lines of CS.sub.J1, CS.sub.J2 and CS.sub.J3 respectively to shift the output voltage from each of the Voltage Modules VM.sub.1, VM.sub.2 and VM.sub.3 as required by the design. In the case the Series-J switches are to be permanently set, these switches can be replaced by hard-wiring, i.e. shorting for closed switches and opening for open switches, within the Voltage Modules VMs as will be shown by an exemplary embodiment of the invention to be described next with reference to FIG. 4.

(30) In operation, when V.sub.reg is lower than the set-point by a pre-defined amount the Counter Control CC will trigger the cascaded counters to count-up so that V.sub.DVC or V.sub.reg is raised. When V.sub.reg is higher than the set-point by a pre-defined amount the Counter Control CC will trigger the cascaded counters to count-down so that V.sub.DVC or V.sub.reg is lowered. V.sub.reg is thus controlled to a value close to the set-point despite of any variations in the supply voltage at the input of the voltage regulator or any variations of the load at the output of the voltage regulator.

(31) Referring to FIG. 4, which shows the circuit architecture of an AC voltage regulator implemented as an embodiment of the present invention.

(32) The Digital Voltage Controller DVC basically consists of a multi-coil multi-tapped power transformer T1. As shown there are three transformer coils acting as Voltage Modules VMs designated by VM.sub.1, VM.sub.2 and VM.sub.3, respectively. Here M.sub.VM, the total number of Voltage Modules VMs is therefore 3. VM.sub.1 has 2 segments of the corresponding transformer coil and therefore 2 Voltage Cells VCs, similarly VM.sub.2 has 3 Voltage Cells VCs while VM.sub.3 has 4 Voltage Cells VCs. Each Voltage Cell corresponds to a segment of the transformer coil, each segment bearing the same number of windings within each coil. The Voltage Cells bear the voltage ratios 1:3±0.33:12±0.33 between the Voltage Modules VM.sub.1, VM.sub.2 and VM.sub.3. The transformer taps are switched on and off by Series-S switches under the digital control signals from the Control Module CM.

(33) The 3 taps of coil VM.sub.1 are connected to switches by S.sub.11, S.sub.12 and S.sub.13 respectively. The 4 taps of coil VM.sub.2 are connected to switches S.sub.21, S.sub.22 and S.sub.23 and S.sub.24 respectively. The 5 taps of coil VM.sub.3 are connected to switches S.sub.31, S.sub.32 and S.sub.33, S.sub.34 and S.sub.35 respectively.

(34) As shown in FIG. 4 the output of the Digital Voltage Controller DVC is connected to primary side of transformer T2 which acts as a compensation transformer by which its secondary side is connected between the AC supply line and the output of the AC voltage regulator, i.e. the Load Line. It can be easily figured out that the output from the DVC is as tabled below:

(35) TABLE-US-00001 States of Counters Switch Output C.sub.S3 C.sub.S2 C.sub.S1 States V.sub.DVC Quinary Quaternary Ternary Decimal V.sub.reg/48 0 0 0 0 −30 0 0 1 1 −29 0 0 2 2 −28 0 1 0 3 −27 0 1 1 4 −26 0 1 2 5 −25 0 2 0 6 −24 0 2 1 7 −23 0 2 2 8 −22 0 3 0 9 −21 0 3 1 10 −20 0 3 2 11 −19 1 0 0 12 −18 1 0 1 13 −17 1 0 2 14 −16 1 1 0 15 −15 1 1 1 16 −14 1 1 2 17 −13 1 2 0 18 −12 1 2 1 19 −11 1 2 2 20 −10 1 3 0 21 −9 1 3 1 22 −8 1 3 2 23 −7 2 0 0 24 −6 2 0 1 25 −5 2 0 2 26 −4 2 1 0 27 −3 2 1 1 28 −2 2 1 2 29 −1 2 2 0 30 0 2 2 1 31 1 2 2 2 32 2 2 3 0 33 3 2 3 1 34 4 2 3 2 35 5 3 0 0 36 6 3 0 1 37 7 3 0 2 38 8 3 1 0 39 9 3 1 1 40 10 3 1 2 41 11 3 2 0 42 12 3 2 1 43 13 3 2 2 44 14 3 3 0 45 15 3 3 1 46 16 3 3 2 47 17 4 0 0 48 18 4 0 1 49 19 4 0 2 50 20 4 1 0 51 21 4 1 1 52 22 4 1 2 53 23 4 2 0 54 24 4 2 1 55 25 4 2 2 56 26 4 3 0 57 27 4 3 1 58 28 4 3 2 59 29

(36) As shown by the table, by controlling the switch states of the 3 sets of Series-S switches in the 3 Voltage Modules VMs for a total of 60 states, the voltage output from the DVC can be stepped from −30 to +29 in steps of one, each step being 1/48 of the regulator output voltage, i.e. V.sub.reg/48.

(37) Referring back to FIG. 4,

(38) The Series-S switches are driven by the counters which are designated as

(39) C.sub.S1 for VM.sub.1: Ternary (Modulo-3) up-down counter

(40) C.sub.S2 for VM.sub.2: Quaternary (Modulo-4) up-down counter

(41) C.sub.S3 for VM.sub.3: Quinary (Modulo-5) up-down counter

(42) The three counters are cascaded to count through a total of 5×4×3=60 counting states.

(43) The polarity of compensation transformer T2 is chosen such that when V.sub.reg is lower than the set-point by a pre-defined amount the Counter Control CC will trigger the cascaded counters to count-up so that an increasing V.sub.DVC is generated and added through the secondary side of the compensation transformer T2 resulting a higher V.sub.reg. Similarly when V.sub.reg is higher than the set-point by a pre-defined amount the Counter Control CC will trigger the cascaded counters to count-down so that a decreasing V.sub.DVC is generated and added through the secondary side of the compensation transformer T2 resulting a lower V.sub.reg. V.sub.reg is thus controlled to a value close to the set-point despite of any variations in the supply voltage at the power input of the AC voltage regulator or any variations of the load at the output of the AC voltage regulator.

(44) The scale of compensation is dependent on K, turns ratio of the primary to the secondary of the compensation transformer T2. A larger K means a smaller scale of compensation, and a smaller K means a larger scale of compensation. As an example, for a nominal Vreg=220 volt, K=6, theoretically the AC voltage regulator will be able to maintain an output accuracy of ±0.34% for supply voltage variation in the range ±20%. Similarly, for K=3, the AC voltage regulator will be able to maintain an output accuracy of ±0.68% for supply voltage variation in the range ±40%.

(45) Note that Series-J switches are not deployed in the above embodiment. As shown in FIG. 4, one output terminal of each Voltage Module VM is hard-wired instead of being connected through one of the Series-J switches to the corresponding transformer tap, while the other output terminal is selectively connected to the transformer taps by the Series-S switches. In a modified embodiment for increased precision of control, Series-J switches can be deployed to raise the number of controlled steps of the Digital Voltage Controller DVC. When Series-J switches are deployed as depicted in FIG. 3, the total number of switch states achievable will be 119 and thus the voltage output from the DVC can be stepped from −59 to +59 in steps of one, each step being 1/48 of the regulator output voltage, i.e. V.sub.reg/48.

(46) Note also that there is much more room for variation in the embodiments of the present invention. Both the number of Voltage Modules VMs and the number of Voltage Cells VCs in each Voltage Module VM can be chosen to suit individual design considerations, such as control accuracy, control range, number of transformer coils (the Voltage Cells VCs and Voltage Modules VMs) and number of switches needed, control circuit complexity, system stability, total implementation cost, etc. Room of variation available in the present invention provides much design flexibility in choosing the best circuit topology.

(47) By duality property of electrical circuits, all circuit principles described for voltage control in this application can be applied also to current control. As an exemplary embodiment of present invention the basic architecture of a Digital Current Converter DIC is shown in FIG. 5. The Digital Current Controller DIC consists of four Current Modules IM.sub.1, IM.sub.2, IM.sub.3 and IM.sub.4 which are connected in parallel, in contrary to the Digital Voltage Controller whereby the Voltage Modules are connected in series. For the purpose of illustration, the second Current Module IM.sub.2 is shown as an example with the details. The Current Module IM.sub.2 consists of three Current Cells IC.sub.21, IC.sub.22 and IC.sub.23 which source each a constant current I.sub.2 and are connected together at one terminal with the same polarity. By action of the switches S.sub.1 to S.sub.4 and J.sub.1 to J.sub.4, the Current Module IM.sub.2 can be controlled to deliver currents from −3I.sub.2 to +3I.sub.2. Following the same principle as the Digital Voltage Controller and with voltage-current duality in mind, it can be deduced that a high-efficiency digital current controller capable of providing monotonically-varying stepwise current can be achieved.

(48) Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions, and alterations can be made therein without departing from the spirit and scope of the invention as described. That is, the discussion included in this application is intended to serve as a basic description. It should be understood that the specific discussion may not explicitly describe all embodiments possible; many alternatives are implicit. It also may not fully explain the generic nature of the invention and may not explicitly show how each feature or element can actually be representative of a broader function or of a great variety of alternative or equivalent elements. Again, these are implicitly included in this disclosure. Where the invention is described in device-oriented terminology, each element of the device implicitly performs a function. Neither the description nor the terminology is intended to limit the scope of the invention.