Emissivity controlled coatings for semiconductor chamber components

Abstract

A component for a semiconductor processing chamber, the component including a substrate and a coating layer provided on a surface of the substrate, wherein the coating layer includes at least a first coating layer having a thermal emissivity of more than 0.98 to 1, having plasma resistance, and having a color value L in a range of 35 to 40 through a thickness direction thereof.

Claims

1. A coating comprising: at least a first coating layer having a thermal emissivity of more than 0.98 to 1, and having a color value L in a range of 35 to 40 through a thickness direction thereof, wherein said coating has a surface roughness of 60 to 120 μin Ra.

2. The coating according to claim 1, further comprising at least a second coating layer, wherein said first coating layer defines a top coat layer and said second coating layer defines an undercoat layer.

3. The coating according to claim 2, wherein said second coating layer comprises at least two of yttrium oxide, hafnium oxide, and yttria fully stabilized zirconium oxide.

4. The coating according to claim 2, wherein said second coating layer comprises silicon, silicon and silicon carbide, aluminum and silicon carbide, nickel, molybdenum or tungsten.

5. The coating according to claim 1, wherein said first coating layer comprises at least one of yttrium oxide, hafnium oxide, yttria fully stabilized zirconium oxide and mixtures thereof.

6. The coating according to claim 5, wherein in said first coating layer, compounds of the yttrium and oxygen, zirconium and oxygen or hafnium and oxygen are concentrated in distinct segments of layers that are uniformly distributed in a direction that extends parallel to a surface of a substrate on which said first coating layer is provided.

7. The coating according to claim 1, wherein a concentration of a composition of said first coating layer is graded in said thickness direction thereof from approximately 1 wt % at an interface between said first coating layer and a surface of a substrate on which said first coating layer is formed to 100 wt % at an upper surface of said first coating layer that is exposed to a plasma environment.

8. The coating according to claim 1, wherein a composition of said first coating layer is Y.sub.(2-x)O.sub.(3-y), wherein 0<x<2 and 0<y<3.

9. A component for a semiconductor processing chamber, the component comprising: a substrate; and a coating provided on a surface of said substrate, said coating comprising at least a first coating layer having a thermal emissivity of more than 0.98 to 1, and having a color value L in a range of 35 to 40 through a thickness direction thereof wherein said coating has a surface roughness of 60 to 120 μin Ra.

10. The component for a semiconductor processing chamber according to claim 9, wherein said coating further comprises at least a second coating layer, and wherein said first coating layer defines a top coat layer and said second coating layer defines an undercoat layer proximate said surface of said substrate on which said coating is formed.

11. The component for a semiconductor processing chamber according to claim 10, wherein said second coating layer comprises at least two of yttrium oxide, hafnium oxide, and yttria fully stabilized zirconium oxide.

12. The component for a semiconductor processing chamber according to claim, 11 wherein in said first coating layer, compounds of the yttrium and oxygen, zirconium and oxygen or hafnium and oxygen are concentrated in distinct segments of layers that are uniformly distributed in a direction that extends parallel to said surface of said substrate on which said coating is formed.

13. The component for a semiconductor processing chamber according to claim 10, wherein said second coating layer comprises silicon, silicon and silicon carbide, aluminum and silicon carbide, nickel, molybdenum or tungsten.

14. The component for a semiconductor processing chamber according to claim 9, wherein said substrate comprises a metal or a sintered ceramic material.

15. The component for a semiconductor processing chamber according to claim 14, wherein said substrate comprises aluminum, aluminum alloys or anodized aluminum.

16. The component for a semiconductor processing chamber according to claim 14, wherein said substrate comprises a material selected from the group consisting of Al.sub.2O.sub.3, AlN, SiC and graphite.

17. The component for a semiconductor processing chamber according to claim 9, wherein said first coating layer comprises at least one of yttrium oxide, hafnium oxide, yttria fully stabilized zirconium oxide and mixtures thereof.

18. The component for a semiconductor processing chamber according to claim 9, wherein a concentration of a composition of said first coating layer is graded in said thickness direction thereof from approximately 1 wt % at an interface between said first coating layer and said surface of said substrate on which said coating layer is formed to 100 wt % at an upper surface of said first coating layer that is exposed to a plasma environment.

19. The component for a semiconductor processing chamber according to claim 9, wherein said component comprises any one of a chamber liner, a focus ring, a susceptor, a shower head, a nozzle, a heating element and an electrostatic chuck.

20. The component according to claim 9, wherein a composition of said first coating layer is Y.sub.(2-x)O.sub.(3-y), wherein 0<x<2 and 0<y<3.

21. A method for providing an emissivity controlled coating for a semiconductor processing chamber component, said method comprising the steps of: providing a component for use in a semiconductor processing chamber; applying a coating to a surface of said component using one of a plasma thermal spray device, HVOF, a D-Gun, SPS, AD and combinations thereof; wherein said coating comprises at least a first coating layer, said at least first coating layer having a thermal emissivity of more than 0.98 to 1, and having a color value L in a range of 35 to 40 through a thickness direction thereof, wherein said coating has a surface roughness of 60 to 120 μin Ra.

22. The method according to claim 21, wherein said coating further comprises at least a second coating layer, and wherein said step of applying a coating further comprises applying said second coating layer to said surface of said component, prior to forming said at least first coating layer to said surface of said component, whereby said at least first coating layer defines a top coat layer and said second coating layer defines an undercoat layer.

23. The method according to claim 21, further comprising the steps of: texturing said coating to have a reduced surface roughness; precision cleaning said component in an ultrasonic chamber; using said component in a semiconductor processing chamber for a first useful life cycle thereof; then grit blasting said component to remove said coating; and then reapplying said coating to said component to restore functionality to said component for repeated use in a semiconductor processing chamber.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present invention is described in detail herein below in connection with the associated drawing figures, in which:

(2) FIG. 1 is a perspective schematic view of a segment of a semiconductor chamber component having a high emissivity, plasma resistant coating deposited according to one aspect of the present invention;

(3) FIG. 2 is a graph showing the thermal emissivity values of various coating compositions as a function of temperature and including the color value L;

(4) FIG. 3 is a graph showing the thermal emissivity of thermal sprayed coatings as a function of temperature;

(5) FIGS. 4A-4D are schematic cross-sectional diagrams illustrating the coating configurations of Examples 1-4 according to the present invention; and

(6) FIGS. 5A-5D are cross-sectional optical photomicrographs taken in the thickness direction of the coating configurations and microstructures of Examples 1-4 according to the present invention.

DETAILED DESCRIPTION OF THE INVENTION

(7) FIG. 1 is a perspective schematic view of a segment of a semiconductor chamber component (i.e., substrate 1) having a thermal sprayed coating 2 having a high thermal emissivity and plasma resistance according to one aspect of the present invention formed thereon. Within the semiconductor processing chamber, the coated surface 2 of the substrate 1 is subject to the incident thermal energy 3, and the coated surface 2 reflects the incident thermal energy 3 as emissive thermal energy 4.

(8) In order to determine the optimal thermal emissivity characteristics for the coatings according to the present invention, various coatings were deposited on substrates, and the thermal emissivity of the coated samples was measured using a standardized setup.

(9) The samples were made from 6061T6 Aluminum substrates and the various coating compositions were applied to the substrates by plasma spray deposition techniques. For each of these samples, a DC plasma spray was used with a shrouding mechanism to reduce the amount of oxygen incorporated in the various coating compositions (i.e., the yttria, hafnia, yttria fully stabilized zirconia, or mixtures thereof) during the thermal spray process that deposited the coatings. Plasma spraying was conducted using various mixtures of ionized gases containing argon, nitrogen and hydrogen without any substantial presence of oxygen.

(10) Specifically, argon, nitrogen and hydrogen were mixed in a ratio of 54:39:7% and DC plasma was ignited at 12 kW. The plasma spray device was mounted on a robot to provide rastering to deposit coatings on the sample surfaces at a speed of 1800 in/min. The specific ratio of the mixture is not critical so long as the effect of excluding oxygen is achieved, as one skilled in the art would understand, and such a skilled artisan could readily manipulate the processing parameters to achieve suitable spraying results.

(11) The coated samples were then placed in a vacuum chamber on a heated platen. The samples were heated during emissivity measurement to various temperatures in a range of 60 to 150° C. An infrared imaging detector that was sensitive to infrared energy in a wavelength of 8 to 15 μm was positioned to view the heated samples. The temperature of each sample was measured by a thermocouple embedded in the test sample closer to the coated surface. A small sample that was calibrated as a black body with an emissivity of 1 was used as a reference and mounted next to each sample during the infrared detector measurements. The emissivity was measured on the coated samples and compared with the reference sample as an integrated value over the range of sensitivity.

(12) The coatings were made from materials of various compositions, as shown in FIGS. 2 and 3, and the color of the coatings was changed by changing coating parameters with respect to the exclusion of oxygen, as described above.

(13) FIG. 2 shows coating compositions, along with the associated color characteristics represented by “L” values, as measured by a spectrophotometer according to the accepted CIE L-a-b standards, and the variation in emissivity as a function of temperature.

(14) FIG. 2 shows that an aluminum oxide material Al(O) had the lowest emissivity in a range of 0.77 to 0.79 with an L value of 30. On the other hand, another aluminum oxide coating material having the same elemental composition of Al and O, but formed with near Al.sub.2O.sub.3 proportions, had an emissivity in a range of 0.86 to 0.87 with an L value of 88.

(15) FIG. 2 further shows the response of a coating having near Y.sub.2O.sub.3 proportions of Y and O and having a thermal emissivity in a range of 0.97 to 0.98 with an L value of 88, compared to another yttrium oxide coating with an elemental composition of Y.sub.2-x and O.sub.3-y, where 0<x<2 and 0<y<3, to obtain an L value of 40 and a thermal emissivity in a range of 0.99 to 1, where an emissivity of 1 is the maximum value that can be obtained from a material.

(16) Further work was concentrated to determine the specific compositions that would be preferable under semiconductor processing chamber conditions in order to resist fluorine and chlorine plasma erosion. Such materials were found to be based on elemental compositions of Y, Zr and Hf oxides. Thermal spray coatings were developed using these oxides in a color range L of 35 to 45, and closer to an L value of 40. The thermal emissivity values of these select thermal sprayed coatings were measured and are shown in FIG. 3.

(17) FIG. 3 shows standard white color yttria Y.sub.2O.sub.3 coatings with an L value of 88 and having an emissivity in a range of 0.97 to 0.98. FIG. 3 also shows yttria fully stabilized zirconia coatings (YFSZ), which were thermal sprayed to have a black color with an L value of about 45 under reduced oxygen conditions. These coatings had a thermal emissivity in a range of 0.98 to 0.99. Typically, YSZ normally includes less than 14 wt % Y.sub.2O.sub.3, whereas in these YFSZ coatings, more than 17 wt % Y.sub.2O.sub.3 was utilized to provide a fully stable cubic phase.

(18) FIG. 3 also shows co-deposited emissivity controlled yttria (Y.sub.2-xO.sub.3-y) and yttria fully stabilized zirconia (herein also referred to as YO+YFSZ) with an L value of 40. These coatings also exhibited a thermal emissivity of 0.98 to 0.99.

(19) FIG. 3 further shows yttria coatings thermal sprayed with an L value of 40 and an emissivity that ranges from 0.99 to a maximum of 1 for a composition of Y.sub.2-xO.sub.3-y, where 0<x<2 and 0<y<3. These coatings with thermal emissivity values in a range of 0.98 to a maximum of 1 are advantageous for use in connection with semiconductor processing chamber components in order to increase the ability of and efficiency with which the coated surfaces reflect radiant energy into the work space.

EXAMPLES

Example 1

(20) Test samples were made using a 6061T6 aluminum substrate. The substrates were roughened by grit-blasting to reach a surface roughness of about 200 μin Ra. The substrates were coated with 0.004 to 0.006 inch of emissivity controlled yttria coating (Y.sub.1.5O.sub.2.5). The DC plasma spray with shrouding mechanism was used according to the same process described above to deposit the coatings using a mixture of ionized gases containing argon, nitrogen and hydrogen in a ratio of 54:39:7%, respectively, as described above, without any substantial presence of oxygen.

(21) The color of the samples appeared black with L=40, a=−0.2 and b=−1.1, as measured by a spectrophotometer in accordance with the standard procedures established by the CIE (Commission Internationale de l'Eclairage, a.k.a., the International Commission on Illumination) for the L-a-b color space scale.

(22) The hardness of the coatings was measured by a Vickers indentor according to standard procedures outlined in ASTM E384. For Example 1, the hardness of the coatings were 520 HV0.3 kg/mm.sup.2.

(23) The porosity of the coating samples was measured according to the standard testing procedures outlined in ASTM E2109. For Example 1, the porosity was measured to be <0.5%.

(24) The coating bond strength was tested following the standard procedure outlined in in ASTM C633. For Example 1, the coating bond strength was measured to be >5000 psi.

(25) The thermal emissivity was measured, as described above, to be 0.98 to 1 over a temperature range of 50 to 160° C.

(26) A step voltage was applied on the coated surface in accordance with the standard procedures outlined in ASTM D149. In Example 1, the coatings resisted breakdown up to 2800 V.

(27) FIG. 4A is a schematic cross-sectional view representing a sample from Example 1, including a single layer, single phase coating 2 provided on the substrate 1. As shown, the hatch marks used in the drawings (or lack thereof) are intended to differentiate the coating layers, and are not intended to specify the materials or compositions of those coating layers.

(28) FIG. 5A is an actual optical photomicrograph taken from a coated sample according to Example 1. The optical micrographs show the coating microstructure in cross-section. The optical micrograph was obtained by mounting a sample in a resin and then polishing the mount to reveal the coating microstructure through the coating thickness following standardized polishing procedures according to ASTM E1920.

(29) In FIG. 5A, from top to bottom, the various layers are designated as follows: a mounting material 6, an edge retention foil layer 5 provided to highlight the edges, the emissivity controlled yttria coating layer 2, and the aluminum substrate 1.

Example 2

(30) Test samples were made using 6061AL aluminum substrates that were roughened to 200 μin Ra by grit blasting, and then emissivity controlled co-phase (50/50 wt %) coatings of yttria (YO), having a composition of Y.sub.1.5O.sub.2.5, and yttria fully stabilized zirconia (YFSZ) having a composition of Y.sub.0.15Zr.sub.0.85O.sub.1.93, were applied by a DC plasma spray with shrouding mechanism according to the same process described above to deposit the coatings using a mixture of ionized gases containing argon, nitrogen and hydrogen in a ratio of 45:45:10%, respectively, without any substantial presence of oxygen.

(31) The emissivity of the test samples were measured to be in a range of 0.98 to 0.99 over a temperature range of 50 to 160° C. The color of the samples, as measured with a spectrophotometer, appeared black with values of L=42, a=−0.5, b=−1.3. The coated samples were exposed to 5 wt % HCl for 24 hours. The area exposed to HCl did not show any signs of corrosion when examined under scanning electron microscope.

(32) FIG. 4B is a schematic cross-sectional view representing a sample from Example 2, including a single layer, co-phase coating 22 provided on the aluminum substrate 11.

(33) FIG. 5B is an actual optical photomicrograph taken from a sample according to Example 2, including the mounting material layer 6, the edge retention foil layer 5, the emissivity controlled co-phase coating layer 22, and the substrate 11.

Example 3

(34) Test samples were made using 6061 aluminum substrates. A wet corrosion barrier coating of 50/50 YFSZ/YO, having the composition of Y.sub.0.15Zr.sub.0.85O.sub.1.93/Y.sub.1.5O.sub.2.5, was applied to a thickness of 0.004 inch by a DC plasma spray device with a shrouding mechanism using a mixture of ionized gases containing argon and hydrogen in a ratio of 90:10% without any substantial presence of oxygen described above. Then an emissivity controlled yttria coating (Y.sub.1.5O.sub.2.5) was applied to a thickness of 0.004 inches by a DC plasma spray device with a shrouding mechanism using the same mixture of ionized gases containing argon and hydrogen without any substantial presence of oxygen. The samples were then wiped with 5% HCl, ultrasonic cleaned in DI water, baked at 85° C., 110° C. and 220° C. These cycles of acid cleaning and thermal cycling were repeated 10 times, and then the bond strength of the samples was measured. It was found that the initial bond strength was 6000 psi and the retained bond strength after the 10× clean/bake cycles was 100%, 90% and 80% respectively.

(35) FIG. 4C is a schematic cross-sectional view representing a sample from Example 3, including a double-layer coating formed on the substrate 11. The double layer coating includes the Y.sub.1.5O.sub.2.5 top layer 2 formed over the co-phase Y.sub.0.15Zr.sub.0.85O.sub.1.93/Y.sub.1.5O.sub.2.5 underlayer 22, which is formed on the substrate 11.

(36) FIG. 5C is an actual optical photomicrograph taken from a sample according to Example 3. The layers shown include the mounting material 6, the edge retention foil 5, the upper layer 2 (top coat), the co-phase undercoat layer 22, and the substrate 11.

Example 4

(37) Test samples were made using 6061 aluminum substrates that were grit-blasted to a surface roughness of about 250 μin Ra. The samples were then anodized to form an anodized alumina coating that was about 1.7 mils thick. The rough anodized surface was then coated with YFSZ/YO (50/50 wt %) co-phase coating, having the composition of Y.sub.0.15Zr.sub.0.85O.sub.1.93/Y.sub.1.5O.sub.2.5, by a DC plasma spray device with a shrouding mechanism using the same mixture of ionized gases containing argon, nitrogen and hydrogen without any substantial presence of oxygen described above in Example 1, and without any further grit-blasting. The co-phase coating was about 0.004 inch thick. Then a top coating of an emissivity controlled yttria coating (Y.sub.1.5O.sub.2.5) was deposited by a DC plasma spray device with a shrouding mechanism using the same mixture of ionized gases containing argon, nitrogen and hydrogen without any substantial presence of oxygen. The top layer coating thickness was about 0.004 inches. A step voltage was applied on the multilayer coated samples, which were found to withstand about 5500 V without any breakdown when the voltage was maintained for 6 hours.

(38) FIG. 4D is a schematic cross-sectional view representing a sample from Example 4 having a three layer coating, including the substrate 11, the anodized alumina layer 11A formed thereon, the co-phase underlayer 22 formed atop the layer 11A, and the emissivity controlled top coat 2 formed on the undercoat layer 22.

(39) FIG. 5D is an actual optical photomicrograph taken from a sample according to Example 4. In FIG. 5D, the layers are represented as follows: the mounting material 6, the edge retention layer 5, the top coat layer 2, the co-phase undercoat layer 22, the anodized alumina layer 11A, and the substrate 11.

Example 5

(40) Test samples made using 6061 aluminum were separately coated with an emissivity controlled yttria coating (Y.sub.1.5O.sub.2.5) and co-phase (Y.sub.1.5O.sub.2.5)/Y.sub.0.15Zr.sub.0.85O.sub.1.93 coating by a DC plasma spray device with a shrouding mechanism under the same conditions as Example 1. The as-coated samples had a surface roughness of 210 μin Ra and 250 μin Ra, respectively. To obtain textured surface samples, the surfaces of some of the samples were first polished with a 30 micron diamond coated film, and then with a 9 micron diamond coated film using a circular motion to obtain a textured coating having a surface roughness in a range of 60 to 120 μin Ra. The surface texturing did not change the color of the coatings, and the spectrometer read L=40.4, a=0.1 and b=−1.1 for the yttria coatings, and L=41.2, a=−0.2 and b=1.2 for the Y.sub.1.5O.sub.2.5/Y.sub.0.15Zr.sub.0.85O.sub.1.93 co-phase coatings. The as-coated and textured samples were immersed separately in an ultrasonic bath, and the particles generated during sonification were counted with a liquid particle counter. It was found that the surface textured samples generated about 75% fewer particles compared to the as-coated surface samples during the same ultrasonic exposure time.

Example 6

(41) Three circular shells having a 12 inch inner diameter (ID), 6 inch height and a wall thickness of 0.25 inch were made of 6061 T6 aluminum. The parts were first coated with thermal sprayed Si having a thickness of 0.002 to 0.003 inches, and then one shell was coated with emissivity controlled yttrium oxide (Y.sub.1.5O.sub.2.5), one shell was coated with fully stabilized yttrium zirconium oxide YFSZ having a composition of Y.sub.0.15Zr.sub.0.85O.sub.1.93, and one shell was coated with a co-phase emissivity controlled coating of YO/YFSZ having a composition of Y.sub.1.5O.sub.2.5/Y.sub.0.2Zr.sub.0.8O.sub.2.4. The coatings were each applied a DC plasma spray device with a shrouding mechanism to reduce oxygen infiltrating into the plasma effluent, in the manner described above. These parts were then heated to 100° C. and then cooled to room temperature. This cycle was repeated 10 times. When the parts were examined, no evidence of cracking or coating spallation was seen.

(42) The yttria coated shell was cleaned with an Hf wipe, and the YFSZ and YO/YFSZ coated shells were cleaned with an HCL wipe. All of the shells were then cleaned in a DI water ultrasonic bath, and later dried at 85° C. for 1 hr. The parts were visually examined, and none showed any signs of cracking or coating spallation.

Example 7

(43) A circular shell of 12 inch ID and 6 inch height with a wall thickness of 0.25 inch was made of 6061 T6 aluminum. The part was first coated with a YO/YFSZ (50/50 wt %) co-phase coating made of Y.sub.1.5O.sub.2.5+Y.sub.0.2Zr.sub.0.8O.sub.2.4 that was about 0.003 to 0.004 inch thickness. Then a top layer of emissivity controlled Y.sub.1.5O.sub.2.5 coating was deposited without any surface roughing of the first coating layer. The emissivity controlled coating was about 0.004 to 0.006 inch thick. The coatings were each applied by a DC plasma spray device with a shrouding mechanism, as described above. The surface was finished to 100 μin Ra using diamond coated abrasive pads and surface color measurements were L=45, a=−1.3 and b=−0.74. The shell was cleaned in an ultrasonic chamber and then baked at 95° C. The coated part was then grit-blasted to remove all of the coating. The same coating layers were then deposited again, and the part dimensions were restored. The re-coated part was then ultrasonic cleaned and then thermally cycled 3× to 250° C. No cracking or spallation of the coating was observed. Color measurements were performed after the thermal cycling, and the results remained substantially unchanged.

(44) This test showed that parts coated with the emissivity controlled coating according to the present invention can be recycled, with the preservation of the components even after a part has been used in a process chamber.

(45) Table 1 below shows compositions and properties of emissivity controlled coatings according to the present invention, which were also evaluated using a Scanning Electron Microscope (SEM) equipped with an Energy Dispersive X-Ray Spectrometer (EDS) according to the standards to ASTM E1508.

(46) TABLE-US-00001 TABLE 1 Coatings Y.sub.2−xO.sub.3−y + YFSZ + EDS Composition, wt % Y.sub.2−xO.sub.3−y YFSZ YFSZ HfO Y 85 47 47 18 Zr 0 34 34 65 Hf 0 0 0 4 O Balance Balance Balance Balance Hardness, kg/mm.sup.2 550 450 540 545 Porosity, % <1 <1 <2 <1 Voltage Breakdown 550 450 450 450 Strength, V/mil Color, L 40 42 45 45 Color, a −0.2 −0.2 0.1 −0.1 Color, b −1.1 −1.1 1.2 1.16 Emissivity, max 0.98 0.98 0.98 0.98 Emissivity, min 1 0.99 0.99 0.99

Example 8

(47) Test samples made using 6061 Aluminum substrates were coated with emissivity controlled yttria (Y.sub.1.5O.sub.2.5) coatings with an L value of 40. These samples were exposed to plasma erosion in a reactive ion etching chamber, where plasma was generated with a gas mixture containing reactive ions of fluorine in the presence of oxygen. The samples were biased at 2000 Watts at 13.56 MHz. The same plasma erosion conditions were also applied to commercially available yttria coatings having a composition of Y.sub.2O.sub.3 applied on 6061 Aluminum substrates using the same plasma spray manner that appeared white with an L value of 88. It was found that the plasma erosion rate, measured by a loss of thickness, of the emissivity controlled coatings was about 42% less than that of the commercially available, white color (L=88) yttria coatings.

Example 9—Comparative Examples

(48) An emissivity controlled yttria (Y.sub.1.5O.sub.2.5) coating was deposited in the same plasma spray manner described above on a 6061 aluminum substrate. The coated surface of the sample was then exposed to 5 wt % HCl for 24 hrs. The sample was then rinsed with deionized (DI) water and baked at 85° C. for 1 hour to dry the sample. The sample showed blistering of the coating. The sample was cross-sectioned, and it was found that the HCl had corroded the coating/substrate interface.

(49) Another sample including a 6061 Al substrate was first coated with a high purity Si coating, and then an emissivity controlled yttria (Y.sub.1.5O.sub.2.5) coating was deposited on top of the Si undercoat layer without any surface roughening. This sample was also exposed to 5 wt % HCl for 24 hours, but did not show any blistering of the coating. The sample was also sectioned, and no evidence of corrosion was found at either the Si-coating/yttria-coating interface, or at the Si-coating/substrate interface that could lead to coating spallation.

(50) The above examples demonstrate that the present invention provides an emissivity controlled top coat that has high thermal emissivity and resistance to plasma erosion through its thickness and low particle generation when textured, that the undercoat has undercut-resistance (i.e., resistance to wet corrosion), and that controlling the overall thickness of the coatings provides dielectric breakdown resistance. Accordingly, the emissivity controlled coatings according to the present invention provides the desired multi-tiered protection for semiconductor processing chamber components in a manner that has not been heretofore considered or achieved by the prior art.

(51) While the present invention has been particularly shown and described with reference to the preferred mode as illustrated in the drawings, it will be understood by one skilled in the art that various changes in detail may be effected therein without departing from the spirit and scope of the invention as defined by the claims.