GRID-TIED INVERTER, INVERTER ARRANGEMENT, AND METHOD FOR OPERATING AN INVERTER ARRANGEMENT

Abstract

A grid-tied inverter for supplying current to a power supply system includes an output bridge arrangement that is actuated via a pulse width modulator, wherein switching times of the output bridge arrangement are determined by using a periodic auxiliary signal, wherein the frequency of the periodic auxiliary signal varies according to a prescribed periodic wobble signal. The inverter further includes a synchronization unit configured to provide phase synchronization of the auxiliary signal to the power supply system, wherein the synchronization unit is configured to adjust a prescribed phase offset of the periodic auxiliary signal in relation to a phase of the power supply system, and a further synchronization unit configured to provide phase synchronization of the periodic wobble signal to the power supply system. The synchronization unit and the further synchronization unit each include a PLL circuit, and the periodic wobble signal is routed to a controller system of the PLL circuit of the synchronization unit via a correction signal generator circuit and an adder circuit for the purpose of suppressing oscillations.

Claims

1. A grid-tied inverter for supplying current to a power supply system, comprising: an output bridge arrangement that is actuated via a pulse width modulator, wherein switching times of the output bridge arrangement are determined by using a periodic auxiliary signal, wherein the frequency of the periodic auxiliary signal varies according to a prescribed periodic wobble signal, and a synchronization unit configured to provide phase synchronization of the auxiliary signal to the power supply system, wherein the synchronization unit is configured to adjust a prescribed phase offset of the periodic auxiliary signal in relation to a phase of the power supply system, a further synchronization unit configured to provide phase synchronization of the periodic wobble signal to the power supply system, wherein the synchronization unit and the further synchronization unit each comprise a PLL circuit, and wherein the periodic wobble signal is routed to a controller system of the PLL circuit of the synchronization unit via a correction signal generator circuit and an adder circuit for the purpose of suppressing oscillations.

2. The grid-tied inverter according to claim 1, wherein the pulse width modulator comprises a sine-delta modulator and the periodic auxiliary signal comprises a triangular-waveform signal.

3. The grid-tied inverter according to claim 1, wherein the PLL circuit respectively comprises a frequency converter circuit having a conversion table and a D/A converter, for converting the periodic auxiliary signal or the periodic wobble signal into a phase-locked sine voltage of lower frequency than the periodic auxiliary signal or the periodic wobble signal.

4. The grid-tied inverter according to claim 1, wherein the periodic wobble signal comprises a triangular-waveform signal.

5. The grid-tied inverter according to claim 1, wherein the periodic wobble signal comprises a square-wave signal that adjusts the periodic auxiliary signal to two different frequencies.

6. The grid-tied inverter according to claim 5, wherein the two frequencies differ by a frequency that corresponds to a minimally adjustable frequency difference of an auxiliary signal generator circuit for the auxiliary signal.

7. The grid-tied inverter according to claim 6, wherein the square-wave-shaped periodic wobble signal has a duty ratio at which, on average, a prescribed frequency situated between the two frequencies arises for the auxiliary signal.

8. An inverter arrangement having at least two grid-tied inverters that are coupled to one another on the AC side, wherein the inverters each comprise the inverter claimed in claim 1.

9. The inverter arrangement according to claim 8, wherein each inverter comprises a downstream output current filter on the AC side thereof, wherein the output current filters are connected to one another by a respective output.

10. The inverter arrangement according to claim 9, wherein the output current filter comprises an LCL filter having a first inductance and a second inductance, wherein the second inductance has a lower inductance value than the first inductance.

11. The inverter arrangement according to claim 9, wherein the output current filter comprises an LC filter having only one inductance.

12. The inverter arrangement according to claim 9, wherein the interconnected outputs of the output current filters are connected to a power supply system via a transformer.

13. A method for operating an inverter arrangement for supplying power to a power supply system comprising at least two inverters that are coupled to one another on an AC side, and that each of the at least two inverters comprise an output bridge arrangement that is actuated in pulse width modulated fashion using a periodic auxiliary signal that is frequency modulated with a respective periodic wobble signal, wherein the respective periodic auxiliary signal is phase synchronized to the power supply system, wherein the periodic wobble signals of the two coupled inverters are phase synchronized to the power supply system and hence among one another, wherein the periodic wobble signal is routed to a control system of a PLL circuit for synchronizing the periodic auxiliary signal via a correction signal generator circuit and an adder circuit for the purpose of suppressing oscillations.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The disclosure is explained in more detail below using exemplary embodiments with reference to figures, in which:

[0030] FIG. 1 shows a schematic block diagram of a power supply device having an inverter arrangement having two or more inverters;

[0031] FIG. 2 shows part of an inverter in a schematic overview depiction in a schematic block diagram;

[0032] FIG. 3 shows synchronization devices usable for the inverter depicted in FIG. 2 for the auxiliary signal and the wobble signal in a more detailed schematic block diagram, and

[0033] FIG. 4 shows time characteristics for a periodic auxiliary signal and a wobble signal in two graphs.

DETAILED DESCRIPTION

[0034] The disclosure relates to a grid-tied inverter for supplying current to a power supply system, wherein the inverter has an output bridge arrangement that is actuated via a pulse width modulator. The switching times of the output bridge arrangement are determined by using a periodic auxiliary signal, wherein the frequency of the periodic auxiliary signal varies according to a prescribed periodic wobble signal. The inverter further comprises a synchronization unit for phase synchronization of the auxiliary signal to the power supply system, wherein the synchronization unit is configured to adjust a prescribed phase offset of the periodic auxiliary signal in relation to a phase of the power supply system. The disclosure additionally relates to an arrangement having at least two such inverters and to a method for operating such an inverter arrangement.

[0035] FIG. 1 shows a photovoltaic installation as a power supply installation in a schematic block diagram. The photovoltaic installation, subsequently referred to as PV installation for short, has two photovoltaic generators (PV generators) 1a, 1b that are each connected to an inverter 2a, 2b. Each of the inverters 2a, 2b has a downstream output current filter 3a, 3b that is used for signal shaping for the output signal of the respective inverter 2a, 2b. The output current filter 3a, 3b forms, in one embodiment, a sinusoidal output current characteristic from a pulsed current signal. In the example embodiment depicted, each of the output current filters 3a, 3b has a series connection comprising a first inductance 31a or 31b and second inductance 32a or 32b, with a center tap between the inductances 31a, 32a and 31b, 32b being connected to a neutral potential via a capacitor 33a, 33b. Such an output current filter 3a, 3b is also referred to as an LCL filter on account of the components used.

[0036] On the output side, the output current filters 3a, 3b are interconnected, so that the inverters 2a, 2b are also coupled via the output current filters 3a, 3b.

[0037] The inverters 2a, 2b coupled to one another on the output side are connected to a power supply system 5 via a transformer 4. For this purpose, the transformer 4 has a primary winding 41 and a secondary winding 42. As indicated in the figure, more than the two inverters 2a, 2b depicted may also be coupled on the output side in the same way.

[0038] Symbolically, the PV generators 1a, 1b are each depicted in the figure only by the graphic symbol for a single photovoltaic cell. It is known that the PV generators 1a, 1b may, in an implementation of the depicted PV installation, each be constructed from a plurality of photovoltaic modules (PV modules) that are interconnected in series and/or in parallel. For reasons of clarity, further elements of PV installations, for example switching entities on the DC (direct current) side or on the AC (alternating current) side, for example installation isolators or fuse entities, are additionally not reproduced in the figure.

[0039] In the example embodiment depicted, the inverters 2a, 2b each comprise an input-side DC/DC converter 21a, 21b that are each connected to a DC/AC converter 23a, 23b via a link circuit 22a, 22b. It is noted that an inverter according to the application may also be configured without an input-side DC/DC converter. The DC link circuit has a respective capacitor 221a, 221b arranged in it that is used for smoothing a DC link circuit voltage Uz and allows pulsed current draw without voltage dips in the DC link circuit voltage Uz by the DC/AC converters 23a, 23b. The inverters 2a, 2b each have a control device 24a, 24b inter alia for controlling the DC/DC converters 21a, 21b and the DC/AC converters 23a, 23b. In this case, control of the DC/DC converters 21a, 21b can e.g. also comprise what is known as an MPP (maximum power point) tracking method that is used for operating the PV generators 1a, 1b at an operating point of maximum power.

[0040] The PV installation is configured to supply electrical power to the power supply system 5 on three phases. Accordingly, the inverters 2a, 2b in this example embodiment have a three phase output and the output current filters 3a and 3b and the transformer 4 are in a three phase configuration. To improve clarity, specific depiction of the individual phases has been dispensed within the figures. The aforementioned number of three phases is intended to be understood merely by way of example; an inverter according to the application and an inverter arrangement based thereon may likewise be suitable for operation with any number of phases, particularly single-phase operation.

[0041] In their DC/AC converters 23a, 23b, the inverters 2a, 2b comprise output bridge circuits comprising semiconductor power switches that are actuated using a PWM method. The output signal from the DC/AC converters 23a, 23b is therefore a clocked DC signal, with the clock frequency, that is to say the number of switching cycles per second, being able to be in the range from 1 kilohertz to over 100 kilohertz.

[0042] FIG. 2 shows a detailed segment of one of the inverters 2a, 2b from FIG. 1 likewise in a block diagram. The explanations that follow relate to both inverters 2a, 2b, which are of the same configuration in the example embodiment depicted in FIG. 1. There is therefore no distinction by the index a, b for the reference symbols.

[0043] The DC/AC converter 23 of the inverter 2 has an output bridge arrangement 230, for which one bridge section is depicted symbolically. In a three phase embodiment of the inverter 2, there are usually three of such bridge sections, which are indicated in the figure by ellipses. Other circuit topologies are by all means also conceivable, however.

[0044] In the embodiment depicted, each bridge section has two semiconductor power switches 231, 232. By way of example, IGBT (insulated gate bipolar transistor) switches are depicted, which are each provided with a protective diode connected in antiparallel. However, it is also possible for other suitable semiconductor switches, for example MOSFETs (metal oxide semiconductor field effect transistors) or SiC (silicon carbide) transistors, to be used. The switches 231, 232 are actuated by the control device 24. The control device 24 comprises a pulse width modulator 241, a reference voltage generator 242, a synchronization unit 243, a control unit 244 and a further synchronization unit 245.

[0045] The pulse width modulator 241 generates the actuating signals for the switching elements 231, 232 such that a characteristic of a reference voltage U.sub.ref, prescribed for it, is reproduced. The reference voltage U.sub.ref is formed by the reference voltage generator 242 from a mains voltage characteristic, supplied to it, of the power supply system 5. Hence, the voltage characteristic that is output at the output of the inverter 2 follows that of the mains voltage; the inverter is grid-tied. The reference voltage generator 242 can provide the reference voltage U.sub.ref by mapping the voltage of one of the phases of the power supply system, subsequently called mains voltage U.sub.mains, directly onto a lower voltage level of the reference voltage U.sub.ref or by also making use of the interposition of a reference voltage sine generator that is synchronized to the prescribed mains voltage U.sub.mains by means of a phase synchronization circuit (PLL—phase locked loop).

[0046] The frequency of the periodic auxiliary signal, that is to say in this case the triangular-waveform signal U.sub.Δ used, is transmitted to the synchronization unit 243 in this case by the further synchronization unit 245 in the form of a signal U.sub.mod. In this case, according to the application, the signal U.sub.mod is not constant, but rather varies over time. It is subsequently also referred to as wobble signal U.sub.mod. The wobble signal U.sub.mod may, by way of example, be a triangular-waveform or sawtooth-waveform signal if the frequency of the periodic auxiliary signal is varied linearly and possibly continuously within certain limits. The wobble signal U.sub.mod may also be a square-wave signal if there is provision for a change between two discrete frequencies of the periodic auxiliary signal.

[0047] To operate an inverter arrangement, a phase between the periodic auxiliary signal, in this case the triangular-waveform signal U.sub.Δ, and the mains voltage U.sub.mains, represented by the reference voltage U.sub.ref, is adjusted for each inverter of the inverter arrangement such that the auxiliary signals of two coupled inverters are in phase with one another. For this purpose, the synchronization unit 243 is supplied with the reference voltage U.sub.ref.

[0048] According to the application, there is further provision for the wobble signal U.sub.mod also to be synchronized to the mains voltage U.sub.mains. For this purpose, the further synchronization unit 245 is also supplied with the reference voltage U.sub.ref.

[0049] FIG. 3 shows the configuration of the synchronization unit 243 and of the further synchronization unit 245 from FIG. 2 in more detail in a block diagram. To start with, it is pointed out that FIG. 3 depicts a synchronization unit having analog control loops for the phase of the auxiliary signal for the PWM or of the wobble signal. It goes without saying that the synchronization units may likewise have a digitally operating controller.

[0050] The synchronization unit 243 has a triangular-waveform voltage generator 200 that is embodied as a voltage-controlled frequency generator, the frequency f of which is controlled by means of an input voltage signal U.sub.f. The voltage signal that is output by the triangular-waveform voltage generator 200 at an output is provided to the pulse width modulator 241 as a triangular-waveform signal U.sub.Δ.

[0051] Within the synchronization unit 243, the triangular-waveform signal U.sub.Δ is supplied to a frequency converter 201. The frequency f of the triangular-waveform signal U.sub.Δ is usually an integer multiple of the mains frequency f.sub.0 of the power supply system 5. The frequency ratio f/f.sub.0 between the two frequencies is in the range from approximately 10 to 1000 for currently used methods. To perform a comparison of the phases of the triangular-waveform signal U.sub.Δ and the lower-frequency mains voltage characteristic, the frequency converter 201 performs frequency division for the triangular-waveform signal U.sub.Δ by the cited factor, and also waveform conversion into a sinusoidal signal. One possibility for the conversion is to set up a rotary counter whose counter content is incremented by the value 1 per period of the triangular-waveform signal U.sub.Δ that is passed through. When the counter reaches a count that corresponds to the frequency ratio f/f.sub.0, the counter is reset to an initial value of 1. The counter thus cyclically passes through f/f.sub.0 different values, each cyclic pass corresponding to a period duration of the sine signal of the mains voltage U.sub.mains. The frequency converter 201 stores a conversion table that stores, for each count, a corresponding value of a sine voltage with the period duration of the mains frequency f.sub.0. At the output of the frequency converter 201, a voltage signal produced by means of a digital/analog converter is output according to the values of this table. The frequency converter 201 therefore provides a sinusoidal voltage signal at its output, which voltage signal is coupled in phase-locked fashion to the triangular-waveform signal U.sub.Δ of the triangular-waveform generator 200 and has a frequency that corresponds to that of the mains voltage U.sub.mains. This signal is likewise supplied to a phase comparator 202, like the reference signal U.sub.ref provided by the reference voltage generator 242 (cf. also FIG. 2), which reference signal is phase-locked to the mains voltage. At the output of the phase comparator 202, a signal U.sub.Δφ is output that is proportional to the phase difference of the two input signals.

[0052] In an adder 203, this signal also has a voltage added to it that is produced by an optional offset adjuster 204 and that corresponds to a phase offset Δφ.sub.0 to be adjusted, which, in one embodiment, is zero in the case of DC coupled inverters. However, there may also be provision for a phase offset Δφ.sub.0 not equal to zero, for example in order to allow for differences in the values of different output current filters 3a, 3b and phase shifts, brought about by the latter, in the output currents of different inverters 2a, 2b. The summed signal is supplied as a control variable to a closed-loop control module chip 205, which may be embodied as a proportional/integral controller (PI controller), for example.

[0053] The output of the closed-loop control module 205 is added in a further adder 206 to a fundamental frequency voltage U.sub.f0, which is output by a fundamental frequency adjuster 207, and to the wobble signal U.sub.mod, in order to produce the control voltage U.sub.f, which, as described previously, controls the triangular-waveform generator 200 and hence the frequency f of the triangular-waveform auxiliary signal U.sub.Δ.

[0054] The synchronization unit 243 thus comprises a phase locked loop (PLL) that continually corrects the frequency f of the triangular-waveform generator 200 via the closed-loop control module 205 such that a fixed phase relationship prevails between the triangular-waveform signal U.sub.Δ and the reference voltage U.sub.ref. In this case, this phase relationship can be adjusted via the offset adjuster 204 or else prescribed by a control device. The frequency ratio f/f.sub.0 between the triangular-waveform signal U.sub.Δ and the mains voltage U.sub.mains is determined via the frequency divider 201 and the conversion table stored therein.

[0055] In a comparable manner, the wobble signal U.sub.mod also has its phase matched to the mains voltage U.sub.mains, represented by the reference voltage U.sub.ref, by the further synchronization unit 245. For this purpose, the further synchronization unit 245 comprises a triangular-waveform voltage generator 210 for the wobble signal U.sub.mod, which is embodied as a voltage-controlled frequency generator whose frequency f′ is controlled via an input voltage signal U.sub.f′. The frequency of the wobble signal U.sub.mod is typically lower than the frequency of the auxiliary signal U.sub.Δ, but is higher than the mains frequency.

[0056] Within the further synchronization unit 245, the triangular-waveform wobble signal U.sub.mod is supplied to a frequency converter 211. To perform a comparison of the phases of the wobble signal U.sub.mod and the lower-frequency mains voltage characteristic, represented by the reference voltage U.sub.ref, the frequency converter 211 performs frequency division for the triangular-waveform signal U.sub.mod by a suitable factor, and wave conversion into a sinusoidal signal. Again, as described in connection with the synchronization unit 243 for the auxiliary signal U.sub.Δ, conversion can be performed using a rotary counter and a conversion table that stores a corresponding value of a sine voltage for each count. The sinusoidal signal that is output by frequency divider 211 is compared with the reference voltage signal U.sub.ref in a phase comparator 212. The output of the phase comparator 212 outputs a signal U.sub.Δφ′ that is proportional to the phase difference by the two input signals. This phase difference is supplied to a closed-loop control module or circuit 215, which may again by embodied as a proportional/integral controller (PI controller), for example. The closed-loop control module 215 uses its output to output the input signal U.sup.f′ for the triangular-waveform voltage generator 210 in order to produce the wobble signal U.sub.mod.

[0057] Optionally, to suppress oscillation tendencies for the control of the frequency f of the triangular-waveform signal U.sub.Δ, a correction signal generator 216 may be provided that takes the wobble signal U.sub.mod and produces a correction signal that is supplied to the input of the closed-loop control module 205 via the adder 203. The control can thus be extended by a controlling component that attenuates oscillation tendencies, particularly in the case of frequency hopping. The correction signal generator 216 may comprise an integrator, for example.

[0058] In the case of the example depicted in FIG. 3, a triangular-waveform wobble signal U.sub.mod is used. The electromagnetic interference emitted by an inverter on account of the clocking of the semiconductor power switches is on a frequency that correlates with the frequency of the periodic auxiliary signal. When a triangular-waveform wobble signal is used for varying the frequency of the auxiliary signal, electromagnetic interference introduced is distributed over a broader frequency range. The respective amplitudes of the electromagnetic interference then turn out to be distinctly lower for a specific frequency value. When there are prescribed limit values for the amplitudes of the interference, use of a triangular-waveform wobble signal U.sub.mod can involve less complex filtering of the output signal from the inverter bridge taking place. In particular, in the case of the example embodiment in FIG. 1, the second inductance 32a, 32b of the output current filters 3a, 3b can have its inductance value reduced, and depending on legal or regulatory stipulations it may even be dispensed with completely in some cases. This results in lower use of materials, which means the costs, weight and installation space can be saved.

[0059] Another application for an auxiliary signal whose frequency varies over time is depicted in connection with FIG. 4.

[0060] The lower part of FIG. 4 uses the graph to show a time characteristic 60 for a square-wave modulation signal U.sub.mod (right y-axis of the graph over time t on the x-axis of the graph). With such a characteristic 60 of the modulation signal U.sub.mod, the frequency of the auxiliary signal hops between two frequencies f.sup.−, f.sup.+, which are shown on the left y-axis of the graph.

[0061] The upper graph depicts the time characteristic 61 of the periodic auxiliary signal, which time characteristic results from the characteristic 60 of the modulation signal U.sub.mod. The times for which the wobble signal U.sub.mod stays on one or the other value are in this case chosen such that the auxiliary signal respectively passes through a period at the higher frequency f.sup.+ and a period at the lower frequency f.sup.− within the period duration of the wobble signal U.sub.mod in the example embodiment depicted. In alternative configurations, there may be provision for the higher frequency f.sup.+ and/or the lower frequency f.sup.− to be respectively retained for multiple periods.

[0062] On average, the change between the frequencies f.sup.− and f.sup.+ gives rise to a mean effective frequency f.sub.eff, which is shown in the form of a dashed line in the lower part of FIG. 4. In the upper part of FIG. 4, a characteristic 62 of an auxiliary signal is likewise shown in dashes, the auxiliary signal being constantly at the frequency f.sub.eff in this case. A comparison of the time characteristics 61, 62 shows that on average the frequency of the modulated auxiliary signal corresponds to the effective frequency f.sub.eff.

[0063] The method described can, by way of example, be used when the frequency resolution of the generator, e.g. the triangular-waveform generator 200 of FIG. 3, does not permit a desired effective frequency f.sub.eff to be adjusted for the periodic auxiliary signal. It is then possible, as depicted, to use the square-wave wobble signal U.sub.mod to hop to and fro between adjacent discrete and adjustable frequencies f.sup.− and f.sup.+ such that on average the auxiliary signal is generated at the desired frequency f.sub.eff.